12874c5fdSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later 298cd1552SFlorian Fainelli /* 398cd1552SFlorian Fainelli * Distributed Switch Architecture loopback driver 498cd1552SFlorian Fainelli * 598cd1552SFlorian Fainelli * Copyright (C) 2016, Florian Fainelli <f.fainelli@gmail.com> 698cd1552SFlorian Fainelli */ 798cd1552SFlorian Fainelli 898cd1552SFlorian Fainelli #include <linux/platform_device.h> 998cd1552SFlorian Fainelli #include <linux/netdevice.h> 1098cd1552SFlorian Fainelli #include <linux/phy.h> 1198cd1552SFlorian Fainelli #include <linux/phy_fixed.h> 1298cd1552SFlorian Fainelli #include <linux/export.h> 13484c0172SFlorian Fainelli #include <linux/ethtool.h> 1498cd1552SFlorian Fainelli #include <linux/workqueue.h> 1598cd1552SFlorian Fainelli #include <linux/module.h> 1698cd1552SFlorian Fainelli #include <linux/if_bridge.h> 176c84a589SFlorian Fainelli #include <linux/dsa/loop.h> 1898cd1552SFlorian Fainelli #include <net/dsa.h> 1998cd1552SFlorian Fainelli 2098cd1552SFlorian Fainelli #include "dsa_loop.h" 2198cd1552SFlorian Fainelli 22484c0172SFlorian Fainelli static struct dsa_loop_mib_entry dsa_loop_mibs[] = { 23484c0172SFlorian Fainelli [DSA_LOOP_PHY_READ_OK] = { "phy_read_ok", }, 24484c0172SFlorian Fainelli [DSA_LOOP_PHY_READ_ERR] = { "phy_read_err", }, 25484c0172SFlorian Fainelli [DSA_LOOP_PHY_WRITE_OK] = { "phy_write_ok", }, 26484c0172SFlorian Fainelli [DSA_LOOP_PHY_WRITE_ERR] = { "phy_write_err", }, 27484c0172SFlorian Fainelli }; 28484c0172SFlorian Fainelli 2998cd1552SFlorian Fainelli static struct phy_device *phydevs[PHY_MAX_ADDR]; 3098cd1552SFlorian Fainelli 315ed4e3ebSFlorian Fainelli static enum dsa_tag_protocol dsa_loop_get_protocol(struct dsa_switch *ds, 324d776482SFlorian Fainelli int port, 334d776482SFlorian Fainelli enum dsa_tag_protocol mp) 3498cd1552SFlorian Fainelli { 35e52cde71SFlorian Fainelli dev_dbg(ds->dev, "%s: port: %d\n", __func__, port); 3698cd1552SFlorian Fainelli 3798cd1552SFlorian Fainelli return DSA_TAG_PROTO_NONE; 3898cd1552SFlorian Fainelli } 3998cd1552SFlorian Fainelli 4098cd1552SFlorian Fainelli static int dsa_loop_setup(struct dsa_switch *ds) 4198cd1552SFlorian Fainelli { 42484c0172SFlorian Fainelli struct dsa_loop_priv *ps = ds->priv; 43484c0172SFlorian Fainelli unsigned int i; 44484c0172SFlorian Fainelli 45484c0172SFlorian Fainelli for (i = 0; i < ds->num_ports; i++) 46484c0172SFlorian Fainelli memcpy(ps->ports[i].mib, dsa_loop_mibs, 47484c0172SFlorian Fainelli sizeof(dsa_loop_mibs)); 48484c0172SFlorian Fainelli 4998cd1552SFlorian Fainelli dev_dbg(ds->dev, "%s\n", __func__); 5098cd1552SFlorian Fainelli 5198cd1552SFlorian Fainelli return 0; 5298cd1552SFlorian Fainelli } 5398cd1552SFlorian Fainelli 5489f09048SFlorian Fainelli static int dsa_loop_get_sset_count(struct dsa_switch *ds, int port, int sset) 55484c0172SFlorian Fainelli { 5696cbddcdSFlorian Fainelli if (sset != ETH_SS_STATS && sset != ETH_SS_PHY_STATS) 5789f09048SFlorian Fainelli return 0; 5889f09048SFlorian Fainelli 59484c0172SFlorian Fainelli return __DSA_LOOP_CNT_MAX; 60484c0172SFlorian Fainelli } 61484c0172SFlorian Fainelli 6289f09048SFlorian Fainelli static void dsa_loop_get_strings(struct dsa_switch *ds, int port, 6389f09048SFlorian Fainelli u32 stringset, uint8_t *data) 64484c0172SFlorian Fainelli { 65484c0172SFlorian Fainelli struct dsa_loop_priv *ps = ds->priv; 66484c0172SFlorian Fainelli unsigned int i; 67484c0172SFlorian Fainelli 6896cbddcdSFlorian Fainelli if (stringset != ETH_SS_STATS && stringset != ETH_SS_PHY_STATS) 6989f09048SFlorian Fainelli return; 7089f09048SFlorian Fainelli 71484c0172SFlorian Fainelli for (i = 0; i < __DSA_LOOP_CNT_MAX; i++) 72484c0172SFlorian Fainelli memcpy(data + i * ETH_GSTRING_LEN, 73484c0172SFlorian Fainelli ps->ports[port].mib[i].name, ETH_GSTRING_LEN); 74484c0172SFlorian Fainelli } 75484c0172SFlorian Fainelli 76484c0172SFlorian Fainelli static void dsa_loop_get_ethtool_stats(struct dsa_switch *ds, int port, 77484c0172SFlorian Fainelli uint64_t *data) 78484c0172SFlorian Fainelli { 79484c0172SFlorian Fainelli struct dsa_loop_priv *ps = ds->priv; 80484c0172SFlorian Fainelli unsigned int i; 81484c0172SFlorian Fainelli 82484c0172SFlorian Fainelli for (i = 0; i < __DSA_LOOP_CNT_MAX; i++) 83484c0172SFlorian Fainelli data[i] = ps->ports[port].mib[i].val; 84484c0172SFlorian Fainelli } 85484c0172SFlorian Fainelli 8698cd1552SFlorian Fainelli static int dsa_loop_phy_read(struct dsa_switch *ds, int port, int regnum) 8798cd1552SFlorian Fainelli { 8898cd1552SFlorian Fainelli struct dsa_loop_priv *ps = ds->priv; 8998cd1552SFlorian Fainelli struct mii_bus *bus = ps->bus; 90484c0172SFlorian Fainelli int ret; 9198cd1552SFlorian Fainelli 92484c0172SFlorian Fainelli ret = mdiobus_read_nested(bus, ps->port_base + port, regnum); 93484c0172SFlorian Fainelli if (ret < 0) 94484c0172SFlorian Fainelli ps->ports[port].mib[DSA_LOOP_PHY_READ_ERR].val++; 95484c0172SFlorian Fainelli else 96484c0172SFlorian Fainelli ps->ports[port].mib[DSA_LOOP_PHY_READ_OK].val++; 97484c0172SFlorian Fainelli 98484c0172SFlorian Fainelli return ret; 9998cd1552SFlorian Fainelli } 10098cd1552SFlorian Fainelli 10198cd1552SFlorian Fainelli static int dsa_loop_phy_write(struct dsa_switch *ds, int port, 10298cd1552SFlorian Fainelli int regnum, u16 value) 10398cd1552SFlorian Fainelli { 10498cd1552SFlorian Fainelli struct dsa_loop_priv *ps = ds->priv; 10598cd1552SFlorian Fainelli struct mii_bus *bus = ps->bus; 106484c0172SFlorian Fainelli int ret; 10798cd1552SFlorian Fainelli 108484c0172SFlorian Fainelli ret = mdiobus_write_nested(bus, ps->port_base + port, regnum, value); 109484c0172SFlorian Fainelli if (ret < 0) 110484c0172SFlorian Fainelli ps->ports[port].mib[DSA_LOOP_PHY_WRITE_ERR].val++; 111484c0172SFlorian Fainelli else 112484c0172SFlorian Fainelli ps->ports[port].mib[DSA_LOOP_PHY_WRITE_OK].val++; 113484c0172SFlorian Fainelli 114484c0172SFlorian Fainelli return ret; 11598cd1552SFlorian Fainelli } 11698cd1552SFlorian Fainelli 11798cd1552SFlorian Fainelli static int dsa_loop_port_bridge_join(struct dsa_switch *ds, int port, 11898cd1552SFlorian Fainelli struct net_device *bridge) 11998cd1552SFlorian Fainelli { 120e52cde71SFlorian Fainelli dev_dbg(ds->dev, "%s: port: %d, bridge: %s\n", 121e52cde71SFlorian Fainelli __func__, port, bridge->name); 12298cd1552SFlorian Fainelli 12398cd1552SFlorian Fainelli return 0; 12498cd1552SFlorian Fainelli } 12598cd1552SFlorian Fainelli 12698cd1552SFlorian Fainelli static void dsa_loop_port_bridge_leave(struct dsa_switch *ds, int port, 12798cd1552SFlorian Fainelli struct net_device *bridge) 12898cd1552SFlorian Fainelli { 129e52cde71SFlorian Fainelli dev_dbg(ds->dev, "%s: port: %d, bridge: %s\n", 130e52cde71SFlorian Fainelli __func__, port, bridge->name); 13198cd1552SFlorian Fainelli } 13298cd1552SFlorian Fainelli 13398cd1552SFlorian Fainelli static void dsa_loop_port_stp_state_set(struct dsa_switch *ds, int port, 13498cd1552SFlorian Fainelli u8 state) 13598cd1552SFlorian Fainelli { 136e52cde71SFlorian Fainelli dev_dbg(ds->dev, "%s: port: %d, state: %d\n", 137e52cde71SFlorian Fainelli __func__, port, state); 13898cd1552SFlorian Fainelli } 13998cd1552SFlorian Fainelli 14098cd1552SFlorian Fainelli static int dsa_loop_port_vlan_filtering(struct dsa_switch *ds, int port, 14198cd1552SFlorian Fainelli bool vlan_filtering) 14298cd1552SFlorian Fainelli { 143e52cde71SFlorian Fainelli dev_dbg(ds->dev, "%s: port: %d, vlan_filtering: %d\n", 144e52cde71SFlorian Fainelli __func__, port, vlan_filtering); 14598cd1552SFlorian Fainelli 14698cd1552SFlorian Fainelli return 0; 14798cd1552SFlorian Fainelli } 14898cd1552SFlorian Fainelli 14980e02360SVivien Didelot static int 15080e02360SVivien Didelot dsa_loop_port_vlan_prepare(struct dsa_switch *ds, int port, 15180e02360SVivien Didelot const struct switchdev_obj_port_vlan *vlan) 15298cd1552SFlorian Fainelli { 15398cd1552SFlorian Fainelli struct dsa_loop_priv *ps = ds->priv; 15498cd1552SFlorian Fainelli struct mii_bus *bus = ps->bus; 15598cd1552SFlorian Fainelli 156e52cde71SFlorian Fainelli dev_dbg(ds->dev, "%s: port: %d, vlan: %d-%d", 157e52cde71SFlorian Fainelli __func__, port, vlan->vid_begin, vlan->vid_end); 15898cd1552SFlorian Fainelli 15998cd1552SFlorian Fainelli /* Just do a sleeping operation to make lockdep checks effective */ 16098cd1552SFlorian Fainelli mdiobus_read(bus, ps->port_base + port, MII_BMSR); 16198cd1552SFlorian Fainelli 162916a8d16SFlorian Fainelli if (vlan->vid_end > ARRAY_SIZE(ps->vlans)) 16398cd1552SFlorian Fainelli return -ERANGE; 16498cd1552SFlorian Fainelli 16598cd1552SFlorian Fainelli return 0; 16698cd1552SFlorian Fainelli } 16798cd1552SFlorian Fainelli 16898cd1552SFlorian Fainelli static void dsa_loop_port_vlan_add(struct dsa_switch *ds, int port, 16980e02360SVivien Didelot const struct switchdev_obj_port_vlan *vlan) 17098cd1552SFlorian Fainelli { 17198cd1552SFlorian Fainelli bool untagged = vlan->flags & BRIDGE_VLAN_INFO_UNTAGGED; 17298cd1552SFlorian Fainelli bool pvid = vlan->flags & BRIDGE_VLAN_INFO_PVID; 17398cd1552SFlorian Fainelli struct dsa_loop_priv *ps = ds->priv; 17498cd1552SFlorian Fainelli struct mii_bus *bus = ps->bus; 17598cd1552SFlorian Fainelli struct dsa_loop_vlan *vl; 17698cd1552SFlorian Fainelli u16 vid; 17798cd1552SFlorian Fainelli 17898cd1552SFlorian Fainelli /* Just do a sleeping operation to make lockdep checks effective */ 17998cd1552SFlorian Fainelli mdiobus_read(bus, ps->port_base + port, MII_BMSR); 18098cd1552SFlorian Fainelli 18198cd1552SFlorian Fainelli for (vid = vlan->vid_begin; vid <= vlan->vid_end; ++vid) { 18298cd1552SFlorian Fainelli vl = &ps->vlans[vid]; 18398cd1552SFlorian Fainelli 18498cd1552SFlorian Fainelli vl->members |= BIT(port); 18598cd1552SFlorian Fainelli if (untagged) 18698cd1552SFlorian Fainelli vl->untagged |= BIT(port); 18798cd1552SFlorian Fainelli else 18898cd1552SFlorian Fainelli vl->untagged &= ~BIT(port); 189e52cde71SFlorian Fainelli 190e52cde71SFlorian Fainelli dev_dbg(ds->dev, "%s: port: %d vlan: %d, %stagged, pvid: %d\n", 191e52cde71SFlorian Fainelli __func__, port, vid, untagged ? "un" : "", pvid); 19298cd1552SFlorian Fainelli } 19398cd1552SFlorian Fainelli 19498cd1552SFlorian Fainelli if (pvid) 19581d4e8e0SFlorian Fainelli ps->ports[port].pvid = vid; 19698cd1552SFlorian Fainelli } 19798cd1552SFlorian Fainelli 19898cd1552SFlorian Fainelli static int dsa_loop_port_vlan_del(struct dsa_switch *ds, int port, 19998cd1552SFlorian Fainelli const struct switchdev_obj_port_vlan *vlan) 20098cd1552SFlorian Fainelli { 20198cd1552SFlorian Fainelli bool untagged = vlan->flags & BRIDGE_VLAN_INFO_UNTAGGED; 20298cd1552SFlorian Fainelli struct dsa_loop_priv *ps = ds->priv; 20398cd1552SFlorian Fainelli struct mii_bus *bus = ps->bus; 20498cd1552SFlorian Fainelli struct dsa_loop_vlan *vl; 20581d4e8e0SFlorian Fainelli u16 vid, pvid = ps->ports[port].pvid; 20698cd1552SFlorian Fainelli 20798cd1552SFlorian Fainelli /* Just do a sleeping operation to make lockdep checks effective */ 20898cd1552SFlorian Fainelli mdiobus_read(bus, ps->port_base + port, MII_BMSR); 20998cd1552SFlorian Fainelli 21098cd1552SFlorian Fainelli for (vid = vlan->vid_begin; vid <= vlan->vid_end; ++vid) { 21198cd1552SFlorian Fainelli vl = &ps->vlans[vid]; 21298cd1552SFlorian Fainelli 21398cd1552SFlorian Fainelli vl->members &= ~BIT(port); 21498cd1552SFlorian Fainelli if (untagged) 21598cd1552SFlorian Fainelli vl->untagged &= ~BIT(port); 21698cd1552SFlorian Fainelli 21798cd1552SFlorian Fainelli if (pvid == vid) 21898cd1552SFlorian Fainelli pvid = 1; 219e52cde71SFlorian Fainelli 220e52cde71SFlorian Fainelli dev_dbg(ds->dev, "%s: port: %d vlan: %d, %stagged, pvid: %d\n", 221e52cde71SFlorian Fainelli __func__, port, vid, untagged ? "un" : "", pvid); 22298cd1552SFlorian Fainelli } 22381d4e8e0SFlorian Fainelli ps->ports[port].pvid = pvid; 22498cd1552SFlorian Fainelli 22598cd1552SFlorian Fainelli return 0; 22698cd1552SFlorian Fainelli } 22798cd1552SFlorian Fainelli 228d78d6776SBhumika Goyal static const struct dsa_switch_ops dsa_loop_driver = { 22998cd1552SFlorian Fainelli .get_tag_protocol = dsa_loop_get_protocol, 23098cd1552SFlorian Fainelli .setup = dsa_loop_setup, 231484c0172SFlorian Fainelli .get_strings = dsa_loop_get_strings, 232484c0172SFlorian Fainelli .get_ethtool_stats = dsa_loop_get_ethtool_stats, 233484c0172SFlorian Fainelli .get_sset_count = dsa_loop_get_sset_count, 23496cbddcdSFlorian Fainelli .get_ethtool_phy_stats = dsa_loop_get_ethtool_stats, 23598cd1552SFlorian Fainelli .phy_read = dsa_loop_phy_read, 23698cd1552SFlorian Fainelli .phy_write = dsa_loop_phy_write, 23798cd1552SFlorian Fainelli .port_bridge_join = dsa_loop_port_bridge_join, 23898cd1552SFlorian Fainelli .port_bridge_leave = dsa_loop_port_bridge_leave, 23998cd1552SFlorian Fainelli .port_stp_state_set = dsa_loop_port_stp_state_set, 24098cd1552SFlorian Fainelli .port_vlan_filtering = dsa_loop_port_vlan_filtering, 24198cd1552SFlorian Fainelli .port_vlan_prepare = dsa_loop_port_vlan_prepare, 24298cd1552SFlorian Fainelli .port_vlan_add = dsa_loop_port_vlan_add, 24398cd1552SFlorian Fainelli .port_vlan_del = dsa_loop_port_vlan_del, 24498cd1552SFlorian Fainelli }; 24598cd1552SFlorian Fainelli 24698cd1552SFlorian Fainelli static int dsa_loop_drv_probe(struct mdio_device *mdiodev) 24798cd1552SFlorian Fainelli { 24898cd1552SFlorian Fainelli struct dsa_loop_pdata *pdata = mdiodev->dev.platform_data; 24998cd1552SFlorian Fainelli struct dsa_loop_priv *ps; 25098cd1552SFlorian Fainelli struct dsa_switch *ds; 25193165ecbSFlorian Fainelli int ret; 25298cd1552SFlorian Fainelli 25398cd1552SFlorian Fainelli if (!pdata) 25498cd1552SFlorian Fainelli return -ENODEV; 25598cd1552SFlorian Fainelli 2567e99e347SVivien Didelot ds = devm_kzalloc(&mdiodev->dev, sizeof(*ds), GFP_KERNEL); 25798cd1552SFlorian Fainelli if (!ds) 25898cd1552SFlorian Fainelli return -ENOMEM; 25998cd1552SFlorian Fainelli 2607e99e347SVivien Didelot ds->dev = &mdiodev->dev; 2617e99e347SVivien Didelot ds->num_ports = DSA_MAX_PORTS; 2627e99e347SVivien Didelot 26398cd1552SFlorian Fainelli ps = devm_kzalloc(&mdiodev->dev, sizeof(*ps), GFP_KERNEL); 2648ce7aaaaSChristophe Jaillet if (!ps) 2658ce7aaaaSChristophe Jaillet return -ENOMEM; 2668ce7aaaaSChristophe Jaillet 26798cd1552SFlorian Fainelli ps->netdev = dev_get_by_name(&init_net, pdata->netdev); 26898cd1552SFlorian Fainelli if (!ps->netdev) 26998cd1552SFlorian Fainelli return -EPROBE_DEFER; 27098cd1552SFlorian Fainelli 27198cd1552SFlorian Fainelli pdata->cd.netdev[DSA_LOOP_CPU_PORT] = &ps->netdev->dev; 27298cd1552SFlorian Fainelli 27398cd1552SFlorian Fainelli ds->dev = &mdiodev->dev; 27498cd1552SFlorian Fainelli ds->ops = &dsa_loop_driver; 27598cd1552SFlorian Fainelli ds->priv = ps; 27698cd1552SFlorian Fainelli ps->bus = mdiodev->bus; 27798cd1552SFlorian Fainelli 27898cd1552SFlorian Fainelli dev_set_drvdata(&mdiodev->dev, ds); 27998cd1552SFlorian Fainelli 28093165ecbSFlorian Fainelli ret = dsa_register_switch(ds); 28193165ecbSFlorian Fainelli if (!ret) 28293165ecbSFlorian Fainelli dev_info(&mdiodev->dev, "%s: 0x%0x\n", 28393165ecbSFlorian Fainelli pdata->name, pdata->enabled_ports); 28493165ecbSFlorian Fainelli 28593165ecbSFlorian Fainelli return ret; 28698cd1552SFlorian Fainelli } 28798cd1552SFlorian Fainelli 28898cd1552SFlorian Fainelli static void dsa_loop_drv_remove(struct mdio_device *mdiodev) 28998cd1552SFlorian Fainelli { 29098cd1552SFlorian Fainelli struct dsa_switch *ds = dev_get_drvdata(&mdiodev->dev); 29198cd1552SFlorian Fainelli struct dsa_loop_priv *ps = ds->priv; 29298cd1552SFlorian Fainelli 29398cd1552SFlorian Fainelli dsa_unregister_switch(ds); 29498cd1552SFlorian Fainelli dev_put(ps->netdev); 29598cd1552SFlorian Fainelli } 29698cd1552SFlorian Fainelli 29798cd1552SFlorian Fainelli static struct mdio_driver dsa_loop_drv = { 29898cd1552SFlorian Fainelli .mdiodrv.driver = { 29998cd1552SFlorian Fainelli .name = "dsa-loop", 30098cd1552SFlorian Fainelli }, 30198cd1552SFlorian Fainelli .probe = dsa_loop_drv_probe, 30298cd1552SFlorian Fainelli .remove = dsa_loop_drv_remove, 30398cd1552SFlorian Fainelli }; 30498cd1552SFlorian Fainelli 30598cd1552SFlorian Fainelli #define NUM_FIXED_PHYS (DSA_LOOP_NUM_PORTS - 2) 30698cd1552SFlorian Fainelli 30798cd1552SFlorian Fainelli static int __init dsa_loop_init(void) 30898cd1552SFlorian Fainelli { 30998cd1552SFlorian Fainelli struct fixed_phy_status status = { 31098cd1552SFlorian Fainelli .link = 1, 31198cd1552SFlorian Fainelli .speed = SPEED_100, 31298cd1552SFlorian Fainelli .duplex = DUPLEX_FULL, 31398cd1552SFlorian Fainelli }; 31498cd1552SFlorian Fainelli unsigned int i; 31598cd1552SFlorian Fainelli 31698cd1552SFlorian Fainelli for (i = 0; i < NUM_FIXED_PHYS; i++) 3175468e82fSLinus Walleij phydevs[i] = fixed_phy_register(PHY_POLL, &status, NULL); 31898cd1552SFlorian Fainelli 31998cd1552SFlorian Fainelli return mdio_driver_register(&dsa_loop_drv); 32098cd1552SFlorian Fainelli } 32198cd1552SFlorian Fainelli module_init(dsa_loop_init); 32298cd1552SFlorian Fainelli 32398cd1552SFlorian Fainelli static void __exit dsa_loop_exit(void) 32498cd1552SFlorian Fainelli { 3253407dc8eSFlorian Fainelli unsigned int i; 3263407dc8eSFlorian Fainelli 32798cd1552SFlorian Fainelli mdio_driver_unregister(&dsa_loop_drv); 3283407dc8eSFlorian Fainelli for (i = 0; i < NUM_FIXED_PHYS; i++) 3296d9c153aSFlorian Fainelli if (!IS_ERR(phydevs[i])) 3303407dc8eSFlorian Fainelli fixed_phy_unregister(phydevs[i]); 33198cd1552SFlorian Fainelli } 33298cd1552SFlorian Fainelli module_exit(dsa_loop_exit); 33398cd1552SFlorian Fainelli 3343047211cSFlorian Fainelli MODULE_SOFTDEP("pre: dsa_loop_bdinfo"); 33598cd1552SFlorian Fainelli MODULE_LICENSE("GPL"); 33698cd1552SFlorian Fainelli MODULE_AUTHOR("Florian Fainelli"); 33798cd1552SFlorian Fainelli MODULE_DESCRIPTION("DSA loopback driver"); 338