12874c5fdSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later 298cd1552SFlorian Fainelli /* 398cd1552SFlorian Fainelli * Distributed Switch Architecture loopback driver 498cd1552SFlorian Fainelli * 598cd1552SFlorian Fainelli * Copyright (C) 2016, Florian Fainelli <f.fainelli@gmail.com> 698cd1552SFlorian Fainelli */ 798cd1552SFlorian Fainelli 898cd1552SFlorian Fainelli #include <linux/platform_device.h> 998cd1552SFlorian Fainelli #include <linux/netdevice.h> 1098cd1552SFlorian Fainelli #include <linux/phy.h> 1198cd1552SFlorian Fainelli #include <linux/phy_fixed.h> 1298cd1552SFlorian Fainelli #include <linux/export.h> 13484c0172SFlorian Fainelli #include <linux/ethtool.h> 1498cd1552SFlorian Fainelli #include <linux/workqueue.h> 1598cd1552SFlorian Fainelli #include <linux/module.h> 1698cd1552SFlorian Fainelli #include <linux/if_bridge.h> 176c84a589SFlorian Fainelli #include <linux/dsa/loop.h> 1898cd1552SFlorian Fainelli #include <net/dsa.h> 1998cd1552SFlorian Fainelli 2098cd1552SFlorian Fainelli #include "dsa_loop.h" 2198cd1552SFlorian Fainelli 22484c0172SFlorian Fainelli static struct dsa_loop_mib_entry dsa_loop_mibs[] = { 23484c0172SFlorian Fainelli [DSA_LOOP_PHY_READ_OK] = { "phy_read_ok", }, 24484c0172SFlorian Fainelli [DSA_LOOP_PHY_READ_ERR] = { "phy_read_err", }, 25484c0172SFlorian Fainelli [DSA_LOOP_PHY_WRITE_OK] = { "phy_write_ok", }, 26484c0172SFlorian Fainelli [DSA_LOOP_PHY_WRITE_ERR] = { "phy_write_err", }, 27484c0172SFlorian Fainelli }; 28484c0172SFlorian Fainelli 2998cd1552SFlorian Fainelli static struct phy_device *phydevs[PHY_MAX_ADDR]; 3098cd1552SFlorian Fainelli 31142061ebSFlorian Fainelli enum dsa_loop_devlink_resource_id { 32142061ebSFlorian Fainelli DSA_LOOP_DEVLINK_PARAM_ID_VTU, 33142061ebSFlorian Fainelli }; 34142061ebSFlorian Fainelli 35142061ebSFlorian Fainelli static u64 dsa_loop_devlink_vtu_get(void *priv) 36142061ebSFlorian Fainelli { 37142061ebSFlorian Fainelli struct dsa_loop_priv *ps = priv; 38142061ebSFlorian Fainelli unsigned int i, count = 0; 39142061ebSFlorian Fainelli struct dsa_loop_vlan *vl; 40142061ebSFlorian Fainelli 41142061ebSFlorian Fainelli for (i = 0; i < ARRAY_SIZE(ps->vlans); i++) { 42142061ebSFlorian Fainelli vl = &ps->vlans[i]; 43142061ebSFlorian Fainelli if (vl->members) 44142061ebSFlorian Fainelli count++; 45142061ebSFlorian Fainelli } 46142061ebSFlorian Fainelli 47142061ebSFlorian Fainelli return count; 48142061ebSFlorian Fainelli } 49142061ebSFlorian Fainelli 50142061ebSFlorian Fainelli static int dsa_loop_setup_devlink_resources(struct dsa_switch *ds) 51142061ebSFlorian Fainelli { 52142061ebSFlorian Fainelli struct devlink_resource_size_params size_params; 53142061ebSFlorian Fainelli struct dsa_loop_priv *ps = ds->priv; 54142061ebSFlorian Fainelli int err; 55142061ebSFlorian Fainelli 56142061ebSFlorian Fainelli devlink_resource_size_params_init(&size_params, ARRAY_SIZE(ps->vlans), 57142061ebSFlorian Fainelli ARRAY_SIZE(ps->vlans), 58142061ebSFlorian Fainelli 1, DEVLINK_RESOURCE_UNIT_ENTRY); 59142061ebSFlorian Fainelli 60142061ebSFlorian Fainelli err = dsa_devlink_resource_register(ds, "VTU", ARRAY_SIZE(ps->vlans), 61142061ebSFlorian Fainelli DSA_LOOP_DEVLINK_PARAM_ID_VTU, 62142061ebSFlorian Fainelli DEVLINK_RESOURCE_ID_PARENT_TOP, 63142061ebSFlorian Fainelli &size_params); 64142061ebSFlorian Fainelli if (err) 65142061ebSFlorian Fainelli goto out; 66142061ebSFlorian Fainelli 67142061ebSFlorian Fainelli dsa_devlink_resource_occ_get_register(ds, 68142061ebSFlorian Fainelli DSA_LOOP_DEVLINK_PARAM_ID_VTU, 69142061ebSFlorian Fainelli dsa_loop_devlink_vtu_get, ps); 70142061ebSFlorian Fainelli 71142061ebSFlorian Fainelli return 0; 72142061ebSFlorian Fainelli 73142061ebSFlorian Fainelli out: 74142061ebSFlorian Fainelli dsa_devlink_resources_unregister(ds); 75142061ebSFlorian Fainelli return err; 76142061ebSFlorian Fainelli } 77142061ebSFlorian Fainelli 785ed4e3ebSFlorian Fainelli static enum dsa_tag_protocol dsa_loop_get_protocol(struct dsa_switch *ds, 794d776482SFlorian Fainelli int port, 804d776482SFlorian Fainelli enum dsa_tag_protocol mp) 8198cd1552SFlorian Fainelli { 82e52cde71SFlorian Fainelli dev_dbg(ds->dev, "%s: port: %d\n", __func__, port); 8398cd1552SFlorian Fainelli 8498cd1552SFlorian Fainelli return DSA_TAG_PROTO_NONE; 8598cd1552SFlorian Fainelli } 8698cd1552SFlorian Fainelli 8798cd1552SFlorian Fainelli static int dsa_loop_setup(struct dsa_switch *ds) 8898cd1552SFlorian Fainelli { 89484c0172SFlorian Fainelli struct dsa_loop_priv *ps = ds->priv; 90484c0172SFlorian Fainelli unsigned int i; 91484c0172SFlorian Fainelli 92484c0172SFlorian Fainelli for (i = 0; i < ds->num_ports; i++) 93484c0172SFlorian Fainelli memcpy(ps->ports[i].mib, dsa_loop_mibs, 94484c0172SFlorian Fainelli sizeof(dsa_loop_mibs)); 95484c0172SFlorian Fainelli 9698cd1552SFlorian Fainelli dev_dbg(ds->dev, "%s\n", __func__); 9798cd1552SFlorian Fainelli 98142061ebSFlorian Fainelli return dsa_loop_setup_devlink_resources(ds); 99142061ebSFlorian Fainelli } 100142061ebSFlorian Fainelli 101142061ebSFlorian Fainelli static void dsa_loop_teardown(struct dsa_switch *ds) 102142061ebSFlorian Fainelli { 103142061ebSFlorian Fainelli dsa_devlink_resources_unregister(ds); 10498cd1552SFlorian Fainelli } 10598cd1552SFlorian Fainelli 10689f09048SFlorian Fainelli static int dsa_loop_get_sset_count(struct dsa_switch *ds, int port, int sset) 107484c0172SFlorian Fainelli { 10896cbddcdSFlorian Fainelli if (sset != ETH_SS_STATS && sset != ETH_SS_PHY_STATS) 10989f09048SFlorian Fainelli return 0; 11089f09048SFlorian Fainelli 111484c0172SFlorian Fainelli return __DSA_LOOP_CNT_MAX; 112484c0172SFlorian Fainelli } 113484c0172SFlorian Fainelli 11489f09048SFlorian Fainelli static void dsa_loop_get_strings(struct dsa_switch *ds, int port, 11589f09048SFlorian Fainelli u32 stringset, uint8_t *data) 116484c0172SFlorian Fainelli { 117484c0172SFlorian Fainelli struct dsa_loop_priv *ps = ds->priv; 118484c0172SFlorian Fainelli unsigned int i; 119484c0172SFlorian Fainelli 12096cbddcdSFlorian Fainelli if (stringset != ETH_SS_STATS && stringset != ETH_SS_PHY_STATS) 12189f09048SFlorian Fainelli return; 12289f09048SFlorian Fainelli 123484c0172SFlorian Fainelli for (i = 0; i < __DSA_LOOP_CNT_MAX; i++) 124484c0172SFlorian Fainelli memcpy(data + i * ETH_GSTRING_LEN, 125484c0172SFlorian Fainelli ps->ports[port].mib[i].name, ETH_GSTRING_LEN); 126484c0172SFlorian Fainelli } 127484c0172SFlorian Fainelli 128484c0172SFlorian Fainelli static void dsa_loop_get_ethtool_stats(struct dsa_switch *ds, int port, 129484c0172SFlorian Fainelli uint64_t *data) 130484c0172SFlorian Fainelli { 131484c0172SFlorian Fainelli struct dsa_loop_priv *ps = ds->priv; 132484c0172SFlorian Fainelli unsigned int i; 133484c0172SFlorian Fainelli 134484c0172SFlorian Fainelli for (i = 0; i < __DSA_LOOP_CNT_MAX; i++) 135484c0172SFlorian Fainelli data[i] = ps->ports[port].mib[i].val; 136484c0172SFlorian Fainelli } 137484c0172SFlorian Fainelli 13898cd1552SFlorian Fainelli static int dsa_loop_phy_read(struct dsa_switch *ds, int port, int regnum) 13998cd1552SFlorian Fainelli { 14098cd1552SFlorian Fainelli struct dsa_loop_priv *ps = ds->priv; 14198cd1552SFlorian Fainelli struct mii_bus *bus = ps->bus; 142484c0172SFlorian Fainelli int ret; 14398cd1552SFlorian Fainelli 144484c0172SFlorian Fainelli ret = mdiobus_read_nested(bus, ps->port_base + port, regnum); 145484c0172SFlorian Fainelli if (ret < 0) 146484c0172SFlorian Fainelli ps->ports[port].mib[DSA_LOOP_PHY_READ_ERR].val++; 147484c0172SFlorian Fainelli else 148484c0172SFlorian Fainelli ps->ports[port].mib[DSA_LOOP_PHY_READ_OK].val++; 149484c0172SFlorian Fainelli 150484c0172SFlorian Fainelli return ret; 15198cd1552SFlorian Fainelli } 15298cd1552SFlorian Fainelli 15398cd1552SFlorian Fainelli static int dsa_loop_phy_write(struct dsa_switch *ds, int port, 15498cd1552SFlorian Fainelli int regnum, u16 value) 15598cd1552SFlorian Fainelli { 15698cd1552SFlorian Fainelli struct dsa_loop_priv *ps = ds->priv; 15798cd1552SFlorian Fainelli struct mii_bus *bus = ps->bus; 158484c0172SFlorian Fainelli int ret; 15998cd1552SFlorian Fainelli 160484c0172SFlorian Fainelli ret = mdiobus_write_nested(bus, ps->port_base + port, regnum, value); 161484c0172SFlorian Fainelli if (ret < 0) 162484c0172SFlorian Fainelli ps->ports[port].mib[DSA_LOOP_PHY_WRITE_ERR].val++; 163484c0172SFlorian Fainelli else 164484c0172SFlorian Fainelli ps->ports[port].mib[DSA_LOOP_PHY_WRITE_OK].val++; 165484c0172SFlorian Fainelli 166484c0172SFlorian Fainelli return ret; 16798cd1552SFlorian Fainelli } 16898cd1552SFlorian Fainelli 16998cd1552SFlorian Fainelli static int dsa_loop_port_bridge_join(struct dsa_switch *ds, int port, 17098cd1552SFlorian Fainelli struct net_device *bridge) 17198cd1552SFlorian Fainelli { 172e52cde71SFlorian Fainelli dev_dbg(ds->dev, "%s: port: %d, bridge: %s\n", 173e52cde71SFlorian Fainelli __func__, port, bridge->name); 17498cd1552SFlorian Fainelli 17598cd1552SFlorian Fainelli return 0; 17698cd1552SFlorian Fainelli } 17798cd1552SFlorian Fainelli 17898cd1552SFlorian Fainelli static void dsa_loop_port_bridge_leave(struct dsa_switch *ds, int port, 17998cd1552SFlorian Fainelli struct net_device *bridge) 18098cd1552SFlorian Fainelli { 181e52cde71SFlorian Fainelli dev_dbg(ds->dev, "%s: port: %d, bridge: %s\n", 182e52cde71SFlorian Fainelli __func__, port, bridge->name); 18398cd1552SFlorian Fainelli } 18498cd1552SFlorian Fainelli 18598cd1552SFlorian Fainelli static void dsa_loop_port_stp_state_set(struct dsa_switch *ds, int port, 18698cd1552SFlorian Fainelli u8 state) 18798cd1552SFlorian Fainelli { 188e52cde71SFlorian Fainelli dev_dbg(ds->dev, "%s: port: %d, state: %d\n", 189e52cde71SFlorian Fainelli __func__, port, state); 19098cd1552SFlorian Fainelli } 19198cd1552SFlorian Fainelli 19298cd1552SFlorian Fainelli static int dsa_loop_port_vlan_filtering(struct dsa_switch *ds, int port, 193bae33f2bSVladimir Oltean bool vlan_filtering) 19498cd1552SFlorian Fainelli { 195e52cde71SFlorian Fainelli dev_dbg(ds->dev, "%s: port: %d, vlan_filtering: %d\n", 196e52cde71SFlorian Fainelli __func__, port, vlan_filtering); 19798cd1552SFlorian Fainelli 19898cd1552SFlorian Fainelli return 0; 19998cd1552SFlorian Fainelli } 20098cd1552SFlorian Fainelli 2011958d581SVladimir Oltean static int dsa_loop_port_vlan_add(struct dsa_switch *ds, int port, 202*31046a5fSVladimir Oltean const struct switchdev_obj_port_vlan *vlan, 203*31046a5fSVladimir Oltean struct netlink_ext_ack *extack) 20498cd1552SFlorian Fainelli { 20598cd1552SFlorian Fainelli bool untagged = vlan->flags & BRIDGE_VLAN_INFO_UNTAGGED; 20698cd1552SFlorian Fainelli bool pvid = vlan->flags & BRIDGE_VLAN_INFO_PVID; 20798cd1552SFlorian Fainelli struct dsa_loop_priv *ps = ds->priv; 20898cd1552SFlorian Fainelli struct mii_bus *bus = ps->bus; 20998cd1552SFlorian Fainelli struct dsa_loop_vlan *vl; 21098cd1552SFlorian Fainelli 211646188c9SDan Carpenter if (vlan->vid >= ARRAY_SIZE(ps->vlans)) 2121958d581SVladimir Oltean return -ERANGE; 2131958d581SVladimir Oltean 21498cd1552SFlorian Fainelli /* Just do a sleeping operation to make lockdep checks effective */ 21598cd1552SFlorian Fainelli mdiobus_read(bus, ps->port_base + port, MII_BMSR); 21698cd1552SFlorian Fainelli 217b7a9e0daSVladimir Oltean vl = &ps->vlans[vlan->vid]; 21898cd1552SFlorian Fainelli 21998cd1552SFlorian Fainelli vl->members |= BIT(port); 22098cd1552SFlorian Fainelli if (untagged) 22198cd1552SFlorian Fainelli vl->untagged |= BIT(port); 22298cd1552SFlorian Fainelli else 22398cd1552SFlorian Fainelli vl->untagged &= ~BIT(port); 224e52cde71SFlorian Fainelli 225e52cde71SFlorian Fainelli dev_dbg(ds->dev, "%s: port: %d vlan: %d, %stagged, pvid: %d\n", 226b7a9e0daSVladimir Oltean __func__, port, vlan->vid, untagged ? "un" : "", pvid); 22798cd1552SFlorian Fainelli 22898cd1552SFlorian Fainelli if (pvid) 229b7a9e0daSVladimir Oltean ps->ports[port].pvid = vlan->vid; 2301958d581SVladimir Oltean 2311958d581SVladimir Oltean return 0; 23298cd1552SFlorian Fainelli } 23398cd1552SFlorian Fainelli 23498cd1552SFlorian Fainelli static int dsa_loop_port_vlan_del(struct dsa_switch *ds, int port, 23598cd1552SFlorian Fainelli const struct switchdev_obj_port_vlan *vlan) 23698cd1552SFlorian Fainelli { 23798cd1552SFlorian Fainelli bool untagged = vlan->flags & BRIDGE_VLAN_INFO_UNTAGGED; 23898cd1552SFlorian Fainelli struct dsa_loop_priv *ps = ds->priv; 239b7a9e0daSVladimir Oltean u16 pvid = ps->ports[port].pvid; 24098cd1552SFlorian Fainelli struct mii_bus *bus = ps->bus; 24198cd1552SFlorian Fainelli struct dsa_loop_vlan *vl; 24298cd1552SFlorian Fainelli 24398cd1552SFlorian Fainelli /* Just do a sleeping operation to make lockdep checks effective */ 24498cd1552SFlorian Fainelli mdiobus_read(bus, ps->port_base + port, MII_BMSR); 24598cd1552SFlorian Fainelli 246b7a9e0daSVladimir Oltean vl = &ps->vlans[vlan->vid]; 24798cd1552SFlorian Fainelli 24898cd1552SFlorian Fainelli vl->members &= ~BIT(port); 24998cd1552SFlorian Fainelli if (untagged) 25098cd1552SFlorian Fainelli vl->untagged &= ~BIT(port); 25198cd1552SFlorian Fainelli 252b7a9e0daSVladimir Oltean if (pvid == vlan->vid) 25398cd1552SFlorian Fainelli pvid = 1; 254e52cde71SFlorian Fainelli 255e52cde71SFlorian Fainelli dev_dbg(ds->dev, "%s: port: %d vlan: %d, %stagged, pvid: %d\n", 256b7a9e0daSVladimir Oltean __func__, port, vlan->vid, untagged ? "un" : "", pvid); 25781d4e8e0SFlorian Fainelli ps->ports[port].pvid = pvid; 25898cd1552SFlorian Fainelli 25998cd1552SFlorian Fainelli return 0; 26098cd1552SFlorian Fainelli } 26198cd1552SFlorian Fainelli 262c99194edSFlorian Fainelli static int dsa_loop_port_change_mtu(struct dsa_switch *ds, int port, 263c99194edSFlorian Fainelli int new_mtu) 264c99194edSFlorian Fainelli { 265c99194edSFlorian Fainelli struct dsa_loop_priv *priv = ds->priv; 266c99194edSFlorian Fainelli 267c99194edSFlorian Fainelli priv->ports[port].mtu = new_mtu; 268c99194edSFlorian Fainelli 269c99194edSFlorian Fainelli return 0; 270c99194edSFlorian Fainelli } 271c99194edSFlorian Fainelli 272c99194edSFlorian Fainelli static int dsa_loop_port_max_mtu(struct dsa_switch *ds, int port) 273c99194edSFlorian Fainelli { 274c99194edSFlorian Fainelli return ETH_MAX_MTU; 275c99194edSFlorian Fainelli } 276c99194edSFlorian Fainelli 277d78d6776SBhumika Goyal static const struct dsa_switch_ops dsa_loop_driver = { 27898cd1552SFlorian Fainelli .get_tag_protocol = dsa_loop_get_protocol, 27998cd1552SFlorian Fainelli .setup = dsa_loop_setup, 280142061ebSFlorian Fainelli .teardown = dsa_loop_teardown, 281484c0172SFlorian Fainelli .get_strings = dsa_loop_get_strings, 282484c0172SFlorian Fainelli .get_ethtool_stats = dsa_loop_get_ethtool_stats, 283484c0172SFlorian Fainelli .get_sset_count = dsa_loop_get_sset_count, 28496cbddcdSFlorian Fainelli .get_ethtool_phy_stats = dsa_loop_get_ethtool_stats, 28598cd1552SFlorian Fainelli .phy_read = dsa_loop_phy_read, 28698cd1552SFlorian Fainelli .phy_write = dsa_loop_phy_write, 28798cd1552SFlorian Fainelli .port_bridge_join = dsa_loop_port_bridge_join, 28898cd1552SFlorian Fainelli .port_bridge_leave = dsa_loop_port_bridge_leave, 28998cd1552SFlorian Fainelli .port_stp_state_set = dsa_loop_port_stp_state_set, 29098cd1552SFlorian Fainelli .port_vlan_filtering = dsa_loop_port_vlan_filtering, 29198cd1552SFlorian Fainelli .port_vlan_add = dsa_loop_port_vlan_add, 29298cd1552SFlorian Fainelli .port_vlan_del = dsa_loop_port_vlan_del, 293c99194edSFlorian Fainelli .port_change_mtu = dsa_loop_port_change_mtu, 294c99194edSFlorian Fainelli .port_max_mtu = dsa_loop_port_max_mtu, 29598cd1552SFlorian Fainelli }; 29698cd1552SFlorian Fainelli 29798cd1552SFlorian Fainelli static int dsa_loop_drv_probe(struct mdio_device *mdiodev) 29898cd1552SFlorian Fainelli { 29998cd1552SFlorian Fainelli struct dsa_loop_pdata *pdata = mdiodev->dev.platform_data; 30098cd1552SFlorian Fainelli struct dsa_loop_priv *ps; 30198cd1552SFlorian Fainelli struct dsa_switch *ds; 30293165ecbSFlorian Fainelli int ret; 30398cd1552SFlorian Fainelli 30498cd1552SFlorian Fainelli if (!pdata) 30598cd1552SFlorian Fainelli return -ENODEV; 30698cd1552SFlorian Fainelli 3077e99e347SVivien Didelot ds = devm_kzalloc(&mdiodev->dev, sizeof(*ds), GFP_KERNEL); 30898cd1552SFlorian Fainelli if (!ds) 30998cd1552SFlorian Fainelli return -ENOMEM; 31098cd1552SFlorian Fainelli 3117e99e347SVivien Didelot ds->dev = &mdiodev->dev; 312947b6ef9SFlorian Fainelli ds->num_ports = DSA_LOOP_NUM_PORTS; 3137e99e347SVivien Didelot 31498cd1552SFlorian Fainelli ps = devm_kzalloc(&mdiodev->dev, sizeof(*ps), GFP_KERNEL); 3158ce7aaaaSChristophe Jaillet if (!ps) 3168ce7aaaaSChristophe Jaillet return -ENOMEM; 3178ce7aaaaSChristophe Jaillet 31898cd1552SFlorian Fainelli ps->netdev = dev_get_by_name(&init_net, pdata->netdev); 31998cd1552SFlorian Fainelli if (!ps->netdev) 32098cd1552SFlorian Fainelli return -EPROBE_DEFER; 32198cd1552SFlorian Fainelli 32298cd1552SFlorian Fainelli pdata->cd.netdev[DSA_LOOP_CPU_PORT] = &ps->netdev->dev; 32398cd1552SFlorian Fainelli 32498cd1552SFlorian Fainelli ds->dev = &mdiodev->dev; 32598cd1552SFlorian Fainelli ds->ops = &dsa_loop_driver; 32698cd1552SFlorian Fainelli ds->priv = ps; 32798cd1552SFlorian Fainelli ps->bus = mdiodev->bus; 32898cd1552SFlorian Fainelli 32998cd1552SFlorian Fainelli dev_set_drvdata(&mdiodev->dev, ds); 33098cd1552SFlorian Fainelli 33193165ecbSFlorian Fainelli ret = dsa_register_switch(ds); 33293165ecbSFlorian Fainelli if (!ret) 33393165ecbSFlorian Fainelli dev_info(&mdiodev->dev, "%s: 0x%0x\n", 33493165ecbSFlorian Fainelli pdata->name, pdata->enabled_ports); 33593165ecbSFlorian Fainelli 33693165ecbSFlorian Fainelli return ret; 33798cd1552SFlorian Fainelli } 33898cd1552SFlorian Fainelli 33998cd1552SFlorian Fainelli static void dsa_loop_drv_remove(struct mdio_device *mdiodev) 34098cd1552SFlorian Fainelli { 34198cd1552SFlorian Fainelli struct dsa_switch *ds = dev_get_drvdata(&mdiodev->dev); 34298cd1552SFlorian Fainelli struct dsa_loop_priv *ps = ds->priv; 34398cd1552SFlorian Fainelli 34498cd1552SFlorian Fainelli dsa_unregister_switch(ds); 34598cd1552SFlorian Fainelli dev_put(ps->netdev); 34698cd1552SFlorian Fainelli } 34798cd1552SFlorian Fainelli 34898cd1552SFlorian Fainelli static struct mdio_driver dsa_loop_drv = { 34998cd1552SFlorian Fainelli .mdiodrv.driver = { 35098cd1552SFlorian Fainelli .name = "dsa-loop", 35198cd1552SFlorian Fainelli }, 35298cd1552SFlorian Fainelli .probe = dsa_loop_drv_probe, 35398cd1552SFlorian Fainelli .remove = dsa_loop_drv_remove, 35498cd1552SFlorian Fainelli }; 35598cd1552SFlorian Fainelli 35698cd1552SFlorian Fainelli #define NUM_FIXED_PHYS (DSA_LOOP_NUM_PORTS - 2) 35798cd1552SFlorian Fainelli 35898cd1552SFlorian Fainelli static int __init dsa_loop_init(void) 35998cd1552SFlorian Fainelli { 36098cd1552SFlorian Fainelli struct fixed_phy_status status = { 36198cd1552SFlorian Fainelli .link = 1, 36298cd1552SFlorian Fainelli .speed = SPEED_100, 36398cd1552SFlorian Fainelli .duplex = DUPLEX_FULL, 36498cd1552SFlorian Fainelli }; 36598cd1552SFlorian Fainelli unsigned int i; 36698cd1552SFlorian Fainelli 36798cd1552SFlorian Fainelli for (i = 0; i < NUM_FIXED_PHYS; i++) 3685468e82fSLinus Walleij phydevs[i] = fixed_phy_register(PHY_POLL, &status, NULL); 36998cd1552SFlorian Fainelli 37098cd1552SFlorian Fainelli return mdio_driver_register(&dsa_loop_drv); 37198cd1552SFlorian Fainelli } 37298cd1552SFlorian Fainelli module_init(dsa_loop_init); 37398cd1552SFlorian Fainelli 37498cd1552SFlorian Fainelli static void __exit dsa_loop_exit(void) 37598cd1552SFlorian Fainelli { 3763407dc8eSFlorian Fainelli unsigned int i; 3773407dc8eSFlorian Fainelli 37898cd1552SFlorian Fainelli mdio_driver_unregister(&dsa_loop_drv); 3793407dc8eSFlorian Fainelli for (i = 0; i < NUM_FIXED_PHYS; i++) 3806d9c153aSFlorian Fainelli if (!IS_ERR(phydevs[i])) 3813407dc8eSFlorian Fainelli fixed_phy_unregister(phydevs[i]); 38298cd1552SFlorian Fainelli } 38398cd1552SFlorian Fainelli module_exit(dsa_loop_exit); 38498cd1552SFlorian Fainelli 3853047211cSFlorian Fainelli MODULE_SOFTDEP("pre: dsa_loop_bdinfo"); 38698cd1552SFlorian Fainelli MODULE_LICENSE("GPL"); 38798cd1552SFlorian Fainelli MODULE_AUTHOR("Florian Fainelli"); 38898cd1552SFlorian Fainelli MODULE_DESCRIPTION("DSA loopback driver"); 389