1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Copyright (C) 2005 Sascha Hauer, Pengutronix
4  * Copyright (C) 2007 Wolfgang Grandegger <wg@grandegger.com>
5  */
6 
7 #include <linux/kernel.h>
8 #include <linux/module.h>
9 #include <linux/interrupt.h>
10 #include <linux/netdevice.h>
11 #include <linux/delay.h>
12 #include <linux/pci.h>
13 #include <linux/platform_device.h>
14 #include <linux/irq.h>
15 #include <linux/can/dev.h>
16 #include <linux/can/platform/sja1000.h>
17 #include <linux/clk.h>
18 #include <linux/io.h>
19 #include <linux/of.h>
20 #include <linux/of_device.h>
21 
22 #include "sja1000.h"
23 
24 #define DRV_NAME "sja1000_platform"
25 #define SP_CAN_CLOCK  (16000000 / 2)
26 
27 MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>");
28 MODULE_AUTHOR("Wolfgang Grandegger <wg@grandegger.com>");
29 MODULE_DESCRIPTION("Socket-CAN driver for SJA1000 on the platform bus");
30 MODULE_ALIAS("platform:" DRV_NAME);
31 MODULE_LICENSE("GPL v2");
32 
33 struct sja1000_of_data {
34 	size_t  priv_sz;
35 	void    (*init)(struct sja1000_priv *priv, struct device_node *of);
36 };
37 
38 struct technologic_priv {
39 	spinlock_t      io_lock;
40 };
41 
42 static u8 sp_read_reg8(const struct sja1000_priv *priv, int reg)
43 {
44 	return ioread8(priv->reg_base + reg);
45 }
46 
47 static void sp_write_reg8(const struct sja1000_priv *priv, int reg, u8 val)
48 {
49 	iowrite8(val, priv->reg_base + reg);
50 }
51 
52 static u8 sp_read_reg16(const struct sja1000_priv *priv, int reg)
53 {
54 	return ioread8(priv->reg_base + reg * 2);
55 }
56 
57 static void sp_write_reg16(const struct sja1000_priv *priv, int reg, u8 val)
58 {
59 	iowrite8(val, priv->reg_base + reg * 2);
60 }
61 
62 static u8 sp_read_reg32(const struct sja1000_priv *priv, int reg)
63 {
64 	return ioread8(priv->reg_base + reg * 4);
65 }
66 
67 static void sp_write_reg32(const struct sja1000_priv *priv, int reg, u8 val)
68 {
69 	iowrite8(val, priv->reg_base + reg * 4);
70 }
71 
72 static u8 sp_technologic_read_reg16(const struct sja1000_priv *priv, int reg)
73 {
74 	struct technologic_priv *tp = priv->priv;
75 	unsigned long flags;
76 	u8 val;
77 
78 	spin_lock_irqsave(&tp->io_lock, flags);
79 	iowrite16(reg, priv->reg_base + 0);
80 	val = ioread16(priv->reg_base + 2);
81 	spin_unlock_irqrestore(&tp->io_lock, flags);
82 
83 	return val;
84 }
85 
86 static void sp_technologic_write_reg16(const struct sja1000_priv *priv,
87 				       int reg, u8 val)
88 {
89 	struct technologic_priv *tp = priv->priv;
90 	unsigned long flags;
91 
92 	spin_lock_irqsave(&tp->io_lock, flags);
93 	iowrite16(reg, priv->reg_base + 0);
94 	iowrite16(val, priv->reg_base + 2);
95 	spin_unlock_irqrestore(&tp->io_lock, flags);
96 }
97 
98 static void sp_technologic_init(struct sja1000_priv *priv, struct device_node *of)
99 {
100 	struct technologic_priv *tp = priv->priv;
101 
102 	priv->read_reg = sp_technologic_read_reg16;
103 	priv->write_reg = sp_technologic_write_reg16;
104 	spin_lock_init(&tp->io_lock);
105 }
106 
107 static void sp_rzn1_init(struct sja1000_priv *priv, struct device_node *of)
108 {
109 	priv->flags = SJA1000_QUIRK_NO_CDR_REG | SJA1000_QUIRK_RESET_ON_OVERRUN;
110 }
111 
112 static void sp_populate(struct sja1000_priv *priv,
113 			struct sja1000_platform_data *pdata,
114 			unsigned long resource_mem_flags)
115 {
116 	/* The CAN clock frequency is half the oscillator clock frequency */
117 	priv->can.clock.freq = pdata->osc_freq / 2;
118 	priv->ocr = pdata->ocr;
119 	priv->cdr = pdata->cdr;
120 
121 	switch (resource_mem_flags & IORESOURCE_MEM_TYPE_MASK) {
122 	case IORESOURCE_MEM_32BIT:
123 		priv->read_reg = sp_read_reg32;
124 		priv->write_reg = sp_write_reg32;
125 		break;
126 	case IORESOURCE_MEM_16BIT:
127 		priv->read_reg = sp_read_reg16;
128 		priv->write_reg = sp_write_reg16;
129 		break;
130 	case IORESOURCE_MEM_8BIT:
131 	default:
132 		priv->read_reg = sp_read_reg8;
133 		priv->write_reg = sp_write_reg8;
134 		break;
135 	}
136 }
137 
138 static void sp_populate_of(struct sja1000_priv *priv, struct device_node *of)
139 {
140 	int err;
141 	u32 prop;
142 
143 	err = of_property_read_u32(of, "reg-io-width", &prop);
144 	if (err)
145 		prop = 1; /* 8 bit is default */
146 
147 	switch (prop) {
148 	case 4:
149 		priv->read_reg = sp_read_reg32;
150 		priv->write_reg = sp_write_reg32;
151 		break;
152 	case 2:
153 		priv->read_reg = sp_read_reg16;
154 		priv->write_reg = sp_write_reg16;
155 		break;
156 	case 1:
157 	default:
158 		priv->read_reg = sp_read_reg8;
159 		priv->write_reg = sp_write_reg8;
160 	}
161 
162 	if (!priv->can.clock.freq) {
163 		err = of_property_read_u32(of, "nxp,external-clock-frequency", &prop);
164 		if (!err)
165 			priv->can.clock.freq = prop / 2;
166 		else
167 			priv->can.clock.freq = SP_CAN_CLOCK; /* default */
168 	}
169 
170 	err = of_property_read_u32(of, "nxp,tx-output-mode", &prop);
171 	if (!err)
172 		priv->ocr |= prop & OCR_MODE_MASK;
173 	else
174 		priv->ocr |= OCR_MODE_NORMAL; /* default */
175 
176 	err = of_property_read_u32(of, "nxp,tx-output-config", &prop);
177 	if (!err)
178 		priv->ocr |= (prop << OCR_TX_SHIFT) & OCR_TX_MASK;
179 	else
180 		priv->ocr |= OCR_TX0_PULLDOWN; /* default */
181 
182 	err = of_property_read_u32(of, "nxp,clock-out-frequency", &prop);
183 	if (!err && prop) {
184 		u32 divider = priv->can.clock.freq * 2 / prop;
185 
186 		if (divider > 1)
187 			priv->cdr |= divider / 2 - 1;
188 		else
189 			priv->cdr |= CDR_CLKOUT_MASK;
190 	} else {
191 		priv->cdr |= CDR_CLK_OFF; /* default */
192 	}
193 
194 	if (!of_property_read_bool(of, "nxp,no-comparator-bypass"))
195 		priv->cdr |= CDR_CBP; /* default */
196 }
197 
198 static struct sja1000_of_data technologic_data = {
199 	.priv_sz = sizeof(struct technologic_priv),
200 	.init = sp_technologic_init,
201 };
202 
203 static struct sja1000_of_data renesas_data = {
204 	.init = sp_rzn1_init,
205 };
206 
207 static const struct of_device_id sp_of_table[] = {
208 	{ .compatible = "nxp,sja1000", .data = NULL, },
209 	{ .compatible = "renesas,rzn1-sja1000", .data = &renesas_data, },
210 	{ .compatible = "technologic,sja1000", .data = &technologic_data, },
211 	{ /* sentinel */ },
212 };
213 MODULE_DEVICE_TABLE(of, sp_of_table);
214 
215 static int sp_probe(struct platform_device *pdev)
216 {
217 	int err, irq = 0;
218 	void __iomem *addr;
219 	struct net_device *dev;
220 	struct sja1000_priv *priv;
221 	struct resource *res_mem, *res_irq = NULL;
222 	struct sja1000_platform_data *pdata;
223 	struct device_node *of = pdev->dev.of_node;
224 	const struct sja1000_of_data *of_data = NULL;
225 	size_t priv_sz = 0;
226 	struct clk *clk;
227 
228 	pdata = dev_get_platdata(&pdev->dev);
229 	if (!pdata && !of) {
230 		dev_err(&pdev->dev, "No platform data provided!\n");
231 		return -ENODEV;
232 	}
233 
234 	res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
235 	if (!res_mem)
236 		return -ENODEV;
237 
238 	if (!devm_request_mem_region(&pdev->dev, res_mem->start,
239 				     resource_size(res_mem), DRV_NAME))
240 		return -EBUSY;
241 
242 	addr = devm_ioremap(&pdev->dev, res_mem->start,
243 				    resource_size(res_mem));
244 	if (!addr)
245 		return -ENOMEM;
246 
247 	if (of) {
248 		irq = platform_get_irq(pdev, 0);
249 		if (irq < 0)
250 			return irq;
251 
252 		clk = devm_clk_get_optional_enabled(&pdev->dev, NULL);
253 		if (IS_ERR(clk))
254 			return dev_err_probe(&pdev->dev, PTR_ERR(clk),
255 					     "CAN clk operation failed");
256 	} else {
257 		res_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
258 		if (!res_irq)
259 			return -ENODEV;
260 	}
261 
262 	of_data = device_get_match_data(&pdev->dev);
263 	if (of_data)
264 		priv_sz = of_data->priv_sz;
265 
266 	dev = alloc_sja1000dev(priv_sz);
267 	if (!dev)
268 		return -ENOMEM;
269 	priv = netdev_priv(dev);
270 
271 	if (res_irq) {
272 		irq = res_irq->start;
273 		priv->irq_flags = res_irq->flags & IRQF_TRIGGER_MASK;
274 		if (res_irq->flags & IORESOURCE_IRQ_SHAREABLE)
275 			priv->irq_flags |= IRQF_SHARED;
276 	} else {
277 		priv->irq_flags = IRQF_SHARED;
278 	}
279 
280 	if (priv->flags & SJA1000_QUIRK_RESET_ON_OVERRUN)
281 		priv->irq_flags |= IRQF_ONESHOT;
282 
283 	dev->irq = irq;
284 	priv->reg_base = addr;
285 
286 	if (of) {
287 		if (clk) {
288 			priv->can.clock.freq  = clk_get_rate(clk) / 2;
289 			if (!priv->can.clock.freq) {
290 				err = -EINVAL;
291 				dev_err(&pdev->dev, "Zero CAN clk rate");
292 				goto exit_free;
293 			}
294 		}
295 
296 		sp_populate_of(priv, of);
297 
298 		if (of_data && of_data->init)
299 			of_data->init(priv, of);
300 	} else {
301 		sp_populate(priv, pdata, res_mem->flags);
302 	}
303 
304 	platform_set_drvdata(pdev, dev);
305 	SET_NETDEV_DEV(dev, &pdev->dev);
306 
307 	err = register_sja1000dev(dev);
308 	if (err) {
309 		dev_err(&pdev->dev, "registering %s failed (err=%d)\n",
310 			DRV_NAME, err);
311 		goto exit_free;
312 	}
313 
314 	dev_info(&pdev->dev, "%s device registered (reg_base=%p, irq=%d)\n",
315 		 DRV_NAME, priv->reg_base, dev->irq);
316 	return 0;
317 
318  exit_free:
319 	free_sja1000dev(dev);
320 	return err;
321 }
322 
323 static void sp_remove(struct platform_device *pdev)
324 {
325 	struct net_device *dev = platform_get_drvdata(pdev);
326 
327 	unregister_sja1000dev(dev);
328 	free_sja1000dev(dev);
329 }
330 
331 static struct platform_driver sp_driver = {
332 	.probe = sp_probe,
333 	.remove_new = sp_remove,
334 	.driver = {
335 		.name = DRV_NAME,
336 		.of_match_table = sp_of_table,
337 	},
338 };
339 
340 module_platform_driver(sp_driver);
341