1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (C) 2007, 2011 Wolfgang Grandegger <wg@grandegger.com> 4 * Copyright (C) 2012 Stephane Grosjean <s.grosjean@peak-system.com> 5 * 6 * Derived from the PCAN project file driver/src/pcan_pci.c: 7 * 8 * Copyright (C) 2001-2006 PEAK System-Technik GmbH 9 */ 10 11 #include <linux/kernel.h> 12 #include <linux/module.h> 13 #include <linux/interrupt.h> 14 #include <linux/netdevice.h> 15 #include <linux/delay.h> 16 #include <linux/pci.h> 17 #include <linux/io.h> 18 #include <linux/i2c.h> 19 #include <linux/i2c-algo-bit.h> 20 #include <linux/can.h> 21 #include <linux/can/dev.h> 22 23 #include "sja1000.h" 24 25 MODULE_AUTHOR("Stephane Grosjean <s.grosjean@peak-system.com>"); 26 MODULE_DESCRIPTION("Socket-CAN driver for PEAK PCAN PCI family cards"); 27 MODULE_LICENSE("GPL v2"); 28 29 #define DRV_NAME "peak_pci" 30 31 struct peak_pciec_card; 32 struct peak_pci_chan { 33 void __iomem *cfg_base; /* Common for all channels */ 34 struct net_device *prev_dev; /* Chain of network devices */ 35 u16 icr_mask; /* Interrupt mask for fast ack */ 36 struct peak_pciec_card *pciec_card; /* only for PCIeC LEDs */ 37 }; 38 39 #define PEAK_PCI_CAN_CLOCK (16000000 / 2) 40 41 #define PEAK_PCI_CDR (CDR_CBP | CDR_CLKOUT_MASK) 42 #define PEAK_PCI_OCR OCR_TX0_PUSHPULL 43 44 /* 45 * Important PITA registers 46 */ 47 #define PITA_ICR 0x00 /* Interrupt control register */ 48 #define PITA_GPIOICR 0x18 /* GPIO interface control register */ 49 #define PITA_MISC 0x1C /* Miscellaneous register */ 50 51 #define PEAK_PCI_CFG_SIZE 0x1000 /* Size of the config PCI bar */ 52 #define PEAK_PCI_CHAN_SIZE 0x0400 /* Size used by the channel */ 53 54 #define PEAK_PCI_VENDOR_ID 0x001C /* The PCI device and vendor IDs */ 55 #define PEAK_PCI_DEVICE_ID 0x0001 /* for PCI/PCIe slot cards */ 56 #define PEAK_PCIEC_DEVICE_ID 0x0002 /* for ExpressCard slot cards */ 57 #define PEAK_PCIE_DEVICE_ID 0x0003 /* for nextgen PCIe slot cards */ 58 #define PEAK_CPCI_DEVICE_ID 0x0004 /* for nextgen cPCI slot cards */ 59 #define PEAK_MPCI_DEVICE_ID 0x0005 /* for nextgen miniPCI slot cards */ 60 #define PEAK_PC_104P_DEVICE_ID 0x0006 /* PCAN-PC/104+ cards */ 61 #define PEAK_PCI_104E_DEVICE_ID 0x0007 /* PCAN-PCI/104 Express cards */ 62 #define PEAK_MPCIE_DEVICE_ID 0x0008 /* The miniPCIe slot cards */ 63 #define PEAK_PCIE_OEM_ID 0x0009 /* PCAN-PCI Express OEM */ 64 #define PEAK_PCIEC34_DEVICE_ID 0x000A /* PCAN-PCI Express 34 (one channel) */ 65 66 #define PEAK_PCI_CHAN_MAX 4 67 68 static const u16 peak_pci_icr_masks[PEAK_PCI_CHAN_MAX] = { 69 0x02, 0x01, 0x40, 0x80 70 }; 71 72 static const struct pci_device_id peak_pci_tbl[] = { 73 {PEAK_PCI_VENDOR_ID, PEAK_PCI_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,}, 74 {PEAK_PCI_VENDOR_ID, PEAK_PCIE_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,}, 75 {PEAK_PCI_VENDOR_ID, PEAK_MPCI_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,}, 76 {PEAK_PCI_VENDOR_ID, PEAK_MPCIE_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,}, 77 {PEAK_PCI_VENDOR_ID, PEAK_PC_104P_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,}, 78 {PEAK_PCI_VENDOR_ID, PEAK_PCI_104E_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,}, 79 {PEAK_PCI_VENDOR_ID, PEAK_CPCI_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,}, 80 {PEAK_PCI_VENDOR_ID, PEAK_PCIE_OEM_ID, PCI_ANY_ID, PCI_ANY_ID,}, 81 #ifdef CONFIG_CAN_PEAK_PCIEC 82 {PEAK_PCI_VENDOR_ID, PEAK_PCIEC_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,}, 83 {PEAK_PCI_VENDOR_ID, PEAK_PCIEC34_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,}, 84 #endif 85 {0,} 86 }; 87 88 MODULE_DEVICE_TABLE(pci, peak_pci_tbl); 89 90 #ifdef CONFIG_CAN_PEAK_PCIEC 91 /* 92 * PCAN-ExpressCard needs I2C bit-banging configuration option. 93 */ 94 95 /* GPIOICR byte access offsets */ 96 #define PITA_GPOUT 0x18 /* GPx output value */ 97 #define PITA_GPIN 0x19 /* GPx input value */ 98 #define PITA_GPOEN 0x1A /* configure GPx as output pin */ 99 100 /* I2C GP bits */ 101 #define PITA_GPIN_SCL 0x01 /* Serial Clock Line */ 102 #define PITA_GPIN_SDA 0x04 /* Serial DAta line */ 103 104 #define PCA9553_1_SLAVEADDR (0xC4 >> 1) 105 106 /* PCA9553 LS0 fields values */ 107 enum { 108 PCA9553_LOW, 109 PCA9553_HIGHZ, 110 PCA9553_PWM0, 111 PCA9553_PWM1 112 }; 113 114 /* LEDs control */ 115 #define PCA9553_ON PCA9553_LOW 116 #define PCA9553_OFF PCA9553_HIGHZ 117 #define PCA9553_SLOW PCA9553_PWM0 118 #define PCA9553_FAST PCA9553_PWM1 119 120 #define PCA9553_LED(c) (1 << (c)) 121 #define PCA9553_LED_STATE(s, c) ((s) << ((c) << 1)) 122 123 #define PCA9553_LED_ON(c) PCA9553_LED_STATE(PCA9553_ON, c) 124 #define PCA9553_LED_OFF(c) PCA9553_LED_STATE(PCA9553_OFF, c) 125 #define PCA9553_LED_SLOW(c) PCA9553_LED_STATE(PCA9553_SLOW, c) 126 #define PCA9553_LED_FAST(c) PCA9553_LED_STATE(PCA9553_FAST, c) 127 #define PCA9553_LED_MASK(c) PCA9553_LED_STATE(0x03, c) 128 129 #define PCA9553_LED_OFF_ALL (PCA9553_LED_OFF(0) | PCA9553_LED_OFF(1)) 130 131 #define PCA9553_LS0_INIT 0x40 /* initial value (!= from 0x00) */ 132 133 struct peak_pciec_chan { 134 struct net_device *netdev; 135 unsigned long prev_rx_bytes; 136 unsigned long prev_tx_bytes; 137 }; 138 139 struct peak_pciec_card { 140 void __iomem *cfg_base; /* Common for all channels */ 141 void __iomem *reg_base; /* first channel base address */ 142 u8 led_cache; /* leds state cache */ 143 144 /* PCIExpressCard i2c data */ 145 struct i2c_algo_bit_data i2c_bit; 146 struct i2c_adapter led_chip; 147 struct delayed_work led_work; /* led delayed work */ 148 int chan_count; 149 struct peak_pciec_chan channel[PEAK_PCI_CHAN_MAX]; 150 }; 151 152 /* "normal" pci register write callback is overloaded for leds control */ 153 static void peak_pci_write_reg(const struct sja1000_priv *priv, 154 int port, u8 val); 155 156 static inline void pita_set_scl_highz(struct peak_pciec_card *card) 157 { 158 u8 gp_outen = readb(card->cfg_base + PITA_GPOEN) & ~PITA_GPIN_SCL; 159 writeb(gp_outen, card->cfg_base + PITA_GPOEN); 160 } 161 162 static inline void pita_set_sda_highz(struct peak_pciec_card *card) 163 { 164 u8 gp_outen = readb(card->cfg_base + PITA_GPOEN) & ~PITA_GPIN_SDA; 165 writeb(gp_outen, card->cfg_base + PITA_GPOEN); 166 } 167 168 static void peak_pciec_init_pita_gpio(struct peak_pciec_card *card) 169 { 170 /* raise SCL & SDA GPIOs to high-Z */ 171 pita_set_scl_highz(card); 172 pita_set_sda_highz(card); 173 } 174 175 static void pita_setsda(void *data, int state) 176 { 177 struct peak_pciec_card *card = (struct peak_pciec_card *)data; 178 u8 gp_out, gp_outen; 179 180 /* set output sda always to 0 */ 181 gp_out = readb(card->cfg_base + PITA_GPOUT) & ~PITA_GPIN_SDA; 182 writeb(gp_out, card->cfg_base + PITA_GPOUT); 183 184 /* control output sda with GPOEN */ 185 gp_outen = readb(card->cfg_base + PITA_GPOEN); 186 if (state) 187 gp_outen &= ~PITA_GPIN_SDA; 188 else 189 gp_outen |= PITA_GPIN_SDA; 190 191 writeb(gp_outen, card->cfg_base + PITA_GPOEN); 192 } 193 194 static void pita_setscl(void *data, int state) 195 { 196 struct peak_pciec_card *card = (struct peak_pciec_card *)data; 197 u8 gp_out, gp_outen; 198 199 /* set output scl always to 0 */ 200 gp_out = readb(card->cfg_base + PITA_GPOUT) & ~PITA_GPIN_SCL; 201 writeb(gp_out, card->cfg_base + PITA_GPOUT); 202 203 /* control output scl with GPOEN */ 204 gp_outen = readb(card->cfg_base + PITA_GPOEN); 205 if (state) 206 gp_outen &= ~PITA_GPIN_SCL; 207 else 208 gp_outen |= PITA_GPIN_SCL; 209 210 writeb(gp_outen, card->cfg_base + PITA_GPOEN); 211 } 212 213 static int pita_getsda(void *data) 214 { 215 struct peak_pciec_card *card = (struct peak_pciec_card *)data; 216 217 /* set tristate */ 218 pita_set_sda_highz(card); 219 220 return (readb(card->cfg_base + PITA_GPIN) & PITA_GPIN_SDA) ? 1 : 0; 221 } 222 223 static int pita_getscl(void *data) 224 { 225 struct peak_pciec_card *card = (struct peak_pciec_card *)data; 226 227 /* set tristate */ 228 pita_set_scl_highz(card); 229 230 return (readb(card->cfg_base + PITA_GPIN) & PITA_GPIN_SCL) ? 1 : 0; 231 } 232 233 /* 234 * write commands to the LED chip though the I2C-bus of the PCAN-PCIeC 235 */ 236 static int peak_pciec_write_pca9553(struct peak_pciec_card *card, 237 u8 offset, u8 data) 238 { 239 u8 buffer[2] = { 240 offset, 241 data 242 }; 243 struct i2c_msg msg = { 244 .addr = PCA9553_1_SLAVEADDR, 245 .len = 2, 246 .buf = buffer, 247 }; 248 int ret; 249 250 /* cache led mask */ 251 if ((offset == 5) && (data == card->led_cache)) 252 return 0; 253 254 ret = i2c_transfer(&card->led_chip, &msg, 1); 255 if (ret < 0) 256 return ret; 257 258 if (offset == 5) 259 card->led_cache = data; 260 261 return 0; 262 } 263 264 /* 265 * delayed work callback used to control the LEDs 266 */ 267 static void peak_pciec_led_work(struct work_struct *work) 268 { 269 struct peak_pciec_card *card = 270 container_of(work, struct peak_pciec_card, led_work.work); 271 struct net_device *netdev; 272 u8 new_led = card->led_cache; 273 int i, up_count = 0; 274 275 /* first check what is to do */ 276 for (i = 0; i < card->chan_count; i++) { 277 /* default is: not configured */ 278 new_led &= ~PCA9553_LED_MASK(i); 279 new_led |= PCA9553_LED_ON(i); 280 281 netdev = card->channel[i].netdev; 282 if (!netdev || !(netdev->flags & IFF_UP)) 283 continue; 284 285 up_count++; 286 287 /* no activity (but configured) */ 288 new_led &= ~PCA9553_LED_MASK(i); 289 new_led |= PCA9553_LED_SLOW(i); 290 291 /* if bytes counters changed, set fast blinking led */ 292 if (netdev->stats.rx_bytes != card->channel[i].prev_rx_bytes) { 293 card->channel[i].prev_rx_bytes = netdev->stats.rx_bytes; 294 new_led &= ~PCA9553_LED_MASK(i); 295 new_led |= PCA9553_LED_FAST(i); 296 } 297 if (netdev->stats.tx_bytes != card->channel[i].prev_tx_bytes) { 298 card->channel[i].prev_tx_bytes = netdev->stats.tx_bytes; 299 new_led &= ~PCA9553_LED_MASK(i); 300 new_led |= PCA9553_LED_FAST(i); 301 } 302 } 303 304 /* check if LS0 settings changed, only update i2c if so */ 305 peak_pciec_write_pca9553(card, 5, new_led); 306 307 /* restart timer (except if no more configured channels) */ 308 if (up_count) 309 schedule_delayed_work(&card->led_work, HZ); 310 } 311 312 /* 313 * set LEDs blinking state 314 */ 315 static void peak_pciec_set_leds(struct peak_pciec_card *card, u8 led_mask, u8 s) 316 { 317 u8 new_led = card->led_cache; 318 int i; 319 320 /* first check what is to do */ 321 for (i = 0; i < card->chan_count; i++) 322 if (led_mask & PCA9553_LED(i)) { 323 new_led &= ~PCA9553_LED_MASK(i); 324 new_led |= PCA9553_LED_STATE(s, i); 325 } 326 327 /* check if LS0 settings changed, only update i2c if so */ 328 peak_pciec_write_pca9553(card, 5, new_led); 329 } 330 331 /* 332 * start one second delayed work to control LEDs 333 */ 334 static void peak_pciec_start_led_work(struct peak_pciec_card *card) 335 { 336 schedule_delayed_work(&card->led_work, HZ); 337 } 338 339 /* 340 * stop LEDs delayed work 341 */ 342 static void peak_pciec_stop_led_work(struct peak_pciec_card *card) 343 { 344 cancel_delayed_work_sync(&card->led_work); 345 } 346 347 /* 348 * initialize the PCA9553 4-bit I2C-bus LED chip 349 */ 350 static int peak_pciec_init_leds(struct peak_pciec_card *card) 351 { 352 int err; 353 354 /* prescaler for frequency 0: "SLOW" = 1 Hz = "44" */ 355 err = peak_pciec_write_pca9553(card, 1, 44 / 1); 356 if (err) 357 return err; 358 359 /* duty cycle 0: 50% */ 360 err = peak_pciec_write_pca9553(card, 2, 0x80); 361 if (err) 362 return err; 363 364 /* prescaler for frequency 1: "FAST" = 5 Hz */ 365 err = peak_pciec_write_pca9553(card, 3, 44 / 5); 366 if (err) 367 return err; 368 369 /* duty cycle 1: 50% */ 370 err = peak_pciec_write_pca9553(card, 4, 0x80); 371 if (err) 372 return err; 373 374 /* switch LEDs to initial state */ 375 return peak_pciec_write_pca9553(card, 5, PCA9553_LS0_INIT); 376 } 377 378 /* 379 * restore LEDs state to off peak_pciec_leds_exit 380 */ 381 static void peak_pciec_leds_exit(struct peak_pciec_card *card) 382 { 383 /* switch LEDs to off */ 384 peak_pciec_write_pca9553(card, 5, PCA9553_LED_OFF_ALL); 385 } 386 387 /* 388 * normal write sja1000 register method overloaded to catch when controller 389 * is started or stopped, to control leds 390 */ 391 static void peak_pciec_write_reg(const struct sja1000_priv *priv, 392 int port, u8 val) 393 { 394 struct peak_pci_chan *chan = priv->priv; 395 struct peak_pciec_card *card = chan->pciec_card; 396 int c = (priv->reg_base - card->reg_base) / PEAK_PCI_CHAN_SIZE; 397 398 /* sja1000 register changes control the leds state */ 399 if (port == SJA1000_MOD) 400 switch (val) { 401 case MOD_RM: 402 /* Reset Mode: set led on */ 403 peak_pciec_set_leds(card, PCA9553_LED(c), PCA9553_ON); 404 break; 405 case 0x00: 406 /* Normal Mode: led slow blinking and start led timer */ 407 peak_pciec_set_leds(card, PCA9553_LED(c), PCA9553_SLOW); 408 peak_pciec_start_led_work(card); 409 break; 410 default: 411 break; 412 } 413 414 /* call base function */ 415 peak_pci_write_reg(priv, port, val); 416 } 417 418 static const struct i2c_algo_bit_data peak_pciec_i2c_bit_ops = { 419 .setsda = pita_setsda, 420 .setscl = pita_setscl, 421 .getsda = pita_getsda, 422 .getscl = pita_getscl, 423 .udelay = 10, 424 .timeout = HZ, 425 }; 426 427 static int peak_pciec_probe(struct pci_dev *pdev, struct net_device *dev) 428 { 429 struct sja1000_priv *priv = netdev_priv(dev); 430 struct peak_pci_chan *chan = priv->priv; 431 struct peak_pciec_card *card; 432 int err; 433 434 /* copy i2c object address from 1st channel */ 435 if (chan->prev_dev) { 436 struct sja1000_priv *prev_priv = netdev_priv(chan->prev_dev); 437 struct peak_pci_chan *prev_chan = prev_priv->priv; 438 439 card = prev_chan->pciec_card; 440 if (!card) 441 return -ENODEV; 442 443 /* channel is the first one: do the init part */ 444 } else { 445 /* create the bit banging I2C adapter structure */ 446 card = kzalloc(sizeof(struct peak_pciec_card), GFP_KERNEL); 447 if (!card) 448 return -ENOMEM; 449 450 card->cfg_base = chan->cfg_base; 451 card->reg_base = priv->reg_base; 452 453 card->led_chip.owner = THIS_MODULE; 454 card->led_chip.dev.parent = &pdev->dev; 455 card->led_chip.algo_data = &card->i2c_bit; 456 strncpy(card->led_chip.name, "peak_i2c", 457 sizeof(card->led_chip.name)); 458 459 card->i2c_bit = peak_pciec_i2c_bit_ops; 460 card->i2c_bit.udelay = 10; 461 card->i2c_bit.timeout = HZ; 462 card->i2c_bit.data = card; 463 464 peak_pciec_init_pita_gpio(card); 465 466 err = i2c_bit_add_bus(&card->led_chip); 467 if (err) { 468 dev_err(&pdev->dev, "i2c init failed\n"); 469 goto pciec_init_err_1; 470 } 471 472 err = peak_pciec_init_leds(card); 473 if (err) { 474 dev_err(&pdev->dev, "leds hardware init failed\n"); 475 goto pciec_init_err_2; 476 } 477 478 INIT_DELAYED_WORK(&card->led_work, peak_pciec_led_work); 479 /* PCAN-ExpressCard needs its own callback for leds */ 480 priv->write_reg = peak_pciec_write_reg; 481 } 482 483 chan->pciec_card = card; 484 card->channel[card->chan_count++].netdev = dev; 485 486 return 0; 487 488 pciec_init_err_2: 489 i2c_del_adapter(&card->led_chip); 490 491 pciec_init_err_1: 492 peak_pciec_init_pita_gpio(card); 493 kfree(card); 494 495 return err; 496 } 497 498 static void peak_pciec_remove(struct peak_pciec_card *card) 499 { 500 peak_pciec_stop_led_work(card); 501 peak_pciec_leds_exit(card); 502 i2c_del_adapter(&card->led_chip); 503 peak_pciec_init_pita_gpio(card); 504 kfree(card); 505 } 506 507 #else /* CONFIG_CAN_PEAK_PCIEC */ 508 509 /* 510 * Placebo functions when PCAN-ExpressCard support is not selected 511 */ 512 static inline int peak_pciec_probe(struct pci_dev *pdev, struct net_device *dev) 513 { 514 return -ENODEV; 515 } 516 517 static inline void peak_pciec_remove(struct peak_pciec_card *card) 518 { 519 } 520 #endif /* CONFIG_CAN_PEAK_PCIEC */ 521 522 static u8 peak_pci_read_reg(const struct sja1000_priv *priv, int port) 523 { 524 return readb(priv->reg_base + (port << 2)); 525 } 526 527 static void peak_pci_write_reg(const struct sja1000_priv *priv, 528 int port, u8 val) 529 { 530 writeb(val, priv->reg_base + (port << 2)); 531 } 532 533 static void peak_pci_post_irq(const struct sja1000_priv *priv) 534 { 535 struct peak_pci_chan *chan = priv->priv; 536 u16 icr; 537 538 /* Select and clear in PITA stored interrupt */ 539 icr = readw(chan->cfg_base + PITA_ICR); 540 if (icr & chan->icr_mask) 541 writew(chan->icr_mask, chan->cfg_base + PITA_ICR); 542 } 543 544 static int peak_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 545 { 546 struct sja1000_priv *priv; 547 struct peak_pci_chan *chan; 548 struct net_device *dev, *prev_dev; 549 void __iomem *cfg_base, *reg_base; 550 u16 sub_sys_id, icr; 551 int i, err, channels; 552 553 err = pci_enable_device(pdev); 554 if (err) 555 return err; 556 557 err = pci_request_regions(pdev, DRV_NAME); 558 if (err) 559 goto failure_disable_pci; 560 561 err = pci_read_config_word(pdev, 0x2e, &sub_sys_id); 562 if (err) 563 goto failure_release_regions; 564 565 dev_dbg(&pdev->dev, "probing device %04x:%04x:%04x\n", 566 pdev->vendor, pdev->device, sub_sys_id); 567 568 err = pci_write_config_word(pdev, 0x44, 0); 569 if (err) 570 goto failure_release_regions; 571 572 if (sub_sys_id >= 12) 573 channels = 4; 574 else if (sub_sys_id >= 10) 575 channels = 3; 576 else if (sub_sys_id >= 4) 577 channels = 2; 578 else 579 channels = 1; 580 581 cfg_base = pci_iomap(pdev, 0, PEAK_PCI_CFG_SIZE); 582 if (!cfg_base) { 583 dev_err(&pdev->dev, "failed to map PCI resource #0\n"); 584 err = -ENOMEM; 585 goto failure_release_regions; 586 } 587 588 reg_base = pci_iomap(pdev, 1, PEAK_PCI_CHAN_SIZE * channels); 589 if (!reg_base) { 590 dev_err(&pdev->dev, "failed to map PCI resource #1\n"); 591 err = -ENOMEM; 592 goto failure_unmap_cfg_base; 593 } 594 595 /* Set GPIO control register */ 596 writew(0x0005, cfg_base + PITA_GPIOICR + 2); 597 /* Enable all channels of this card */ 598 writeb(0x00, cfg_base + PITA_GPIOICR); 599 /* Toggle reset */ 600 writeb(0x05, cfg_base + PITA_MISC + 3); 601 usleep_range(5000, 6000); 602 /* Leave parport mux mode */ 603 writeb(0x04, cfg_base + PITA_MISC + 3); 604 605 icr = readw(cfg_base + PITA_ICR + 2); 606 607 for (i = 0; i < channels; i++) { 608 dev = alloc_sja1000dev(sizeof(struct peak_pci_chan)); 609 if (!dev) { 610 err = -ENOMEM; 611 goto failure_remove_channels; 612 } 613 614 priv = netdev_priv(dev); 615 chan = priv->priv; 616 617 chan->cfg_base = cfg_base; 618 priv->reg_base = reg_base + i * PEAK_PCI_CHAN_SIZE; 619 620 priv->read_reg = peak_pci_read_reg; 621 priv->write_reg = peak_pci_write_reg; 622 priv->post_irq = peak_pci_post_irq; 623 624 priv->can.clock.freq = PEAK_PCI_CAN_CLOCK; 625 priv->ocr = PEAK_PCI_OCR; 626 priv->cdr = PEAK_PCI_CDR; 627 /* Neither a slave nor a single device distributes the clock */ 628 if (channels == 1 || i > 0) 629 priv->cdr |= CDR_CLK_OFF; 630 631 /* Setup interrupt handling */ 632 priv->irq_flags = IRQF_SHARED; 633 dev->irq = pdev->irq; 634 635 chan->icr_mask = peak_pci_icr_masks[i]; 636 icr |= chan->icr_mask; 637 638 SET_NETDEV_DEV(dev, &pdev->dev); 639 dev->dev_id = i; 640 641 /* Create chain of SJA1000 devices */ 642 chan->prev_dev = pci_get_drvdata(pdev); 643 pci_set_drvdata(pdev, dev); 644 645 /* 646 * PCAN-ExpressCard needs some additional i2c init. 647 * This must be done *before* register_sja1000dev() but 648 * *after* devices linkage 649 */ 650 if (pdev->device == PEAK_PCIEC_DEVICE_ID || 651 pdev->device == PEAK_PCIEC34_DEVICE_ID) { 652 err = peak_pciec_probe(pdev, dev); 653 if (err) { 654 dev_err(&pdev->dev, 655 "failed to probe device (err %d)\n", 656 err); 657 goto failure_free_dev; 658 } 659 } 660 661 err = register_sja1000dev(dev); 662 if (err) { 663 dev_err(&pdev->dev, "failed to register device\n"); 664 goto failure_free_dev; 665 } 666 667 dev_info(&pdev->dev, 668 "%s at reg_base=0x%p cfg_base=0x%p irq=%d\n", 669 dev->name, priv->reg_base, chan->cfg_base, dev->irq); 670 } 671 672 /* Enable interrupts */ 673 writew(icr, cfg_base + PITA_ICR + 2); 674 675 return 0; 676 677 failure_free_dev: 678 pci_set_drvdata(pdev, chan->prev_dev); 679 free_sja1000dev(dev); 680 681 failure_remove_channels: 682 /* Disable interrupts */ 683 writew(0x0, cfg_base + PITA_ICR + 2); 684 685 chan = NULL; 686 for (dev = pci_get_drvdata(pdev); dev; dev = prev_dev) { 687 priv = netdev_priv(dev); 688 chan = priv->priv; 689 prev_dev = chan->prev_dev; 690 691 unregister_sja1000dev(dev); 692 free_sja1000dev(dev); 693 } 694 695 /* free any PCIeC resources too */ 696 if (chan && chan->pciec_card) 697 peak_pciec_remove(chan->pciec_card); 698 699 pci_iounmap(pdev, reg_base); 700 701 failure_unmap_cfg_base: 702 pci_iounmap(pdev, cfg_base); 703 704 failure_release_regions: 705 pci_release_regions(pdev); 706 707 failure_disable_pci: 708 pci_disable_device(pdev); 709 710 /* pci_xxx_config_word() return positive PCIBIOS_xxx error codes while 711 * the probe() function must return a negative errno in case of failure 712 * (err is unchanged if negative) */ 713 return pcibios_err_to_errno(err); 714 } 715 716 static void peak_pci_remove(struct pci_dev *pdev) 717 { 718 struct net_device *dev = pci_get_drvdata(pdev); /* Last device */ 719 struct sja1000_priv *priv = netdev_priv(dev); 720 struct peak_pci_chan *chan = priv->priv; 721 void __iomem *cfg_base = chan->cfg_base; 722 void __iomem *reg_base = priv->reg_base; 723 724 /* Disable interrupts */ 725 writew(0x0, cfg_base + PITA_ICR + 2); 726 727 /* Loop over all registered devices */ 728 while (1) { 729 struct net_device *prev_dev = chan->prev_dev; 730 731 dev_info(&pdev->dev, "removing device %s\n", dev->name); 732 unregister_sja1000dev(dev); 733 free_sja1000dev(dev); 734 dev = prev_dev; 735 736 if (!dev) { 737 /* do that only for first channel */ 738 if (chan->pciec_card) 739 peak_pciec_remove(chan->pciec_card); 740 break; 741 } 742 priv = netdev_priv(dev); 743 chan = priv->priv; 744 } 745 746 pci_iounmap(pdev, reg_base); 747 pci_iounmap(pdev, cfg_base); 748 pci_release_regions(pdev); 749 pci_disable_device(pdev); 750 } 751 752 static struct pci_driver peak_pci_driver = { 753 .name = DRV_NAME, 754 .id_table = peak_pci_tbl, 755 .probe = peak_pci_probe, 756 .remove = peak_pci_remove, 757 }; 758 759 module_pci_driver(peak_pci_driver); 760