1 // SPDX-License-Identifier: GPL-2.0
2 // IOMapped CAN bus driver for Bosch M_CAN controller
3 // Copyright (C) 2014 Freescale Semiconductor, Inc.
4 //	Dong Aisheng <b29396@freescale.com>
5 //
6 // Copyright (C) 2018-19 Texas Instruments Incorporated - http://www.ti.com/
7 
8 #include <linux/platform_device.h>
9 
10 #include "m_can.h"
11 
12 struct m_can_plat_priv {
13 	struct m_can_classdev cdev;
14 
15 	void __iomem *base;
16 	void __iomem *mram_base;
17 };
18 
19 static inline struct m_can_plat_priv *cdev_to_priv(struct m_can_classdev *cdev)
20 {
21 	return container_of(cdev, struct m_can_plat_priv, cdev);
22 }
23 
24 static u32 iomap_read_reg(struct m_can_classdev *cdev, int reg)
25 {
26 	struct m_can_plat_priv *priv = cdev_to_priv(cdev);
27 
28 	return readl(priv->base + reg);
29 }
30 
31 static u32 iomap_read_fifo(struct m_can_classdev *cdev, int offset)
32 {
33 	struct m_can_plat_priv *priv = cdev_to_priv(cdev);
34 
35 	return readl(priv->mram_base + offset);
36 }
37 
38 static int iomap_write_reg(struct m_can_classdev *cdev, int reg, int val)
39 {
40 	struct m_can_plat_priv *priv = cdev_to_priv(cdev);
41 
42 	writel(val, priv->base + reg);
43 
44 	return 0;
45 }
46 
47 static int iomap_write_fifo(struct m_can_classdev *cdev, int offset, int val)
48 {
49 	struct m_can_plat_priv *priv = cdev_to_priv(cdev);
50 
51 	writel(val, priv->mram_base + offset);
52 
53 	return 0;
54 }
55 
56 static struct m_can_ops m_can_plat_ops = {
57 	.read_reg = iomap_read_reg,
58 	.write_reg = iomap_write_reg,
59 	.write_fifo = iomap_write_fifo,
60 	.read_fifo = iomap_read_fifo,
61 };
62 
63 static int m_can_plat_probe(struct platform_device *pdev)
64 {
65 	struct m_can_classdev *mcan_class;
66 	struct m_can_plat_priv *priv;
67 	struct resource *res;
68 	void __iomem *addr;
69 	void __iomem *mram_addr;
70 	int irq, ret = 0;
71 
72 	mcan_class = m_can_class_allocate_dev(&pdev->dev,
73 					      sizeof(struct m_can_plat_priv));
74 	if (!mcan_class)
75 		return -ENOMEM;
76 
77 	priv = cdev_to_priv(mcan_class);
78 
79 	ret = m_can_class_get_clocks(mcan_class);
80 	if (ret)
81 		goto probe_fail;
82 
83 	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "m_can");
84 	addr = devm_ioremap_resource(&pdev->dev, res);
85 	irq = platform_get_irq_byname(pdev, "int0");
86 	if (IS_ERR(addr) || irq < 0) {
87 		ret = -EINVAL;
88 		goto probe_fail;
89 	}
90 
91 	/* message ram could be shared */
92 	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "message_ram");
93 	if (!res) {
94 		ret = -ENODEV;
95 		goto probe_fail;
96 	}
97 
98 	mram_addr = devm_ioremap(&pdev->dev, res->start, resource_size(res));
99 	if (!mram_addr) {
100 		ret = -ENOMEM;
101 		goto probe_fail;
102 	}
103 
104 	priv->base = addr;
105 	priv->mram_base = mram_addr;
106 
107 	mcan_class->net->irq = irq;
108 	mcan_class->pm_clock_support = 1;
109 	mcan_class->can.clock.freq = clk_get_rate(mcan_class->cclk);
110 	mcan_class->dev = &pdev->dev;
111 
112 	mcan_class->ops = &m_can_plat_ops;
113 
114 	mcan_class->is_peripheral = false;
115 
116 	platform_set_drvdata(pdev, mcan_class);
117 
118 	m_can_init_ram(mcan_class);
119 
120 	pm_runtime_enable(mcan_class->dev);
121 	ret = m_can_class_register(mcan_class);
122 	if (ret)
123 		goto out_runtime_disable;
124 
125 	return ret;
126 
127 out_runtime_disable:
128 	pm_runtime_disable(mcan_class->dev);
129 probe_fail:
130 	m_can_class_free_dev(mcan_class->net);
131 	return ret;
132 }
133 
134 static __maybe_unused int m_can_suspend(struct device *dev)
135 {
136 	return m_can_class_suspend(dev);
137 }
138 
139 static __maybe_unused int m_can_resume(struct device *dev)
140 {
141 	return m_can_class_resume(dev);
142 }
143 
144 static int m_can_plat_remove(struct platform_device *pdev)
145 {
146 	struct m_can_plat_priv *priv = platform_get_drvdata(pdev);
147 	struct m_can_classdev *mcan_class = &priv->cdev;
148 
149 	m_can_class_unregister(mcan_class);
150 
151 	m_can_class_free_dev(mcan_class->net);
152 
153 	return 0;
154 }
155 
156 static int __maybe_unused m_can_runtime_suspend(struct device *dev)
157 {
158 	struct m_can_plat_priv *priv = dev_get_drvdata(dev);
159 	struct m_can_classdev *mcan_class = &priv->cdev;
160 
161 	clk_disable_unprepare(mcan_class->cclk);
162 	clk_disable_unprepare(mcan_class->hclk);
163 
164 	return 0;
165 }
166 
167 static int __maybe_unused m_can_runtime_resume(struct device *dev)
168 {
169 	struct m_can_plat_priv *priv = dev_get_drvdata(dev);
170 	struct m_can_classdev *mcan_class = &priv->cdev;
171 	int err;
172 
173 	err = clk_prepare_enable(mcan_class->hclk);
174 	if (err)
175 		return err;
176 
177 	err = clk_prepare_enable(mcan_class->cclk);
178 	if (err)
179 		clk_disable_unprepare(mcan_class->hclk);
180 
181 	return err;
182 }
183 
184 static const struct dev_pm_ops m_can_pmops = {
185 	SET_RUNTIME_PM_OPS(m_can_runtime_suspend,
186 			   m_can_runtime_resume, NULL)
187 	SET_SYSTEM_SLEEP_PM_OPS(m_can_suspend, m_can_resume)
188 };
189 
190 static const struct of_device_id m_can_of_table[] = {
191 	{ .compatible = "bosch,m_can", .data = NULL },
192 	{ /* sentinel */ },
193 };
194 MODULE_DEVICE_TABLE(of, m_can_of_table);
195 
196 static struct platform_driver m_can_plat_driver = {
197 	.driver = {
198 		.name = KBUILD_MODNAME,
199 		.of_match_table = m_can_of_table,
200 		.pm     = &m_can_pmops,
201 	},
202 	.probe = m_can_plat_probe,
203 	.remove = m_can_plat_remove,
204 };
205 
206 module_platform_driver(m_can_plat_driver);
207 
208 MODULE_AUTHOR("Dong Aisheng <b29396@freescale.com>");
209 MODULE_AUTHOR("Dan Murphy <dmurphy@ti.com>");
210 MODULE_LICENSE("GPL v2");
211 MODULE_DESCRIPTION("M_CAN driver for IO Mapped Bosch controllers");
212