xref: /openbmc/linux/drivers/net/can/janz-ican3.c (revision 37be287c)
1 /*
2  * Janz MODULbus VMOD-ICAN3 CAN Interface Driver
3  *
4  * Copyright (c) 2010 Ira W. Snyder <iws@ovro.caltech.edu>
5  *
6  * This program is free software; you can redistribute it and/or modify it
7  * under the terms of the GNU General Public License as published by the
8  * Free Software Foundation; either version 2 of the License, or (at your
9  * option) any later version.
10  */
11 
12 #include <linux/kernel.h>
13 #include <linux/module.h>
14 #include <linux/interrupt.h>
15 #include <linux/delay.h>
16 #include <linux/platform_device.h>
17 
18 #include <linux/netdevice.h>
19 #include <linux/can.h>
20 #include <linux/can/dev.h>
21 #include <linux/can/error.h>
22 
23 #include <linux/mfd/janz.h>
24 #include <asm/io.h>
25 
26 /* the DPM has 64k of memory, organized into 256x 256 byte pages */
27 #define DPM_NUM_PAGES		256
28 #define DPM_PAGE_SIZE		256
29 #define DPM_PAGE_ADDR(p)	((p) * DPM_PAGE_SIZE)
30 
31 /* JANZ ICAN3 "old-style" host interface queue page numbers */
32 #define QUEUE_OLD_CONTROL	0
33 #define QUEUE_OLD_RB0		1
34 #define QUEUE_OLD_RB1		2
35 #define QUEUE_OLD_WB0		3
36 #define QUEUE_OLD_WB1		4
37 
38 /* Janz ICAN3 "old-style" host interface control registers */
39 #define MSYNC_PEER		0x00		/* ICAN only */
40 #define MSYNC_LOCL		0x01		/* host only */
41 #define TARGET_RUNNING		0x02
42 
43 #define MSYNC_RB0		0x01
44 #define MSYNC_RB1		0x02
45 #define MSYNC_RBLW		0x04
46 #define MSYNC_RB_MASK		(MSYNC_RB0 | MSYNC_RB1)
47 
48 #define MSYNC_WB0		0x10
49 #define MSYNC_WB1		0x20
50 #define MSYNC_WBLW		0x40
51 #define MSYNC_WB_MASK		(MSYNC_WB0 | MSYNC_WB1)
52 
53 /* Janz ICAN3 "new-style" host interface queue page numbers */
54 #define QUEUE_TOHOST		5
55 #define QUEUE_FROMHOST_MID	6
56 #define QUEUE_FROMHOST_HIGH	7
57 #define QUEUE_FROMHOST_LOW	8
58 
59 /* The first free page in the DPM is #9 */
60 #define DPM_FREE_START		9
61 
62 /* Janz ICAN3 "new-style" and "fast" host interface descriptor flags */
63 #define DESC_VALID		0x80
64 #define DESC_WRAP		0x40
65 #define DESC_INTERRUPT		0x20
66 #define DESC_IVALID		0x10
67 #define DESC_LEN(len)		(len)
68 
69 /* Janz ICAN3 Firmware Messages */
70 #define MSG_CONNECTI		0x02
71 #define MSG_DISCONNECT		0x03
72 #define MSG_IDVERS		0x04
73 #define MSG_MSGLOST		0x05
74 #define MSG_NEWHOSTIF		0x08
75 #define MSG_INQUIRY		0x0a
76 #define MSG_SETAFILMASK		0x10
77 #define MSG_INITFDPMQUEUE	0x11
78 #define MSG_HWCONF		0x12
79 #define MSG_FMSGLOST		0x15
80 #define MSG_CEVTIND		0x37
81 #define MSG_CBTRREQ		0x41
82 #define MSG_COFFREQ		0x42
83 #define MSG_CONREQ		0x43
84 #define MSG_CCONFREQ		0x47
85 
86 /*
87  * Janz ICAN3 CAN Inquiry Message Types
88  *
89  * NOTE: there appears to be a firmware bug here. You must send
90  * NOTE: INQUIRY_STATUS and expect to receive an INQUIRY_EXTENDED
91  * NOTE: response. The controller never responds to a message with
92  * NOTE: the INQUIRY_EXTENDED subspec :(
93  */
94 #define INQUIRY_STATUS		0x00
95 #define INQUIRY_TERMINATION	0x01
96 #define INQUIRY_EXTENDED	0x04
97 
98 /* Janz ICAN3 CAN Set Acceptance Filter Mask Message Types */
99 #define SETAFILMASK_REJECT	0x00
100 #define SETAFILMASK_FASTIF	0x02
101 
102 /* Janz ICAN3 CAN Hardware Configuration Message Types */
103 #define HWCONF_TERMINATE_ON	0x01
104 #define HWCONF_TERMINATE_OFF	0x00
105 
106 /* Janz ICAN3 CAN Event Indication Message Types */
107 #define CEVTIND_EI		0x01
108 #define CEVTIND_DOI		0x02
109 #define CEVTIND_LOST		0x04
110 #define CEVTIND_FULL		0x08
111 #define CEVTIND_BEI		0x10
112 
113 #define CEVTIND_CHIP_SJA1000	0x02
114 
115 #define ICAN3_BUSERR_QUOTA_MAX	255
116 
117 /* Janz ICAN3 CAN Frame Conversion */
118 #define ICAN3_SNGL	0x02
119 #define ICAN3_ECHO	0x10
120 #define ICAN3_EFF_RTR	0x40
121 #define ICAN3_SFF_RTR	0x10
122 #define ICAN3_EFF	0x80
123 
124 #define ICAN3_CAN_TYPE_MASK	0x0f
125 #define ICAN3_CAN_TYPE_SFF	0x00
126 #define ICAN3_CAN_TYPE_EFF	0x01
127 
128 #define ICAN3_CAN_DLC_MASK	0x0f
129 
130 /*
131  * SJA1000 Status and Error Register Definitions
132  *
133  * Copied from drivers/net/can/sja1000/sja1000.h
134  */
135 
136 /* status register content */
137 #define SR_BS		0x80
138 #define SR_ES		0x40
139 #define SR_TS		0x20
140 #define SR_RS		0x10
141 #define SR_TCS		0x08
142 #define SR_TBS		0x04
143 #define SR_DOS		0x02
144 #define SR_RBS		0x01
145 
146 #define SR_CRIT (SR_BS|SR_ES)
147 
148 /* ECC register */
149 #define ECC_SEG		0x1F
150 #define ECC_DIR		0x20
151 #define ECC_ERR		6
152 #define ECC_BIT		0x00
153 #define ECC_FORM	0x40
154 #define ECC_STUFF	0x80
155 #define ECC_MASK	0xc0
156 
157 /* Number of buffers for use in the "new-style" host interface */
158 #define ICAN3_NEW_BUFFERS	16
159 
160 /* Number of buffers for use in the "fast" host interface */
161 #define ICAN3_TX_BUFFERS	512
162 #define ICAN3_RX_BUFFERS	1024
163 
164 /* SJA1000 Clock Input */
165 #define ICAN3_CAN_CLOCK		8000000
166 
167 /* Driver Name */
168 #define DRV_NAME "janz-ican3"
169 
170 /* DPM Control Registers -- starts at offset 0x100 in the MODULbus registers */
171 struct ican3_dpm_control {
172 	/* window address register */
173 	u8 window_address;
174 	u8 unused1;
175 
176 	/*
177 	 * Read access: clear interrupt from microcontroller
178 	 * Write access: send interrupt to microcontroller
179 	 */
180 	u8 interrupt;
181 	u8 unused2;
182 
183 	/* write-only: reset all hardware on the module */
184 	u8 hwreset;
185 	u8 unused3;
186 
187 	/* write-only: generate an interrupt to the TPU */
188 	u8 tpuinterrupt;
189 };
190 
191 struct ican3_dev {
192 
193 	/* must be the first member */
194 	struct can_priv can;
195 
196 	/* CAN network device */
197 	struct net_device *ndev;
198 	struct napi_struct napi;
199 
200 	/* Device for printing */
201 	struct device *dev;
202 
203 	/* module number */
204 	unsigned int num;
205 
206 	/* base address of registers and IRQ */
207 	struct janz_cmodio_onboard_regs __iomem *ctrl;
208 	struct ican3_dpm_control __iomem *dpmctrl;
209 	void __iomem *dpm;
210 	int irq;
211 
212 	/* CAN bus termination status */
213 	struct completion termination_comp;
214 	bool termination_enabled;
215 
216 	/* CAN bus error status registers */
217 	struct completion buserror_comp;
218 	struct can_berr_counter bec;
219 
220 	/* old and new style host interface */
221 	unsigned int iftype;
222 
223 	/* queue for echo packets */
224 	struct sk_buff_head echoq;
225 
226 	/*
227 	 * Any function which changes the current DPM page must hold this
228 	 * lock while it is performing data accesses. This ensures that the
229 	 * function will not be preempted and end up reading data from a
230 	 * different DPM page than it expects.
231 	 */
232 	spinlock_t lock;
233 
234 	/* new host interface */
235 	unsigned int rx_int;
236 	unsigned int rx_num;
237 	unsigned int tx_num;
238 
239 	/* fast host interface */
240 	unsigned int fastrx_start;
241 	unsigned int fastrx_num;
242 	unsigned int fasttx_start;
243 	unsigned int fasttx_num;
244 
245 	/* first free DPM page */
246 	unsigned int free_page;
247 };
248 
249 struct ican3_msg {
250 	u8 control;
251 	u8 spec;
252 	__le16 len;
253 	u8 data[252];
254 };
255 
256 struct ican3_new_desc {
257 	u8 control;
258 	u8 pointer;
259 };
260 
261 struct ican3_fast_desc {
262 	u8 control;
263 	u8 command;
264 	u8 data[14];
265 };
266 
267 /* write to the window basic address register */
268 static inline void ican3_set_page(struct ican3_dev *mod, unsigned int page)
269 {
270 	BUG_ON(page >= DPM_NUM_PAGES);
271 	iowrite8(page, &mod->dpmctrl->window_address);
272 }
273 
274 /*
275  * ICAN3 "old-style" host interface
276  */
277 
278 /*
279  * Receive a message from the ICAN3 "old-style" firmware interface
280  *
281  * LOCKING: must hold mod->lock
282  *
283  * returns 0 on success, -ENOMEM when no message exists
284  */
285 static int ican3_old_recv_msg(struct ican3_dev *mod, struct ican3_msg *msg)
286 {
287 	unsigned int mbox, mbox_page;
288 	u8 locl, peer, xord;
289 
290 	/* get the MSYNC registers */
291 	ican3_set_page(mod, QUEUE_OLD_CONTROL);
292 	peer = ioread8(mod->dpm + MSYNC_PEER);
293 	locl = ioread8(mod->dpm + MSYNC_LOCL);
294 	xord = locl ^ peer;
295 
296 	if ((xord & MSYNC_RB_MASK) == 0x00) {
297 		dev_dbg(mod->dev, "no mbox for reading\n");
298 		return -ENOMEM;
299 	}
300 
301 	/* find the first free mbox to read */
302 	if ((xord & MSYNC_RB_MASK) == MSYNC_RB_MASK)
303 		mbox = (xord & MSYNC_RBLW) ? MSYNC_RB0 : MSYNC_RB1;
304 	else
305 		mbox = (xord & MSYNC_RB0) ? MSYNC_RB0 : MSYNC_RB1;
306 
307 	/* copy the message */
308 	mbox_page = (mbox == MSYNC_RB0) ? QUEUE_OLD_RB0 : QUEUE_OLD_RB1;
309 	ican3_set_page(mod, mbox_page);
310 	memcpy_fromio(msg, mod->dpm, sizeof(*msg));
311 
312 	/*
313 	 * notify the firmware that the read buffer is available
314 	 * for it to fill again
315 	 */
316 	locl ^= mbox;
317 
318 	ican3_set_page(mod, QUEUE_OLD_CONTROL);
319 	iowrite8(locl, mod->dpm + MSYNC_LOCL);
320 	return 0;
321 }
322 
323 /*
324  * Send a message through the "old-style" firmware interface
325  *
326  * LOCKING: must hold mod->lock
327  *
328  * returns 0 on success, -ENOMEM when no free space exists
329  */
330 static int ican3_old_send_msg(struct ican3_dev *mod, struct ican3_msg *msg)
331 {
332 	unsigned int mbox, mbox_page;
333 	u8 locl, peer, xord;
334 
335 	/* get the MSYNC registers */
336 	ican3_set_page(mod, QUEUE_OLD_CONTROL);
337 	peer = ioread8(mod->dpm + MSYNC_PEER);
338 	locl = ioread8(mod->dpm + MSYNC_LOCL);
339 	xord = locl ^ peer;
340 
341 	if ((xord & MSYNC_WB_MASK) == MSYNC_WB_MASK) {
342 		dev_err(mod->dev, "no mbox for writing\n");
343 		return -ENOMEM;
344 	}
345 
346 	/* calculate a free mbox to use */
347 	mbox = (xord & MSYNC_WB0) ? MSYNC_WB1 : MSYNC_WB0;
348 
349 	/* copy the message to the DPM */
350 	mbox_page = (mbox == MSYNC_WB0) ? QUEUE_OLD_WB0 : QUEUE_OLD_WB1;
351 	ican3_set_page(mod, mbox_page);
352 	memcpy_toio(mod->dpm, msg, sizeof(*msg));
353 
354 	locl ^= mbox;
355 	if (mbox == MSYNC_WB1)
356 		locl |= MSYNC_WBLW;
357 
358 	ican3_set_page(mod, QUEUE_OLD_CONTROL);
359 	iowrite8(locl, mod->dpm + MSYNC_LOCL);
360 	return 0;
361 }
362 
363 /*
364  * ICAN3 "new-style" Host Interface Setup
365  */
366 
367 static void ican3_init_new_host_interface(struct ican3_dev *mod)
368 {
369 	struct ican3_new_desc desc;
370 	unsigned long flags;
371 	void __iomem *dst;
372 	int i;
373 
374 	spin_lock_irqsave(&mod->lock, flags);
375 
376 	/* setup the internal datastructures for RX */
377 	mod->rx_num = 0;
378 	mod->rx_int = 0;
379 
380 	/* tohost queue descriptors are in page 5 */
381 	ican3_set_page(mod, QUEUE_TOHOST);
382 	dst = mod->dpm;
383 
384 	/* initialize the tohost (rx) queue descriptors: pages 9-24 */
385 	for (i = 0; i < ICAN3_NEW_BUFFERS; i++) {
386 		desc.control = DESC_INTERRUPT | DESC_LEN(1); /* I L=1 */
387 		desc.pointer = mod->free_page;
388 
389 		/* set wrap flag on last buffer */
390 		if (i == ICAN3_NEW_BUFFERS - 1)
391 			desc.control |= DESC_WRAP;
392 
393 		memcpy_toio(dst, &desc, sizeof(desc));
394 		dst += sizeof(desc);
395 		mod->free_page++;
396 	}
397 
398 	/* fromhost (tx) mid queue descriptors are in page 6 */
399 	ican3_set_page(mod, QUEUE_FROMHOST_MID);
400 	dst = mod->dpm;
401 
402 	/* setup the internal datastructures for TX */
403 	mod->tx_num = 0;
404 
405 	/* initialize the fromhost mid queue descriptors: pages 25-40 */
406 	for (i = 0; i < ICAN3_NEW_BUFFERS; i++) {
407 		desc.control = DESC_VALID | DESC_LEN(1); /* V L=1 */
408 		desc.pointer = mod->free_page;
409 
410 		/* set wrap flag on last buffer */
411 		if (i == ICAN3_NEW_BUFFERS - 1)
412 			desc.control |= DESC_WRAP;
413 
414 		memcpy_toio(dst, &desc, sizeof(desc));
415 		dst += sizeof(desc);
416 		mod->free_page++;
417 	}
418 
419 	/* fromhost hi queue descriptors are in page 7 */
420 	ican3_set_page(mod, QUEUE_FROMHOST_HIGH);
421 	dst = mod->dpm;
422 
423 	/* initialize only a single buffer in the fromhost hi queue (unused) */
424 	desc.control = DESC_VALID | DESC_WRAP | DESC_LEN(1); /* VW L=1 */
425 	desc.pointer = mod->free_page;
426 	memcpy_toio(dst, &desc, sizeof(desc));
427 	mod->free_page++;
428 
429 	/* fromhost low queue descriptors are in page 8 */
430 	ican3_set_page(mod, QUEUE_FROMHOST_LOW);
431 	dst = mod->dpm;
432 
433 	/* initialize only a single buffer in the fromhost low queue (unused) */
434 	desc.control = DESC_VALID | DESC_WRAP | DESC_LEN(1); /* VW L=1 */
435 	desc.pointer = mod->free_page;
436 	memcpy_toio(dst, &desc, sizeof(desc));
437 	mod->free_page++;
438 
439 	spin_unlock_irqrestore(&mod->lock, flags);
440 }
441 
442 /*
443  * ICAN3 Fast Host Interface Setup
444  */
445 
446 static void ican3_init_fast_host_interface(struct ican3_dev *mod)
447 {
448 	struct ican3_fast_desc desc;
449 	unsigned long flags;
450 	unsigned int addr;
451 	void __iomem *dst;
452 	int i;
453 
454 	spin_lock_irqsave(&mod->lock, flags);
455 
456 	/* save the start recv page */
457 	mod->fastrx_start = mod->free_page;
458 	mod->fastrx_num = 0;
459 
460 	/* build a single fast tohost queue descriptor */
461 	memset(&desc, 0, sizeof(desc));
462 	desc.control = 0x00;
463 	desc.command = 1;
464 
465 	/* build the tohost queue descriptor ring in memory */
466 	addr = 0;
467 	for (i = 0; i < ICAN3_RX_BUFFERS; i++) {
468 
469 		/* set the wrap bit on the last buffer */
470 		if (i == ICAN3_RX_BUFFERS - 1)
471 			desc.control |= DESC_WRAP;
472 
473 		/* switch to the correct page */
474 		ican3_set_page(mod, mod->free_page);
475 
476 		/* copy the descriptor to the DPM */
477 		dst = mod->dpm + addr;
478 		memcpy_toio(dst, &desc, sizeof(desc));
479 		addr += sizeof(desc);
480 
481 		/* move to the next page if necessary */
482 		if (addr >= DPM_PAGE_SIZE) {
483 			addr = 0;
484 			mod->free_page++;
485 		}
486 	}
487 
488 	/* make sure we page-align the next queue */
489 	if (addr != 0)
490 		mod->free_page++;
491 
492 	/* save the start xmit page */
493 	mod->fasttx_start = mod->free_page;
494 	mod->fasttx_num = 0;
495 
496 	/* build a single fast fromhost queue descriptor */
497 	memset(&desc, 0, sizeof(desc));
498 	desc.control = DESC_VALID;
499 	desc.command = 1;
500 
501 	/* build the fromhost queue descriptor ring in memory */
502 	addr = 0;
503 	for (i = 0; i < ICAN3_TX_BUFFERS; i++) {
504 
505 		/* set the wrap bit on the last buffer */
506 		if (i == ICAN3_TX_BUFFERS - 1)
507 			desc.control |= DESC_WRAP;
508 
509 		/* switch to the correct page */
510 		ican3_set_page(mod, mod->free_page);
511 
512 		/* copy the descriptor to the DPM */
513 		dst = mod->dpm + addr;
514 		memcpy_toio(dst, &desc, sizeof(desc));
515 		addr += sizeof(desc);
516 
517 		/* move to the next page if necessary */
518 		if (addr >= DPM_PAGE_SIZE) {
519 			addr = 0;
520 			mod->free_page++;
521 		}
522 	}
523 
524 	spin_unlock_irqrestore(&mod->lock, flags);
525 }
526 
527 /*
528  * ICAN3 "new-style" Host Interface Message Helpers
529  */
530 
531 /*
532  * LOCKING: must hold mod->lock
533  */
534 static int ican3_new_send_msg(struct ican3_dev *mod, struct ican3_msg *msg)
535 {
536 	struct ican3_new_desc desc;
537 	void __iomem *desc_addr = mod->dpm + (mod->tx_num * sizeof(desc));
538 
539 	/* switch to the fromhost mid queue, and read the buffer descriptor */
540 	ican3_set_page(mod, QUEUE_FROMHOST_MID);
541 	memcpy_fromio(&desc, desc_addr, sizeof(desc));
542 
543 	if (!(desc.control & DESC_VALID)) {
544 		dev_dbg(mod->dev, "%s: no free buffers\n", __func__);
545 		return -ENOMEM;
546 	}
547 
548 	/* switch to the data page, copy the data */
549 	ican3_set_page(mod, desc.pointer);
550 	memcpy_toio(mod->dpm, msg, sizeof(*msg));
551 
552 	/* switch back to the descriptor, set the valid bit, write it back */
553 	ican3_set_page(mod, QUEUE_FROMHOST_MID);
554 	desc.control ^= DESC_VALID;
555 	memcpy_toio(desc_addr, &desc, sizeof(desc));
556 
557 	/* update the tx number */
558 	mod->tx_num = (desc.control & DESC_WRAP) ? 0 : (mod->tx_num + 1);
559 	return 0;
560 }
561 
562 /*
563  * LOCKING: must hold mod->lock
564  */
565 static int ican3_new_recv_msg(struct ican3_dev *mod, struct ican3_msg *msg)
566 {
567 	struct ican3_new_desc desc;
568 	void __iomem *desc_addr = mod->dpm + (mod->rx_num * sizeof(desc));
569 
570 	/* switch to the tohost queue, and read the buffer descriptor */
571 	ican3_set_page(mod, QUEUE_TOHOST);
572 	memcpy_fromio(&desc, desc_addr, sizeof(desc));
573 
574 	if (!(desc.control & DESC_VALID)) {
575 		dev_dbg(mod->dev, "%s: no buffers to recv\n", __func__);
576 		return -ENOMEM;
577 	}
578 
579 	/* switch to the data page, copy the data */
580 	ican3_set_page(mod, desc.pointer);
581 	memcpy_fromio(msg, mod->dpm, sizeof(*msg));
582 
583 	/* switch back to the descriptor, toggle the valid bit, write it back */
584 	ican3_set_page(mod, QUEUE_TOHOST);
585 	desc.control ^= DESC_VALID;
586 	memcpy_toio(desc_addr, &desc, sizeof(desc));
587 
588 	/* update the rx number */
589 	mod->rx_num = (desc.control & DESC_WRAP) ? 0 : (mod->rx_num + 1);
590 	return 0;
591 }
592 
593 /*
594  * Message Send / Recv Helpers
595  */
596 
597 static int ican3_send_msg(struct ican3_dev *mod, struct ican3_msg *msg)
598 {
599 	unsigned long flags;
600 	int ret;
601 
602 	spin_lock_irqsave(&mod->lock, flags);
603 
604 	if (mod->iftype == 0)
605 		ret = ican3_old_send_msg(mod, msg);
606 	else
607 		ret = ican3_new_send_msg(mod, msg);
608 
609 	spin_unlock_irqrestore(&mod->lock, flags);
610 	return ret;
611 }
612 
613 static int ican3_recv_msg(struct ican3_dev *mod, struct ican3_msg *msg)
614 {
615 	unsigned long flags;
616 	int ret;
617 
618 	spin_lock_irqsave(&mod->lock, flags);
619 
620 	if (mod->iftype == 0)
621 		ret = ican3_old_recv_msg(mod, msg);
622 	else
623 		ret = ican3_new_recv_msg(mod, msg);
624 
625 	spin_unlock_irqrestore(&mod->lock, flags);
626 	return ret;
627 }
628 
629 /*
630  * Quick Pre-constructed Messages
631  */
632 
633 static int ican3_msg_connect(struct ican3_dev *mod)
634 {
635 	struct ican3_msg msg;
636 
637 	memset(&msg, 0, sizeof(msg));
638 	msg.spec = MSG_CONNECTI;
639 	msg.len = cpu_to_le16(0);
640 
641 	return ican3_send_msg(mod, &msg);
642 }
643 
644 static int ican3_msg_disconnect(struct ican3_dev *mod)
645 {
646 	struct ican3_msg msg;
647 
648 	memset(&msg, 0, sizeof(msg));
649 	msg.spec = MSG_DISCONNECT;
650 	msg.len = cpu_to_le16(0);
651 
652 	return ican3_send_msg(mod, &msg);
653 }
654 
655 static int ican3_msg_newhostif(struct ican3_dev *mod)
656 {
657 	struct ican3_msg msg;
658 	int ret;
659 
660 	memset(&msg, 0, sizeof(msg));
661 	msg.spec = MSG_NEWHOSTIF;
662 	msg.len = cpu_to_le16(0);
663 
664 	/* If we're not using the old interface, switching seems bogus */
665 	WARN_ON(mod->iftype != 0);
666 
667 	ret = ican3_send_msg(mod, &msg);
668 	if (ret)
669 		return ret;
670 
671 	/* mark the module as using the new host interface */
672 	mod->iftype = 1;
673 	return 0;
674 }
675 
676 static int ican3_msg_fasthostif(struct ican3_dev *mod)
677 {
678 	struct ican3_msg msg;
679 	unsigned int addr;
680 
681 	memset(&msg, 0, sizeof(msg));
682 	msg.spec = MSG_INITFDPMQUEUE;
683 	msg.len = cpu_to_le16(8);
684 
685 	/* write the tohost queue start address */
686 	addr = DPM_PAGE_ADDR(mod->fastrx_start);
687 	msg.data[0] = addr & 0xff;
688 	msg.data[1] = (addr >> 8) & 0xff;
689 	msg.data[2] = (addr >> 16) & 0xff;
690 	msg.data[3] = (addr >> 24) & 0xff;
691 
692 	/* write the fromhost queue start address */
693 	addr = DPM_PAGE_ADDR(mod->fasttx_start);
694 	msg.data[4] = addr & 0xff;
695 	msg.data[5] = (addr >> 8) & 0xff;
696 	msg.data[6] = (addr >> 16) & 0xff;
697 	msg.data[7] = (addr >> 24) & 0xff;
698 
699 	/* If we're not using the new interface yet, we cannot do this */
700 	WARN_ON(mod->iftype != 1);
701 
702 	return ican3_send_msg(mod, &msg);
703 }
704 
705 /*
706  * Setup the CAN filter to either accept or reject all
707  * messages from the CAN bus.
708  */
709 static int ican3_set_id_filter(struct ican3_dev *mod, bool accept)
710 {
711 	struct ican3_msg msg;
712 	int ret;
713 
714 	/* Standard Frame Format */
715 	memset(&msg, 0, sizeof(msg));
716 	msg.spec = MSG_SETAFILMASK;
717 	msg.len = cpu_to_le16(5);
718 	msg.data[0] = 0x00; /* IDLo LSB */
719 	msg.data[1] = 0x00; /* IDLo MSB */
720 	msg.data[2] = 0xff; /* IDHi LSB */
721 	msg.data[3] = 0x07; /* IDHi MSB */
722 
723 	/* accept all frames for fast host if, or reject all frames */
724 	msg.data[4] = accept ? SETAFILMASK_FASTIF : SETAFILMASK_REJECT;
725 
726 	ret = ican3_send_msg(mod, &msg);
727 	if (ret)
728 		return ret;
729 
730 	/* Extended Frame Format */
731 	memset(&msg, 0, sizeof(msg));
732 	msg.spec = MSG_SETAFILMASK;
733 	msg.len = cpu_to_le16(13);
734 	msg.data[0] = 0;    /* MUX = 0 */
735 	msg.data[1] = 0x00; /* IDLo LSB */
736 	msg.data[2] = 0x00;
737 	msg.data[3] = 0x00;
738 	msg.data[4] = 0x20; /* IDLo MSB */
739 	msg.data[5] = 0xff; /* IDHi LSB */
740 	msg.data[6] = 0xff;
741 	msg.data[7] = 0xff;
742 	msg.data[8] = 0x3f; /* IDHi MSB */
743 
744 	/* accept all frames for fast host if, or reject all frames */
745 	msg.data[9] = accept ? SETAFILMASK_FASTIF : SETAFILMASK_REJECT;
746 
747 	return ican3_send_msg(mod, &msg);
748 }
749 
750 /*
751  * Bring the CAN bus online or offline
752  */
753 static int ican3_set_bus_state(struct ican3_dev *mod, bool on)
754 {
755 	struct ican3_msg msg;
756 
757 	memset(&msg, 0, sizeof(msg));
758 	msg.spec = on ? MSG_CONREQ : MSG_COFFREQ;
759 	msg.len = cpu_to_le16(0);
760 
761 	return ican3_send_msg(mod, &msg);
762 }
763 
764 static int ican3_set_termination(struct ican3_dev *mod, bool on)
765 {
766 	struct ican3_msg msg;
767 
768 	memset(&msg, 0, sizeof(msg));
769 	msg.spec = MSG_HWCONF;
770 	msg.len = cpu_to_le16(2);
771 	msg.data[0] = 0x00;
772 	msg.data[1] = on ? HWCONF_TERMINATE_ON : HWCONF_TERMINATE_OFF;
773 
774 	return ican3_send_msg(mod, &msg);
775 }
776 
777 static int ican3_send_inquiry(struct ican3_dev *mod, u8 subspec)
778 {
779 	struct ican3_msg msg;
780 
781 	memset(&msg, 0, sizeof(msg));
782 	msg.spec = MSG_INQUIRY;
783 	msg.len = cpu_to_le16(2);
784 	msg.data[0] = subspec;
785 	msg.data[1] = 0x00;
786 
787 	return ican3_send_msg(mod, &msg);
788 }
789 
790 static int ican3_set_buserror(struct ican3_dev *mod, u8 quota)
791 {
792 	struct ican3_msg msg;
793 
794 	memset(&msg, 0, sizeof(msg));
795 	msg.spec = MSG_CCONFREQ;
796 	msg.len = cpu_to_le16(2);
797 	msg.data[0] = 0x00;
798 	msg.data[1] = quota;
799 
800 	return ican3_send_msg(mod, &msg);
801 }
802 
803 /*
804  * ICAN3 to Linux CAN Frame Conversion
805  */
806 
807 static void ican3_to_can_frame(struct ican3_dev *mod,
808 			       struct ican3_fast_desc *desc,
809 			       struct can_frame *cf)
810 {
811 	if ((desc->command & ICAN3_CAN_TYPE_MASK) == ICAN3_CAN_TYPE_SFF) {
812 		if (desc->data[1] & ICAN3_SFF_RTR)
813 			cf->can_id |= CAN_RTR_FLAG;
814 
815 		cf->can_id |= desc->data[0] << 3;
816 		cf->can_id |= (desc->data[1] & 0xe0) >> 5;
817 		cf->can_dlc = get_can_dlc(desc->data[1] & ICAN3_CAN_DLC_MASK);
818 		memcpy(cf->data, &desc->data[2], cf->can_dlc);
819 	} else {
820 		cf->can_dlc = get_can_dlc(desc->data[0] & ICAN3_CAN_DLC_MASK);
821 		if (desc->data[0] & ICAN3_EFF_RTR)
822 			cf->can_id |= CAN_RTR_FLAG;
823 
824 		if (desc->data[0] & ICAN3_EFF) {
825 			cf->can_id |= CAN_EFF_FLAG;
826 			cf->can_id |= desc->data[2] << 21; /* 28-21 */
827 			cf->can_id |= desc->data[3] << 13; /* 20-13 */
828 			cf->can_id |= desc->data[4] << 5;  /* 12-5  */
829 			cf->can_id |= (desc->data[5] & 0xf8) >> 3;
830 		} else {
831 			cf->can_id |= desc->data[2] << 3;  /* 10-3  */
832 			cf->can_id |= desc->data[3] >> 5;  /* 2-0   */
833 		}
834 
835 		memcpy(cf->data, &desc->data[6], cf->can_dlc);
836 	}
837 }
838 
839 static void can_frame_to_ican3(struct ican3_dev *mod,
840 			       struct can_frame *cf,
841 			       struct ican3_fast_desc *desc)
842 {
843 	/* clear out any stale data in the descriptor */
844 	memset(desc->data, 0, sizeof(desc->data));
845 
846 	/* we always use the extended format, with the ECHO flag set */
847 	desc->command = ICAN3_CAN_TYPE_EFF;
848 	desc->data[0] |= cf->can_dlc;
849 	desc->data[1] |= ICAN3_ECHO;
850 
851 	/* support single transmission (no retries) mode */
852 	if (mod->can.ctrlmode & CAN_CTRLMODE_ONE_SHOT)
853 		desc->data[1] |= ICAN3_SNGL;
854 
855 	if (cf->can_id & CAN_RTR_FLAG)
856 		desc->data[0] |= ICAN3_EFF_RTR;
857 
858 	/* pack the id into the correct places */
859 	if (cf->can_id & CAN_EFF_FLAG) {
860 		desc->data[0] |= ICAN3_EFF;
861 		desc->data[2] = (cf->can_id & 0x1fe00000) >> 21; /* 28-21 */
862 		desc->data[3] = (cf->can_id & 0x001fe000) >> 13; /* 20-13 */
863 		desc->data[4] = (cf->can_id & 0x00001fe0) >> 5;  /* 12-5  */
864 		desc->data[5] = (cf->can_id & 0x0000001f) << 3;  /* 4-0   */
865 	} else {
866 		desc->data[2] = (cf->can_id & 0x7F8) >> 3; /* bits 10-3 */
867 		desc->data[3] = (cf->can_id & 0x007) << 5; /* bits 2-0  */
868 	}
869 
870 	/* copy the data bits into the descriptor */
871 	memcpy(&desc->data[6], cf->data, cf->can_dlc);
872 }
873 
874 /*
875  * Interrupt Handling
876  */
877 
878 /*
879  * Handle an ID + Version message response from the firmware. We never generate
880  * this message in production code, but it is very useful when debugging to be
881  * able to display this message.
882  */
883 static void ican3_handle_idvers(struct ican3_dev *mod, struct ican3_msg *msg)
884 {
885 	dev_dbg(mod->dev, "IDVERS response: %s\n", msg->data);
886 }
887 
888 static void ican3_handle_msglost(struct ican3_dev *mod, struct ican3_msg *msg)
889 {
890 	struct net_device *dev = mod->ndev;
891 	struct net_device_stats *stats = &dev->stats;
892 	struct can_frame *cf;
893 	struct sk_buff *skb;
894 
895 	/*
896 	 * Report that communication messages with the microcontroller firmware
897 	 * are being lost. These are never CAN frames, so we do not generate an
898 	 * error frame for userspace
899 	 */
900 	if (msg->spec == MSG_MSGLOST) {
901 		dev_err(mod->dev, "lost %d control messages\n", msg->data[0]);
902 		return;
903 	}
904 
905 	/*
906 	 * Oops, this indicates that we have lost messages in the fast queue,
907 	 * which are exclusively CAN messages. Our driver isn't reading CAN
908 	 * frames fast enough.
909 	 *
910 	 * We'll pretend that the SJA1000 told us that it ran out of buffer
911 	 * space, because there is not a better message for this.
912 	 */
913 	skb = alloc_can_err_skb(dev, &cf);
914 	if (skb) {
915 		cf->can_id |= CAN_ERR_CRTL;
916 		cf->data[1] = CAN_ERR_CRTL_RX_OVERFLOW;
917 		stats->rx_over_errors++;
918 		stats->rx_errors++;
919 		netif_rx(skb);
920 	}
921 }
922 
923 /*
924  * Handle CAN Event Indication Messages from the firmware
925  *
926  * The ICAN3 firmware provides the values of some SJA1000 registers when it
927  * generates this message. The code below is largely copied from the
928  * drivers/net/can/sja1000/sja1000.c file, and adapted as necessary
929  */
930 static int ican3_handle_cevtind(struct ican3_dev *mod, struct ican3_msg *msg)
931 {
932 	struct net_device *dev = mod->ndev;
933 	struct net_device_stats *stats = &dev->stats;
934 	enum can_state state = mod->can.state;
935 	u8 isrc, ecc, status, rxerr, txerr;
936 	struct can_frame *cf;
937 	struct sk_buff *skb;
938 
939 	/* we can only handle the SJA1000 part */
940 	if (msg->data[1] != CEVTIND_CHIP_SJA1000) {
941 		dev_err(mod->dev, "unable to handle errors on non-SJA1000\n");
942 		return -ENODEV;
943 	}
944 
945 	/* check the message length for sanity */
946 	if (le16_to_cpu(msg->len) < 6) {
947 		dev_err(mod->dev, "error message too short\n");
948 		return -EINVAL;
949 	}
950 
951 	isrc = msg->data[0];
952 	ecc = msg->data[2];
953 	status = msg->data[3];
954 	rxerr = msg->data[4];
955 	txerr = msg->data[5];
956 
957 	/*
958 	 * This hardware lacks any support other than bus error messages to
959 	 * determine if packet transmission has failed.
960 	 *
961 	 * When TX errors happen, one echo skb needs to be dropped from the
962 	 * front of the queue.
963 	 *
964 	 * A small bit of code is duplicated here and below, to avoid error
965 	 * skb allocation when it will just be freed immediately.
966 	 */
967 	if (isrc == CEVTIND_BEI) {
968 		int ret;
969 		dev_dbg(mod->dev, "bus error interrupt\n");
970 
971 		/* TX error */
972 		if (!(ecc & ECC_DIR)) {
973 			kfree_skb(skb_dequeue(&mod->echoq));
974 			stats->tx_errors++;
975 		} else {
976 			stats->rx_errors++;
977 		}
978 
979 		/*
980 		 * The controller automatically disables bus-error interrupts
981 		 * and therefore we must re-enable them.
982 		 */
983 		ret = ican3_set_buserror(mod, 1);
984 		if (ret) {
985 			dev_err(mod->dev, "unable to re-enable bus-error\n");
986 			return ret;
987 		}
988 
989 		/* bus error reporting is off, return immediately */
990 		if (!(mod->can.ctrlmode & CAN_CTRLMODE_BERR_REPORTING))
991 			return 0;
992 	}
993 
994 	skb = alloc_can_err_skb(dev, &cf);
995 	if (skb == NULL)
996 		return -ENOMEM;
997 
998 	/* data overrun interrupt */
999 	if (isrc == CEVTIND_DOI || isrc == CEVTIND_LOST) {
1000 		dev_dbg(mod->dev, "data overrun interrupt\n");
1001 		cf->can_id |= CAN_ERR_CRTL;
1002 		cf->data[1] = CAN_ERR_CRTL_RX_OVERFLOW;
1003 		stats->rx_over_errors++;
1004 		stats->rx_errors++;
1005 	}
1006 
1007 	/* error warning + passive interrupt */
1008 	if (isrc == CEVTIND_EI) {
1009 		dev_dbg(mod->dev, "error warning + passive interrupt\n");
1010 		if (status & SR_BS) {
1011 			state = CAN_STATE_BUS_OFF;
1012 			cf->can_id |= CAN_ERR_BUSOFF;
1013 			can_bus_off(dev);
1014 		} else if (status & SR_ES) {
1015 			if (rxerr >= 128 || txerr >= 128)
1016 				state = CAN_STATE_ERROR_PASSIVE;
1017 			else
1018 				state = CAN_STATE_ERROR_WARNING;
1019 		} else {
1020 			state = CAN_STATE_ERROR_ACTIVE;
1021 		}
1022 	}
1023 
1024 	/* bus error interrupt */
1025 	if (isrc == CEVTIND_BEI) {
1026 		mod->can.can_stats.bus_error++;
1027 		cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;
1028 
1029 		switch (ecc & ECC_MASK) {
1030 		case ECC_BIT:
1031 			cf->data[2] |= CAN_ERR_PROT_BIT;
1032 			break;
1033 		case ECC_FORM:
1034 			cf->data[2] |= CAN_ERR_PROT_FORM;
1035 			break;
1036 		case ECC_STUFF:
1037 			cf->data[2] |= CAN_ERR_PROT_STUFF;
1038 			break;
1039 		default:
1040 			cf->data[2] |= CAN_ERR_PROT_UNSPEC;
1041 			cf->data[3] = ecc & ECC_SEG;
1042 			break;
1043 		}
1044 
1045 		if (!(ecc & ECC_DIR))
1046 			cf->data[2] |= CAN_ERR_PROT_TX;
1047 
1048 		cf->data[6] = txerr;
1049 		cf->data[7] = rxerr;
1050 	}
1051 
1052 	if (state != mod->can.state && (state == CAN_STATE_ERROR_WARNING ||
1053 					state == CAN_STATE_ERROR_PASSIVE)) {
1054 		cf->can_id |= CAN_ERR_CRTL;
1055 		if (state == CAN_STATE_ERROR_WARNING) {
1056 			mod->can.can_stats.error_warning++;
1057 			cf->data[1] = (txerr > rxerr) ?
1058 				CAN_ERR_CRTL_TX_WARNING :
1059 				CAN_ERR_CRTL_RX_WARNING;
1060 		} else {
1061 			mod->can.can_stats.error_passive++;
1062 			cf->data[1] = (txerr > rxerr) ?
1063 				CAN_ERR_CRTL_TX_PASSIVE :
1064 				CAN_ERR_CRTL_RX_PASSIVE;
1065 		}
1066 
1067 		cf->data[6] = txerr;
1068 		cf->data[7] = rxerr;
1069 	}
1070 
1071 	mod->can.state = state;
1072 	netif_rx(skb);
1073 	return 0;
1074 }
1075 
1076 static void ican3_handle_inquiry(struct ican3_dev *mod, struct ican3_msg *msg)
1077 {
1078 	switch (msg->data[0]) {
1079 	case INQUIRY_STATUS:
1080 	case INQUIRY_EXTENDED:
1081 		mod->bec.rxerr = msg->data[5];
1082 		mod->bec.txerr = msg->data[6];
1083 		complete(&mod->buserror_comp);
1084 		break;
1085 	case INQUIRY_TERMINATION:
1086 		mod->termination_enabled = msg->data[6] & HWCONF_TERMINATE_ON;
1087 		complete(&mod->termination_comp);
1088 		break;
1089 	default:
1090 		dev_err(mod->dev, "received an unknown inquiry response\n");
1091 		break;
1092 	}
1093 }
1094 
1095 static void ican3_handle_unknown_message(struct ican3_dev *mod,
1096 					struct ican3_msg *msg)
1097 {
1098 	dev_warn(mod->dev, "received unknown message: spec 0x%.2x length %d\n",
1099 			   msg->spec, le16_to_cpu(msg->len));
1100 }
1101 
1102 /*
1103  * Handle a control message from the firmware
1104  */
1105 static void ican3_handle_message(struct ican3_dev *mod, struct ican3_msg *msg)
1106 {
1107 	dev_dbg(mod->dev, "%s: modno %d spec 0x%.2x len %d bytes\n", __func__,
1108 			   mod->num, msg->spec, le16_to_cpu(msg->len));
1109 
1110 	switch (msg->spec) {
1111 	case MSG_IDVERS:
1112 		ican3_handle_idvers(mod, msg);
1113 		break;
1114 	case MSG_MSGLOST:
1115 	case MSG_FMSGLOST:
1116 		ican3_handle_msglost(mod, msg);
1117 		break;
1118 	case MSG_CEVTIND:
1119 		ican3_handle_cevtind(mod, msg);
1120 		break;
1121 	case MSG_INQUIRY:
1122 		ican3_handle_inquiry(mod, msg);
1123 		break;
1124 	default:
1125 		ican3_handle_unknown_message(mod, msg);
1126 		break;
1127 	}
1128 }
1129 
1130 /*
1131  * The ican3 needs to store all echo skbs, and therefore cannot
1132  * use the generic infrastructure for this.
1133  */
1134 static void ican3_put_echo_skb(struct ican3_dev *mod, struct sk_buff *skb)
1135 {
1136 	struct sock *srcsk = skb->sk;
1137 
1138 	if (atomic_read(&skb->users) != 1) {
1139 		struct sk_buff *old_skb = skb;
1140 
1141 		skb = skb_clone(old_skb, GFP_ATOMIC);
1142 		kfree_skb(old_skb);
1143 		if (!skb)
1144 			return;
1145 	} else {
1146 		skb_orphan(skb);
1147 	}
1148 
1149 	skb->sk = srcsk;
1150 
1151 	/* save this skb for tx interrupt echo handling */
1152 	skb_queue_tail(&mod->echoq, skb);
1153 }
1154 
1155 static unsigned int ican3_get_echo_skb(struct ican3_dev *mod)
1156 {
1157 	struct sk_buff *skb = skb_dequeue(&mod->echoq);
1158 	struct can_frame *cf;
1159 	u8 dlc;
1160 
1161 	/* this should never trigger unless there is a driver bug */
1162 	if (!skb) {
1163 		netdev_err(mod->ndev, "BUG: echo skb not occupied\n");
1164 		return 0;
1165 	}
1166 
1167 	cf = (struct can_frame *)skb->data;
1168 	dlc = cf->can_dlc;
1169 
1170 	/* check flag whether this packet has to be looped back */
1171 	if (skb->pkt_type != PACKET_LOOPBACK) {
1172 		kfree_skb(skb);
1173 		return dlc;
1174 	}
1175 
1176 	skb->protocol = htons(ETH_P_CAN);
1177 	skb->pkt_type = PACKET_BROADCAST;
1178 	skb->ip_summed = CHECKSUM_UNNECESSARY;
1179 	skb->dev = mod->ndev;
1180 	netif_receive_skb(skb);
1181 	return dlc;
1182 }
1183 
1184 /*
1185  * Compare an skb with an existing echo skb
1186  *
1187  * This function will be used on devices which have a hardware loopback.
1188  * On these devices, this function can be used to compare a received skb
1189  * with the saved echo skbs so that the hardware echo skb can be dropped.
1190  *
1191  * Returns true if the skb's are identical, false otherwise.
1192  */
1193 static bool ican3_echo_skb_matches(struct ican3_dev *mod, struct sk_buff *skb)
1194 {
1195 	struct can_frame *cf = (struct can_frame *)skb->data;
1196 	struct sk_buff *echo_skb = skb_peek(&mod->echoq);
1197 	struct can_frame *echo_cf;
1198 
1199 	if (!echo_skb)
1200 		return false;
1201 
1202 	echo_cf = (struct can_frame *)echo_skb->data;
1203 	if (cf->can_id != echo_cf->can_id)
1204 		return false;
1205 
1206 	if (cf->can_dlc != echo_cf->can_dlc)
1207 		return false;
1208 
1209 	return memcmp(cf->data, echo_cf->data, cf->can_dlc) == 0;
1210 }
1211 
1212 /*
1213  * Check that there is room in the TX ring to transmit another skb
1214  *
1215  * LOCKING: must hold mod->lock
1216  */
1217 static bool ican3_txok(struct ican3_dev *mod)
1218 {
1219 	struct ican3_fast_desc __iomem *desc;
1220 	u8 control;
1221 
1222 	/* check that we have echo queue space */
1223 	if (skb_queue_len(&mod->echoq) >= ICAN3_TX_BUFFERS)
1224 		return false;
1225 
1226 	/* copy the control bits of the descriptor */
1227 	ican3_set_page(mod, mod->fasttx_start + (mod->fasttx_num / 16));
1228 	desc = mod->dpm + ((mod->fasttx_num % 16) * sizeof(*desc));
1229 	control = ioread8(&desc->control);
1230 
1231 	/* if the control bits are not valid, then we have no more space */
1232 	if (!(control & DESC_VALID))
1233 		return false;
1234 
1235 	return true;
1236 }
1237 
1238 /*
1239  * Receive one CAN frame from the hardware
1240  *
1241  * CONTEXT: must be called from user context
1242  */
1243 static int ican3_recv_skb(struct ican3_dev *mod)
1244 {
1245 	struct net_device *ndev = mod->ndev;
1246 	struct net_device_stats *stats = &ndev->stats;
1247 	struct ican3_fast_desc desc;
1248 	void __iomem *desc_addr;
1249 	struct can_frame *cf;
1250 	struct sk_buff *skb;
1251 	unsigned long flags;
1252 
1253 	spin_lock_irqsave(&mod->lock, flags);
1254 
1255 	/* copy the whole descriptor */
1256 	ican3_set_page(mod, mod->fastrx_start + (mod->fastrx_num / 16));
1257 	desc_addr = mod->dpm + ((mod->fastrx_num % 16) * sizeof(desc));
1258 	memcpy_fromio(&desc, desc_addr, sizeof(desc));
1259 
1260 	spin_unlock_irqrestore(&mod->lock, flags);
1261 
1262 	/* check that we actually have a CAN frame */
1263 	if (!(desc.control & DESC_VALID))
1264 		return -ENOBUFS;
1265 
1266 	/* allocate an skb */
1267 	skb = alloc_can_skb(ndev, &cf);
1268 	if (unlikely(skb == NULL)) {
1269 		stats->rx_dropped++;
1270 		goto err_noalloc;
1271 	}
1272 
1273 	/* convert the ICAN3 frame into Linux CAN format */
1274 	ican3_to_can_frame(mod, &desc, cf);
1275 
1276 	/*
1277 	 * If this is an ECHO frame received from the hardware loopback
1278 	 * feature, use the skb saved in the ECHO stack instead. This allows
1279 	 * the Linux CAN core to support CAN_RAW_RECV_OWN_MSGS correctly.
1280 	 *
1281 	 * Since this is a confirmation of a successfully transmitted packet
1282 	 * sent from this host, update the transmit statistics.
1283 	 *
1284 	 * Also, the netdevice queue needs to be allowed to send packets again.
1285 	 */
1286 	if (ican3_echo_skb_matches(mod, skb)) {
1287 		stats->tx_packets++;
1288 		stats->tx_bytes += ican3_get_echo_skb(mod);
1289 		kfree_skb(skb);
1290 		goto err_noalloc;
1291 	}
1292 
1293 	/* update statistics, receive the skb */
1294 	stats->rx_packets++;
1295 	stats->rx_bytes += cf->can_dlc;
1296 	netif_receive_skb(skb);
1297 
1298 err_noalloc:
1299 	/* toggle the valid bit and return the descriptor to the ring */
1300 	desc.control ^= DESC_VALID;
1301 
1302 	spin_lock_irqsave(&mod->lock, flags);
1303 
1304 	ican3_set_page(mod, mod->fastrx_start + (mod->fastrx_num / 16));
1305 	memcpy_toio(desc_addr, &desc, 1);
1306 
1307 	/* update the next buffer pointer */
1308 	mod->fastrx_num = (desc.control & DESC_WRAP) ? 0
1309 						     : (mod->fastrx_num + 1);
1310 
1311 	/* there are still more buffers to process */
1312 	spin_unlock_irqrestore(&mod->lock, flags);
1313 	return 0;
1314 }
1315 
1316 static int ican3_napi(struct napi_struct *napi, int budget)
1317 {
1318 	struct ican3_dev *mod = container_of(napi, struct ican3_dev, napi);
1319 	unsigned long flags;
1320 	int received = 0;
1321 	int ret;
1322 
1323 	/* process all communication messages */
1324 	while (true) {
1325 		struct ican3_msg msg;
1326 		ret = ican3_recv_msg(mod, &msg);
1327 		if (ret)
1328 			break;
1329 
1330 		ican3_handle_message(mod, &msg);
1331 	}
1332 
1333 	/* process all CAN frames from the fast interface */
1334 	while (received < budget) {
1335 		ret = ican3_recv_skb(mod);
1336 		if (ret)
1337 			break;
1338 
1339 		received++;
1340 	}
1341 
1342 	/* We have processed all packets that the adapter had, but it
1343 	 * was less than our budget, stop polling */
1344 	if (received < budget)
1345 		napi_complete(napi);
1346 
1347 	spin_lock_irqsave(&mod->lock, flags);
1348 
1349 	/* Wake up the transmit queue if necessary */
1350 	if (netif_queue_stopped(mod->ndev) && ican3_txok(mod))
1351 		netif_wake_queue(mod->ndev);
1352 
1353 	spin_unlock_irqrestore(&mod->lock, flags);
1354 
1355 	/* re-enable interrupt generation */
1356 	iowrite8(1 << mod->num, &mod->ctrl->int_enable);
1357 	return received;
1358 }
1359 
1360 static irqreturn_t ican3_irq(int irq, void *dev_id)
1361 {
1362 	struct ican3_dev *mod = dev_id;
1363 	u8 stat;
1364 
1365 	/*
1366 	 * The interrupt status register on this device reports interrupts
1367 	 * as zeroes instead of using ones like most other devices
1368 	 */
1369 	stat = ioread8(&mod->ctrl->int_disable) & (1 << mod->num);
1370 	if (stat == (1 << mod->num))
1371 		return IRQ_NONE;
1372 
1373 	/* clear the MODULbus interrupt from the microcontroller */
1374 	ioread8(&mod->dpmctrl->interrupt);
1375 
1376 	/* disable interrupt generation, schedule the NAPI poller */
1377 	iowrite8(1 << mod->num, &mod->ctrl->int_disable);
1378 	napi_schedule(&mod->napi);
1379 	return IRQ_HANDLED;
1380 }
1381 
1382 /*
1383  * Firmware reset, startup, and shutdown
1384  */
1385 
1386 /*
1387  * Reset an ICAN module to its power-on state
1388  *
1389  * CONTEXT: no network device registered
1390  */
1391 static int ican3_reset_module(struct ican3_dev *mod)
1392 {
1393 	unsigned long start;
1394 	u8 runold, runnew;
1395 
1396 	/* disable interrupts so no more work is scheduled */
1397 	iowrite8(1 << mod->num, &mod->ctrl->int_disable);
1398 
1399 	/* the first unallocated page in the DPM is #9 */
1400 	mod->free_page = DPM_FREE_START;
1401 
1402 	ican3_set_page(mod, QUEUE_OLD_CONTROL);
1403 	runold = ioread8(mod->dpm + TARGET_RUNNING);
1404 
1405 	/* reset the module */
1406 	iowrite8(0x00, &mod->dpmctrl->hwreset);
1407 
1408 	/* wait until the module has finished resetting and is running */
1409 	start = jiffies;
1410 	do {
1411 		ican3_set_page(mod, QUEUE_OLD_CONTROL);
1412 		runnew = ioread8(mod->dpm + TARGET_RUNNING);
1413 		if (runnew == (runold ^ 0xff))
1414 			return 0;
1415 
1416 		msleep(10);
1417 	} while (time_before(jiffies, start + HZ / 4));
1418 
1419 	dev_err(mod->dev, "failed to reset CAN module\n");
1420 	return -ETIMEDOUT;
1421 }
1422 
1423 static void ican3_shutdown_module(struct ican3_dev *mod)
1424 {
1425 	ican3_msg_disconnect(mod);
1426 	ican3_reset_module(mod);
1427 }
1428 
1429 /*
1430  * Startup an ICAN module, bringing it into fast mode
1431  */
1432 static int ican3_startup_module(struct ican3_dev *mod)
1433 {
1434 	int ret;
1435 
1436 	ret = ican3_reset_module(mod);
1437 	if (ret) {
1438 		dev_err(mod->dev, "unable to reset module\n");
1439 		return ret;
1440 	}
1441 
1442 	/* re-enable interrupts so we can send messages */
1443 	iowrite8(1 << mod->num, &mod->ctrl->int_enable);
1444 
1445 	ret = ican3_msg_connect(mod);
1446 	if (ret) {
1447 		dev_err(mod->dev, "unable to connect to module\n");
1448 		return ret;
1449 	}
1450 
1451 	ican3_init_new_host_interface(mod);
1452 	ret = ican3_msg_newhostif(mod);
1453 	if (ret) {
1454 		dev_err(mod->dev, "unable to switch to new-style interface\n");
1455 		return ret;
1456 	}
1457 
1458 	/* default to "termination on" */
1459 	ret = ican3_set_termination(mod, true);
1460 	if (ret) {
1461 		dev_err(mod->dev, "unable to enable termination\n");
1462 		return ret;
1463 	}
1464 
1465 	/* default to "bus errors enabled" */
1466 	ret = ican3_set_buserror(mod, 1);
1467 	if (ret) {
1468 		dev_err(mod->dev, "unable to set bus-error\n");
1469 		return ret;
1470 	}
1471 
1472 	ican3_init_fast_host_interface(mod);
1473 	ret = ican3_msg_fasthostif(mod);
1474 	if (ret) {
1475 		dev_err(mod->dev, "unable to switch to fast host interface\n");
1476 		return ret;
1477 	}
1478 
1479 	ret = ican3_set_id_filter(mod, true);
1480 	if (ret) {
1481 		dev_err(mod->dev, "unable to set acceptance filter\n");
1482 		return ret;
1483 	}
1484 
1485 	return 0;
1486 }
1487 
1488 /*
1489  * CAN Network Device
1490  */
1491 
1492 static int ican3_open(struct net_device *ndev)
1493 {
1494 	struct ican3_dev *mod = netdev_priv(ndev);
1495 	int ret;
1496 
1497 	/* open the CAN layer */
1498 	ret = open_candev(ndev);
1499 	if (ret) {
1500 		dev_err(mod->dev, "unable to start CAN layer\n");
1501 		return ret;
1502 	}
1503 
1504 	/* bring the bus online */
1505 	ret = ican3_set_bus_state(mod, true);
1506 	if (ret) {
1507 		dev_err(mod->dev, "unable to set bus-on\n");
1508 		close_candev(ndev);
1509 		return ret;
1510 	}
1511 
1512 	/* start up the network device */
1513 	mod->can.state = CAN_STATE_ERROR_ACTIVE;
1514 	netif_start_queue(ndev);
1515 
1516 	return 0;
1517 }
1518 
1519 static int ican3_stop(struct net_device *ndev)
1520 {
1521 	struct ican3_dev *mod = netdev_priv(ndev);
1522 	int ret;
1523 
1524 	/* stop the network device xmit routine */
1525 	netif_stop_queue(ndev);
1526 	mod->can.state = CAN_STATE_STOPPED;
1527 
1528 	/* bring the bus offline, stop receiving packets */
1529 	ret = ican3_set_bus_state(mod, false);
1530 	if (ret) {
1531 		dev_err(mod->dev, "unable to set bus-off\n");
1532 		return ret;
1533 	}
1534 
1535 	/* drop all outstanding echo skbs */
1536 	skb_queue_purge(&mod->echoq);
1537 
1538 	/* close the CAN layer */
1539 	close_candev(ndev);
1540 	return 0;
1541 }
1542 
1543 static int ican3_xmit(struct sk_buff *skb, struct net_device *ndev)
1544 {
1545 	struct ican3_dev *mod = netdev_priv(ndev);
1546 	struct can_frame *cf = (struct can_frame *)skb->data;
1547 	struct ican3_fast_desc desc;
1548 	void __iomem *desc_addr;
1549 	unsigned long flags;
1550 
1551 	if (can_dropped_invalid_skb(ndev, skb))
1552 		return NETDEV_TX_OK;
1553 
1554 	spin_lock_irqsave(&mod->lock, flags);
1555 
1556 	/* check that we can actually transmit */
1557 	if (!ican3_txok(mod)) {
1558 		dev_err(mod->dev, "BUG: no free descriptors\n");
1559 		spin_unlock_irqrestore(&mod->lock, flags);
1560 		return NETDEV_TX_BUSY;
1561 	}
1562 
1563 	/* copy the control bits of the descriptor */
1564 	ican3_set_page(mod, mod->fasttx_start + (mod->fasttx_num / 16));
1565 	desc_addr = mod->dpm + ((mod->fasttx_num % 16) * sizeof(desc));
1566 	memset(&desc, 0, sizeof(desc));
1567 	memcpy_fromio(&desc, desc_addr, 1);
1568 
1569 	/* convert the Linux CAN frame into ICAN3 format */
1570 	can_frame_to_ican3(mod, cf, &desc);
1571 
1572 	/*
1573 	 * This hardware doesn't have TX-done notifications, so we'll try and
1574 	 * emulate it the best we can using ECHO skbs. Add the skb to the ECHO
1575 	 * stack. Upon packet reception, check if the ECHO skb and received
1576 	 * skb match, and use that to wake the queue.
1577 	 */
1578 	ican3_put_echo_skb(mod, skb);
1579 
1580 	/*
1581 	 * the programming manual says that you must set the IVALID bit, then
1582 	 * interrupt, then set the valid bit. Quite weird, but it seems to be
1583 	 * required for this to work
1584 	 */
1585 	desc.control |= DESC_IVALID;
1586 	memcpy_toio(desc_addr, &desc, sizeof(desc));
1587 
1588 	/* generate a MODULbus interrupt to the microcontroller */
1589 	iowrite8(0x01, &mod->dpmctrl->interrupt);
1590 
1591 	desc.control ^= DESC_VALID;
1592 	memcpy_toio(desc_addr, &desc, sizeof(desc));
1593 
1594 	/* update the next buffer pointer */
1595 	mod->fasttx_num = (desc.control & DESC_WRAP) ? 0
1596 						     : (mod->fasttx_num + 1);
1597 
1598 	/* if there is no free descriptor space, stop the transmit queue */
1599 	if (!ican3_txok(mod))
1600 		netif_stop_queue(ndev);
1601 
1602 	spin_unlock_irqrestore(&mod->lock, flags);
1603 	return NETDEV_TX_OK;
1604 }
1605 
1606 static const struct net_device_ops ican3_netdev_ops = {
1607 	.ndo_open	= ican3_open,
1608 	.ndo_stop	= ican3_stop,
1609 	.ndo_start_xmit	= ican3_xmit,
1610 };
1611 
1612 /*
1613  * Low-level CAN Device
1614  */
1615 
1616 /* This structure was stolen from drivers/net/can/sja1000/sja1000.c */
1617 static const struct can_bittiming_const ican3_bittiming_const = {
1618 	.name = DRV_NAME,
1619 	.tseg1_min = 1,
1620 	.tseg1_max = 16,
1621 	.tseg2_min = 1,
1622 	.tseg2_max = 8,
1623 	.sjw_max = 4,
1624 	.brp_min = 1,
1625 	.brp_max = 64,
1626 	.brp_inc = 1,
1627 };
1628 
1629 /*
1630  * This routine was stolen from drivers/net/can/sja1000/sja1000.c
1631  *
1632  * The bittiming register command for the ICAN3 just sets the bit timing
1633  * registers on the SJA1000 chip directly
1634  */
1635 static int ican3_set_bittiming(struct net_device *ndev)
1636 {
1637 	struct ican3_dev *mod = netdev_priv(ndev);
1638 	struct can_bittiming *bt = &mod->can.bittiming;
1639 	struct ican3_msg msg;
1640 	u8 btr0, btr1;
1641 
1642 	btr0 = ((bt->brp - 1) & 0x3f) | (((bt->sjw - 1) & 0x3) << 6);
1643 	btr1 = ((bt->prop_seg + bt->phase_seg1 - 1) & 0xf) |
1644 		(((bt->phase_seg2 - 1) & 0x7) << 4);
1645 	if (mod->can.ctrlmode & CAN_CTRLMODE_3_SAMPLES)
1646 		btr1 |= 0x80;
1647 
1648 	memset(&msg, 0, sizeof(msg));
1649 	msg.spec = MSG_CBTRREQ;
1650 	msg.len = cpu_to_le16(4);
1651 	msg.data[0] = 0x00;
1652 	msg.data[1] = 0x00;
1653 	msg.data[2] = btr0;
1654 	msg.data[3] = btr1;
1655 
1656 	return ican3_send_msg(mod, &msg);
1657 }
1658 
1659 static int ican3_set_mode(struct net_device *ndev, enum can_mode mode)
1660 {
1661 	struct ican3_dev *mod = netdev_priv(ndev);
1662 	int ret;
1663 
1664 	if (mode != CAN_MODE_START)
1665 		return -ENOTSUPP;
1666 
1667 	/* bring the bus online */
1668 	ret = ican3_set_bus_state(mod, true);
1669 	if (ret) {
1670 		dev_err(mod->dev, "unable to set bus-on\n");
1671 		return ret;
1672 	}
1673 
1674 	/* start up the network device */
1675 	mod->can.state = CAN_STATE_ERROR_ACTIVE;
1676 
1677 	if (netif_queue_stopped(ndev))
1678 		netif_wake_queue(ndev);
1679 
1680 	return 0;
1681 }
1682 
1683 static int ican3_get_berr_counter(const struct net_device *ndev,
1684 				  struct can_berr_counter *bec)
1685 {
1686 	struct ican3_dev *mod = netdev_priv(ndev);
1687 	int ret;
1688 
1689 	ret = ican3_send_inquiry(mod, INQUIRY_STATUS);
1690 	if (ret)
1691 		return ret;
1692 
1693 	ret = wait_for_completion_timeout(&mod->buserror_comp, HZ);
1694 	if (ret == 0) {
1695 		dev_info(mod->dev, "%s timed out\n", __func__);
1696 		return -ETIMEDOUT;
1697 	}
1698 
1699 	bec->rxerr = mod->bec.rxerr;
1700 	bec->txerr = mod->bec.txerr;
1701 	return 0;
1702 }
1703 
1704 /*
1705  * Sysfs Attributes
1706  */
1707 
1708 static ssize_t ican3_sysfs_show_term(struct device *dev,
1709 				     struct device_attribute *attr,
1710 				     char *buf)
1711 {
1712 	struct ican3_dev *mod = netdev_priv(to_net_dev(dev));
1713 	int ret;
1714 
1715 	ret = ican3_send_inquiry(mod, INQUIRY_TERMINATION);
1716 	if (ret)
1717 		return ret;
1718 
1719 	ret = wait_for_completion_timeout(&mod->termination_comp, HZ);
1720 	if (ret == 0) {
1721 		dev_info(mod->dev, "%s timed out\n", __func__);
1722 		return -ETIMEDOUT;
1723 	}
1724 
1725 	return snprintf(buf, PAGE_SIZE, "%u\n", mod->termination_enabled);
1726 }
1727 
1728 static ssize_t ican3_sysfs_set_term(struct device *dev,
1729 				    struct device_attribute *attr,
1730 				    const char *buf, size_t count)
1731 {
1732 	struct ican3_dev *mod = netdev_priv(to_net_dev(dev));
1733 	unsigned long enable;
1734 	int ret;
1735 
1736 	if (kstrtoul(buf, 0, &enable))
1737 		return -EINVAL;
1738 
1739 	ret = ican3_set_termination(mod, enable);
1740 	if (ret)
1741 		return ret;
1742 
1743 	return count;
1744 }
1745 
1746 static DEVICE_ATTR(termination, S_IWUSR | S_IRUGO, ican3_sysfs_show_term,
1747 						   ican3_sysfs_set_term);
1748 
1749 static struct attribute *ican3_sysfs_attrs[] = {
1750 	&dev_attr_termination.attr,
1751 	NULL,
1752 };
1753 
1754 static struct attribute_group ican3_sysfs_attr_group = {
1755 	.attrs = ican3_sysfs_attrs,
1756 };
1757 
1758 /*
1759  * PCI Subsystem
1760  */
1761 
1762 static int ican3_probe(struct platform_device *pdev)
1763 {
1764 	struct janz_platform_data *pdata;
1765 	struct net_device *ndev;
1766 	struct ican3_dev *mod;
1767 	struct resource *res;
1768 	struct device *dev;
1769 	int ret;
1770 
1771 	pdata = dev_get_platdata(&pdev->dev);
1772 	if (!pdata)
1773 		return -ENXIO;
1774 
1775 	dev_dbg(&pdev->dev, "probe: module number %d\n", pdata->modno);
1776 
1777 	/* save the struct device for printing */
1778 	dev = &pdev->dev;
1779 
1780 	/* allocate the CAN device and private data */
1781 	ndev = alloc_candev(sizeof(*mod), 0);
1782 	if (!ndev) {
1783 		dev_err(dev, "unable to allocate CANdev\n");
1784 		ret = -ENOMEM;
1785 		goto out_return;
1786 	}
1787 
1788 	platform_set_drvdata(pdev, ndev);
1789 	mod = netdev_priv(ndev);
1790 	mod->ndev = ndev;
1791 	mod->dev = &pdev->dev;
1792 	mod->num = pdata->modno;
1793 	netif_napi_add(ndev, &mod->napi, ican3_napi, ICAN3_RX_BUFFERS);
1794 	skb_queue_head_init(&mod->echoq);
1795 	spin_lock_init(&mod->lock);
1796 	init_completion(&mod->termination_comp);
1797 	init_completion(&mod->buserror_comp);
1798 
1799 	/* setup device-specific sysfs attributes */
1800 	ndev->sysfs_groups[0] = &ican3_sysfs_attr_group;
1801 
1802 	/* the first unallocated page in the DPM is 9 */
1803 	mod->free_page = DPM_FREE_START;
1804 
1805 	ndev->netdev_ops = &ican3_netdev_ops;
1806 	ndev->flags |= IFF_ECHO;
1807 	SET_NETDEV_DEV(ndev, &pdev->dev);
1808 
1809 	mod->can.clock.freq = ICAN3_CAN_CLOCK;
1810 	mod->can.bittiming_const = &ican3_bittiming_const;
1811 	mod->can.do_set_bittiming = ican3_set_bittiming;
1812 	mod->can.do_set_mode = ican3_set_mode;
1813 	mod->can.do_get_berr_counter = ican3_get_berr_counter;
1814 	mod->can.ctrlmode_supported = CAN_CTRLMODE_3_SAMPLES
1815 				    | CAN_CTRLMODE_BERR_REPORTING
1816 				    | CAN_CTRLMODE_ONE_SHOT;
1817 
1818 	/* find our IRQ number */
1819 	mod->irq = platform_get_irq(pdev, 0);
1820 	if (mod->irq < 0) {
1821 		dev_err(dev, "IRQ line not found\n");
1822 		ret = -ENODEV;
1823 		goto out_free_ndev;
1824 	}
1825 
1826 	ndev->irq = mod->irq;
1827 
1828 	/* get access to the MODULbus registers for this module */
1829 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1830 	if (!res) {
1831 		dev_err(dev, "MODULbus registers not found\n");
1832 		ret = -ENODEV;
1833 		goto out_free_ndev;
1834 	}
1835 
1836 	mod->dpm = ioremap(res->start, resource_size(res));
1837 	if (!mod->dpm) {
1838 		dev_err(dev, "MODULbus registers not ioremap\n");
1839 		ret = -ENOMEM;
1840 		goto out_free_ndev;
1841 	}
1842 
1843 	mod->dpmctrl = mod->dpm + DPM_PAGE_SIZE;
1844 
1845 	/* get access to the control registers for this module */
1846 	res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
1847 	if (!res) {
1848 		dev_err(dev, "CONTROL registers not found\n");
1849 		ret = -ENODEV;
1850 		goto out_iounmap_dpm;
1851 	}
1852 
1853 	mod->ctrl = ioremap(res->start, resource_size(res));
1854 	if (!mod->ctrl) {
1855 		dev_err(dev, "CONTROL registers not ioremap\n");
1856 		ret = -ENOMEM;
1857 		goto out_iounmap_dpm;
1858 	}
1859 
1860 	/* disable our IRQ, then hookup the IRQ handler */
1861 	iowrite8(1 << mod->num, &mod->ctrl->int_disable);
1862 	ret = request_irq(mod->irq, ican3_irq, IRQF_SHARED, DRV_NAME, mod);
1863 	if (ret) {
1864 		dev_err(dev, "unable to request IRQ\n");
1865 		goto out_iounmap_ctrl;
1866 	}
1867 
1868 	/* reset and initialize the CAN controller into fast mode */
1869 	napi_enable(&mod->napi);
1870 	ret = ican3_startup_module(mod);
1871 	if (ret) {
1872 		dev_err(dev, "%s: unable to start CANdev\n", __func__);
1873 		goto out_free_irq;
1874 	}
1875 
1876 	/* register with the Linux CAN layer */
1877 	ret = register_candev(ndev);
1878 	if (ret) {
1879 		dev_err(dev, "%s: unable to register CANdev\n", __func__);
1880 		goto out_free_irq;
1881 	}
1882 
1883 	dev_info(dev, "module %d: registered CAN device\n", pdata->modno);
1884 	return 0;
1885 
1886 out_free_irq:
1887 	napi_disable(&mod->napi);
1888 	iowrite8(1 << mod->num, &mod->ctrl->int_disable);
1889 	free_irq(mod->irq, mod);
1890 out_iounmap_ctrl:
1891 	iounmap(mod->ctrl);
1892 out_iounmap_dpm:
1893 	iounmap(mod->dpm);
1894 out_free_ndev:
1895 	free_candev(ndev);
1896 out_return:
1897 	return ret;
1898 }
1899 
1900 static int ican3_remove(struct platform_device *pdev)
1901 {
1902 	struct net_device *ndev = platform_get_drvdata(pdev);
1903 	struct ican3_dev *mod = netdev_priv(ndev);
1904 
1905 	/* unregister the netdevice, stop interrupts */
1906 	unregister_netdev(ndev);
1907 	napi_disable(&mod->napi);
1908 	iowrite8(1 << mod->num, &mod->ctrl->int_disable);
1909 	free_irq(mod->irq, mod);
1910 
1911 	/* put the module into reset */
1912 	ican3_shutdown_module(mod);
1913 
1914 	/* unmap all registers */
1915 	iounmap(mod->ctrl);
1916 	iounmap(mod->dpm);
1917 
1918 	free_candev(ndev);
1919 
1920 	return 0;
1921 }
1922 
1923 static struct platform_driver ican3_driver = {
1924 	.driver		= {
1925 		.name	= DRV_NAME,
1926 		.owner	= THIS_MODULE,
1927 	},
1928 	.probe		= ican3_probe,
1929 	.remove		= ican3_remove,
1930 };
1931 
1932 module_platform_driver(ican3_driver);
1933 
1934 MODULE_AUTHOR("Ira W. Snyder <iws@ovro.caltech.edu>");
1935 MODULE_DESCRIPTION("Janz MODULbus VMOD-ICAN3 Driver");
1936 MODULE_LICENSE("GPL");
1937 MODULE_ALIAS("platform:janz-ican3");
1938