1 /* 2 * Core driver for the CC770 and AN82527 CAN controllers 3 * 4 * Copyright (C) 2009, 2011 Wolfgang Grandegger <wg@grandegger.com> 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the version 2 of the GNU General Public License 8 * as published by the Free Software Foundation 9 * 10 * This program is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 */ 15 16 #ifndef CC770_DEV_H 17 #define CC770_DEV_H 18 19 #include <linux/can/dev.h> 20 21 struct cc770_msgobj { 22 u8 ctrl0; 23 u8 ctrl1; 24 u8 id[4]; 25 u8 config; 26 u8 data[8]; 27 u8 dontuse; /* padding */ 28 } __packed; 29 30 struct cc770_regs { 31 union { 32 struct cc770_msgobj msgobj[16]; /* Message object 1..15 */ 33 struct { 34 u8 control; /* Control Register */ 35 u8 status; /* Status Register */ 36 u8 cpu_interface; /* CPU Interface Register */ 37 u8 dontuse1; 38 u8 high_speed_read[2]; /* High Speed Read */ 39 u8 global_mask_std[2]; /* Standard Global Mask */ 40 u8 global_mask_ext[4]; /* Extended Global Mask */ 41 u8 msg15_mask[4]; /* Message 15 Mask */ 42 u8 dontuse2[15]; 43 u8 clkout; /* Clock Out Register */ 44 u8 dontuse3[15]; 45 u8 bus_config; /* Bus Configuration Register */ 46 u8 dontuse4[15]; 47 u8 bit_timing_0; /* Bit Timing Register byte 0 */ 48 u8 dontuse5[15]; 49 u8 bit_timing_1; /* Bit Timing Register byte 1 */ 50 u8 dontuse6[15]; 51 u8 interrupt; /* Interrupt Register */ 52 u8 dontuse7[15]; 53 u8 rx_error_counter; /* Receive Error Counter */ 54 u8 dontuse8[15]; 55 u8 tx_error_counter; /* Transmit Error Counter */ 56 u8 dontuse9[31]; 57 u8 p1_conf; 58 u8 dontuse10[15]; 59 u8 p2_conf; 60 u8 dontuse11[15]; 61 u8 p1_in; 62 u8 dontuse12[15]; 63 u8 p2_in; 64 u8 dontuse13[15]; 65 u8 p1_out; 66 u8 dontuse14[15]; 67 u8 p2_out; 68 u8 dontuse15[15]; 69 u8 serial_reset_addr; 70 }; 71 }; 72 } __packed; 73 74 /* Control Register (0x00) */ 75 #define CTRL_INI 0x01 /* Initialization */ 76 #define CTRL_IE 0x02 /* Interrupt Enable */ 77 #define CTRL_SIE 0x04 /* Status Interrupt Enable */ 78 #define CTRL_EIE 0x08 /* Error Interrupt Enable */ 79 #define CTRL_EAF 0x20 /* Enable additional functions */ 80 #define CTRL_CCE 0x40 /* Change Configuration Enable */ 81 82 /* Status Register (0x01) */ 83 #define STAT_LEC_STUFF 0x01 /* Stuff error */ 84 #define STAT_LEC_FORM 0x02 /* Form error */ 85 #define STAT_LEC_ACK 0x03 /* Acknowledgement error */ 86 #define STAT_LEC_BIT1 0x04 /* Bit1 error */ 87 #define STAT_LEC_BIT0 0x05 /* Bit0 error */ 88 #define STAT_LEC_CRC 0x06 /* CRC error */ 89 #define STAT_LEC_MASK 0x07 /* Last Error Code mask */ 90 #define STAT_TXOK 0x08 /* Transmit Message Successfully */ 91 #define STAT_RXOK 0x10 /* Receive Message Successfully */ 92 #define STAT_WAKE 0x20 /* Wake Up Status */ 93 #define STAT_WARN 0x40 /* Warning Status */ 94 #define STAT_BOFF 0x80 /* Bus Off Status */ 95 96 /* 97 * CPU Interface Register (0x02) 98 * Clock Out Register (0x1f) 99 * Bus Configuration Register (0x2f) 100 * 101 * see include/linux/can/platform/cc770.h 102 */ 103 104 /* Message Control Register 0 (Base Address + 0x0) */ 105 #define INTPND_RES 0x01 /* No Interrupt pending */ 106 #define INTPND_SET 0x02 /* Interrupt pending */ 107 #define INTPND_UNC 0x03 108 #define RXIE_RES 0x04 /* Receive Interrupt Disable */ 109 #define RXIE_SET 0x08 /* Receive Interrupt Enable */ 110 #define RXIE_UNC 0x0c 111 #define TXIE_RES 0x10 /* Transmit Interrupt Disable */ 112 #define TXIE_SET 0x20 /* Transmit Interrupt Enable */ 113 #define TXIE_UNC 0x30 114 #define MSGVAL_RES 0x40 /* Message Invalid */ 115 #define MSGVAL_SET 0x80 /* Message Valid */ 116 #define MSGVAL_UNC 0xc0 117 118 /* Message Control Register 1 (Base Address + 0x01) */ 119 #define NEWDAT_RES 0x01 /* No New Data */ 120 #define NEWDAT_SET 0x02 /* New Data */ 121 #define NEWDAT_UNC 0x03 122 #define MSGLST_RES 0x04 /* No Message Lost */ 123 #define MSGLST_SET 0x08 /* Message Lost */ 124 #define MSGLST_UNC 0x0c 125 #define CPUUPD_RES 0x04 /* No CPU Updating */ 126 #define CPUUPD_SET 0x08 /* CPU Updating */ 127 #define CPUUPD_UNC 0x0c 128 #define TXRQST_RES 0x10 /* No Transmission Request */ 129 #define TXRQST_SET 0x20 /* Transmission Request */ 130 #define TXRQST_UNC 0x30 131 #define RMTPND_RES 0x40 /* No Remote Request Pending */ 132 #define RMTPND_SET 0x80 /* Remote Request Pending */ 133 #define RMTPND_UNC 0xc0 134 135 /* Message Configuration Register (Base Address + 0x06) */ 136 #define MSGCFG_XTD 0x04 /* Extended Identifier */ 137 #define MSGCFG_DIR 0x08 /* Direction is Transmit */ 138 139 #define MSGOBJ_FIRST 1 140 #define MSGOBJ_LAST 15 141 142 #define CC770_IO_SIZE 0x100 143 #define CC770_MAX_IRQ 20 /* max. number of interrupts handled in ISR */ 144 #define CC770_MAX_MSG 4 /* max. number of messages handled in ISR */ 145 146 #define CC770_ECHO_SKB_MAX 1 147 148 #define cc770_read_reg(priv, member) \ 149 priv->read_reg(priv, offsetof(struct cc770_regs, member)) 150 151 #define cc770_write_reg(priv, member, value) \ 152 priv->write_reg(priv, offsetof(struct cc770_regs, member), value) 153 154 /* 155 * Message objects and flags used by this driver 156 */ 157 #define CC770_OBJ_FLAG_RX 0x01 158 #define CC770_OBJ_FLAG_RTR 0x02 159 #define CC770_OBJ_FLAG_EFF 0x04 160 161 enum { 162 CC770_OBJ_RX0 = 0, /* for receiving normal messages */ 163 CC770_OBJ_RX1, /* for receiving normal messages */ 164 CC770_OBJ_RX_RTR0, /* for receiving remote transmission requests */ 165 CC770_OBJ_RX_RTR1, /* for receiving remote transmission requests */ 166 CC770_OBJ_TX, /* for sending messages */ 167 CC770_OBJ_MAX 168 }; 169 170 #define obj2msgobj(o) (MSGOBJ_LAST - (o)) /* message object 11..15 */ 171 172 /* 173 * CC770 private data structure 174 */ 175 struct cc770_priv { 176 struct can_priv can; /* must be the first member */ 177 struct sk_buff *echo_skb; 178 179 /* the lower-layer is responsible for appropriate locking */ 180 u8 (*read_reg)(const struct cc770_priv *priv, int reg); 181 void (*write_reg)(const struct cc770_priv *priv, int reg, u8 val); 182 void (*pre_irq)(const struct cc770_priv *priv); 183 void (*post_irq)(const struct cc770_priv *priv); 184 185 void *priv; /* for board-specific data */ 186 struct net_device *dev; 187 188 void __iomem *reg_base; /* ioremap'ed address to registers */ 189 unsigned long irq_flags; /* for request_irq() */ 190 191 unsigned char obj_flags[CC770_OBJ_MAX]; 192 u8 control_normal_mode; /* Control register for normal mode */ 193 u8 cpu_interface; /* CPU interface register */ 194 u8 clkout; /* Clock out register */ 195 u8 bus_config; /* Bus conffiguration register */ 196 }; 197 198 struct net_device *alloc_cc770dev(int sizeof_priv); 199 void free_cc770dev(struct net_device *dev); 200 int register_cc770dev(struct net_device *dev); 201 void unregister_cc770dev(struct net_device *dev); 202 203 #endif /* CC770_DEV_H */ 204