1 /* 2 * Platform CAN bus driver for Bosch C_CAN controller 3 * 4 * Copyright (C) 2010 ST Microelectronics 5 * Bhupesh Sharma <bhupesh.sharma@st.com> 6 * 7 * Borrowed heavily from the C_CAN driver originally written by: 8 * Copyright (C) 2007 9 * - Sascha Hauer, Marc Kleine-Budde, Pengutronix <s.hauer@pengutronix.de> 10 * - Simon Kallweit, intefo AG <simon.kallweit@intefo.ch> 11 * 12 * Bosch C_CAN controller is compliant to CAN protocol version 2.0 part A and B. 13 * Bosch C_CAN user manual can be obtained from: 14 * http://www.semiconductors.bosch.de/media/en/pdf/ipmodules_1/c_can/ 15 * users_manual_c_can.pdf 16 * 17 * This file is licensed under the terms of the GNU General Public 18 * License version 2. This program is licensed "as is" without any 19 * warranty of any kind, whether express or implied. 20 */ 21 22 #include <linux/kernel.h> 23 #include <linux/module.h> 24 #include <linux/interrupt.h> 25 #include <linux/delay.h> 26 #include <linux/netdevice.h> 27 #include <linux/if_arp.h> 28 #include <linux/if_ether.h> 29 #include <linux/list.h> 30 #include <linux/io.h> 31 #include <linux/platform_device.h> 32 #include <linux/clk.h> 33 #include <linux/of.h> 34 #include <linux/of_device.h> 35 36 #include <linux/can/dev.h> 37 38 #include "c_can.h" 39 40 #define CAN_RAMINIT_START_MASK(i) (0x001 << (i)) 41 #define CAN_RAMINIT_DONE_MASK(i) (0x100 << (i)) 42 #define CAN_RAMINIT_ALL_MASK(i) (0x101 << (i)) 43 static DEFINE_SPINLOCK(raminit_lock); 44 /* 45 * 16-bit c_can registers can be arranged differently in the memory 46 * architecture of different implementations. For example: 16-bit 47 * registers can be aligned to a 16-bit boundary or 32-bit boundary etc. 48 * Handle the same by providing a common read/write interface. 49 */ 50 static u16 c_can_plat_read_reg_aligned_to_16bit(struct c_can_priv *priv, 51 enum reg index) 52 { 53 return readw(priv->base + priv->regs[index]); 54 } 55 56 static void c_can_plat_write_reg_aligned_to_16bit(struct c_can_priv *priv, 57 enum reg index, u16 val) 58 { 59 writew(val, priv->base + priv->regs[index]); 60 } 61 62 static u16 c_can_plat_read_reg_aligned_to_32bit(struct c_can_priv *priv, 63 enum reg index) 64 { 65 return readw(priv->base + 2 * priv->regs[index]); 66 } 67 68 static void c_can_plat_write_reg_aligned_to_32bit(struct c_can_priv *priv, 69 enum reg index, u16 val) 70 { 71 writew(val, priv->base + 2 * priv->regs[index]); 72 } 73 74 static void c_can_hw_raminit_wait(const struct c_can_priv *priv, u32 mask, 75 u32 val) 76 { 77 /* We look only at the bits of our instance. */ 78 val &= mask; 79 while ((readl(priv->raminit_ctrlreg) & mask) != val) 80 udelay(1); 81 } 82 83 static void c_can_hw_raminit(const struct c_can_priv *priv, bool enable) 84 { 85 u32 mask = CAN_RAMINIT_ALL_MASK(priv->instance); 86 u32 ctrl; 87 88 spin_lock(&raminit_lock); 89 90 ctrl = readl(priv->raminit_ctrlreg); 91 /* We clear the done and start bit first. The start bit is 92 * looking at the 0 -> transition, but is not self clearing; 93 * And we clear the init done bit as well. 94 */ 95 ctrl &= ~CAN_RAMINIT_START_MASK(priv->instance); 96 ctrl |= CAN_RAMINIT_DONE_MASK(priv->instance); 97 writel(ctrl, priv->raminit_ctrlreg); 98 ctrl &= ~CAN_RAMINIT_DONE_MASK(priv->instance); 99 c_can_hw_raminit_wait(priv, ctrl, mask); 100 101 if (enable) { 102 /* Set start bit and wait for the done bit. */ 103 ctrl |= CAN_RAMINIT_START_MASK(priv->instance); 104 writel(ctrl, priv->raminit_ctrlreg); 105 ctrl |= CAN_RAMINIT_DONE_MASK(priv->instance); 106 c_can_hw_raminit_wait(priv, ctrl, mask); 107 } 108 spin_unlock(&raminit_lock); 109 } 110 111 static struct platform_device_id c_can_id_table[] = { 112 [BOSCH_C_CAN_PLATFORM] = { 113 .name = KBUILD_MODNAME, 114 .driver_data = BOSCH_C_CAN, 115 }, 116 [BOSCH_C_CAN] = { 117 .name = "c_can", 118 .driver_data = BOSCH_C_CAN, 119 }, 120 [BOSCH_D_CAN] = { 121 .name = "d_can", 122 .driver_data = BOSCH_D_CAN, 123 }, { 124 } 125 }; 126 MODULE_DEVICE_TABLE(platform, c_can_id_table); 127 128 static const struct of_device_id c_can_of_table[] = { 129 { .compatible = "bosch,c_can", .data = &c_can_id_table[BOSCH_C_CAN] }, 130 { .compatible = "bosch,d_can", .data = &c_can_id_table[BOSCH_D_CAN] }, 131 { /* sentinel */ }, 132 }; 133 MODULE_DEVICE_TABLE(of, c_can_of_table); 134 135 static int c_can_plat_probe(struct platform_device *pdev) 136 { 137 int ret; 138 void __iomem *addr; 139 struct net_device *dev; 140 struct c_can_priv *priv; 141 const struct of_device_id *match; 142 const struct platform_device_id *id; 143 struct resource *mem, *res; 144 int irq; 145 struct clk *clk; 146 147 if (pdev->dev.of_node) { 148 match = of_match_device(c_can_of_table, &pdev->dev); 149 if (!match) { 150 dev_err(&pdev->dev, "Failed to find matching dt id\n"); 151 ret = -EINVAL; 152 goto exit; 153 } 154 id = match->data; 155 } else { 156 id = platform_get_device_id(pdev); 157 } 158 159 /* get the appropriate clk */ 160 clk = clk_get(&pdev->dev, NULL); 161 if (IS_ERR(clk)) { 162 dev_err(&pdev->dev, "no clock defined\n"); 163 ret = -ENODEV; 164 goto exit; 165 } 166 167 /* get the platform data */ 168 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 169 irq = platform_get_irq(pdev, 0); 170 if (!mem || irq <= 0) { 171 ret = -ENODEV; 172 goto exit_free_clk; 173 } 174 175 if (!request_mem_region(mem->start, resource_size(mem), 176 KBUILD_MODNAME)) { 177 dev_err(&pdev->dev, "resource unavailable\n"); 178 ret = -ENODEV; 179 goto exit_free_clk; 180 } 181 182 addr = ioremap(mem->start, resource_size(mem)); 183 if (!addr) { 184 dev_err(&pdev->dev, "failed to map can port\n"); 185 ret = -ENOMEM; 186 goto exit_release_mem; 187 } 188 189 /* allocate the c_can device */ 190 dev = alloc_c_can_dev(); 191 if (!dev) { 192 ret = -ENOMEM; 193 goto exit_iounmap; 194 } 195 196 priv = netdev_priv(dev); 197 switch (id->driver_data) { 198 case BOSCH_C_CAN: 199 priv->regs = reg_map_c_can; 200 switch (mem->flags & IORESOURCE_MEM_TYPE_MASK) { 201 case IORESOURCE_MEM_32BIT: 202 priv->read_reg = c_can_plat_read_reg_aligned_to_32bit; 203 priv->write_reg = c_can_plat_write_reg_aligned_to_32bit; 204 break; 205 case IORESOURCE_MEM_16BIT: 206 default: 207 priv->read_reg = c_can_plat_read_reg_aligned_to_16bit; 208 priv->write_reg = c_can_plat_write_reg_aligned_to_16bit; 209 break; 210 } 211 break; 212 case BOSCH_D_CAN: 213 priv->regs = reg_map_d_can; 214 priv->can.ctrlmode_supported |= CAN_CTRLMODE_3_SAMPLES; 215 priv->read_reg = c_can_plat_read_reg_aligned_to_16bit; 216 priv->write_reg = c_can_plat_write_reg_aligned_to_16bit; 217 218 if (pdev->dev.of_node) 219 priv->instance = of_alias_get_id(pdev->dev.of_node, "d_can"); 220 else 221 priv->instance = pdev->id; 222 223 res = platform_get_resource(pdev, IORESOURCE_MEM, 1); 224 priv->raminit_ctrlreg = devm_ioremap_resource(&pdev->dev, res); 225 if (IS_ERR(priv->raminit_ctrlreg) || (int)priv->instance < 0) 226 dev_info(&pdev->dev, "control memory is not used for raminit\n"); 227 else 228 priv->raminit = c_can_hw_raminit; 229 break; 230 default: 231 ret = -EINVAL; 232 goto exit_free_device; 233 } 234 235 dev->irq = irq; 236 priv->base = addr; 237 priv->device = &pdev->dev; 238 priv->can.clock.freq = clk_get_rate(clk); 239 priv->priv = clk; 240 priv->type = id->driver_data; 241 242 platform_set_drvdata(pdev, dev); 243 SET_NETDEV_DEV(dev, &pdev->dev); 244 245 ret = register_c_can_dev(dev); 246 if (ret) { 247 dev_err(&pdev->dev, "registering %s failed (err=%d)\n", 248 KBUILD_MODNAME, ret); 249 goto exit_free_device; 250 } 251 252 dev_info(&pdev->dev, "%s device registered (regs=%p, irq=%d)\n", 253 KBUILD_MODNAME, priv->base, dev->irq); 254 return 0; 255 256 exit_free_device: 257 free_c_can_dev(dev); 258 exit_iounmap: 259 iounmap(addr); 260 exit_release_mem: 261 release_mem_region(mem->start, resource_size(mem)); 262 exit_free_clk: 263 clk_put(clk); 264 exit: 265 dev_err(&pdev->dev, "probe failed\n"); 266 267 return ret; 268 } 269 270 static int c_can_plat_remove(struct platform_device *pdev) 271 { 272 struct net_device *dev = platform_get_drvdata(pdev); 273 struct c_can_priv *priv = netdev_priv(dev); 274 struct resource *mem; 275 276 unregister_c_can_dev(dev); 277 278 free_c_can_dev(dev); 279 iounmap(priv->base); 280 281 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 282 release_mem_region(mem->start, resource_size(mem)); 283 284 clk_put(priv->priv); 285 286 return 0; 287 } 288 289 #ifdef CONFIG_PM 290 static int c_can_suspend(struct platform_device *pdev, pm_message_t state) 291 { 292 int ret; 293 struct net_device *ndev = platform_get_drvdata(pdev); 294 struct c_can_priv *priv = netdev_priv(ndev); 295 296 if (priv->type != BOSCH_D_CAN) { 297 dev_warn(&pdev->dev, "Not supported\n"); 298 return 0; 299 } 300 301 if (netif_running(ndev)) { 302 netif_stop_queue(ndev); 303 netif_device_detach(ndev); 304 } 305 306 ret = c_can_power_down(ndev); 307 if (ret) { 308 netdev_err(ndev, "failed to enter power down mode\n"); 309 return ret; 310 } 311 312 priv->can.state = CAN_STATE_SLEEPING; 313 314 return 0; 315 } 316 317 static int c_can_resume(struct platform_device *pdev) 318 { 319 int ret; 320 struct net_device *ndev = platform_get_drvdata(pdev); 321 struct c_can_priv *priv = netdev_priv(ndev); 322 323 if (priv->type != BOSCH_D_CAN) { 324 dev_warn(&pdev->dev, "Not supported\n"); 325 return 0; 326 } 327 328 ret = c_can_power_up(ndev); 329 if (ret) { 330 netdev_err(ndev, "Still in power down mode\n"); 331 return ret; 332 } 333 334 priv->can.state = CAN_STATE_ERROR_ACTIVE; 335 336 if (netif_running(ndev)) { 337 netif_device_attach(ndev); 338 netif_start_queue(ndev); 339 } 340 341 return 0; 342 } 343 #else 344 #define c_can_suspend NULL 345 #define c_can_resume NULL 346 #endif 347 348 static struct platform_driver c_can_plat_driver = { 349 .driver = { 350 .name = KBUILD_MODNAME, 351 .owner = THIS_MODULE, 352 .of_match_table = c_can_of_table, 353 }, 354 .probe = c_can_plat_probe, 355 .remove = c_can_plat_remove, 356 .suspend = c_can_suspend, 357 .resume = c_can_resume, 358 .id_table = c_can_id_table, 359 }; 360 361 module_platform_driver(c_can_plat_driver); 362 363 MODULE_AUTHOR("Bhupesh Sharma <bhupesh.sharma@st.com>"); 364 MODULE_LICENSE("GPL v2"); 365 MODULE_DESCRIPTION("Platform CAN bus driver for Bosch C_CAN controller"); 366