1 /* 2 * Platform CAN bus driver for Bosch C_CAN controller 3 * 4 * Copyright (C) 2010 ST Microelectronics 5 * Bhupesh Sharma <bhupesh.sharma@st.com> 6 * 7 * Borrowed heavily from the C_CAN driver originally written by: 8 * Copyright (C) 2007 9 * - Sascha Hauer, Marc Kleine-Budde, Pengutronix <s.hauer@pengutronix.de> 10 * - Simon Kallweit, intefo AG <simon.kallweit@intefo.ch> 11 * 12 * Bosch C_CAN controller is compliant to CAN protocol version 2.0 part A and B. 13 * Bosch C_CAN user manual can be obtained from: 14 * http://www.semiconductors.bosch.de/media/en/pdf/ipmodules_1/c_can/ 15 * users_manual_c_can.pdf 16 * 17 * This file is licensed under the terms of the GNU General Public 18 * License version 2. This program is licensed "as is" without any 19 * warranty of any kind, whether express or implied. 20 */ 21 22 #include <linux/kernel.h> 23 #include <linux/module.h> 24 #include <linux/interrupt.h> 25 #include <linux/delay.h> 26 #include <linux/netdevice.h> 27 #include <linux/if_arp.h> 28 #include <linux/if_ether.h> 29 #include <linux/list.h> 30 #include <linux/io.h> 31 #include <linux/platform_device.h> 32 #include <linux/clk.h> 33 34 #include <linux/can/dev.h> 35 36 #include "c_can.h" 37 38 /* 39 * 16-bit c_can registers can be arranged differently in the memory 40 * architecture of different implementations. For example: 16-bit 41 * registers can be aligned to a 16-bit boundary or 32-bit boundary etc. 42 * Handle the same by providing a common read/write interface. 43 */ 44 static u16 c_can_plat_read_reg_aligned_to_16bit(struct c_can_priv *priv, 45 void *reg) 46 { 47 return readw(reg); 48 } 49 50 static void c_can_plat_write_reg_aligned_to_16bit(struct c_can_priv *priv, 51 void *reg, u16 val) 52 { 53 writew(val, reg); 54 } 55 56 static u16 c_can_plat_read_reg_aligned_to_32bit(struct c_can_priv *priv, 57 void *reg) 58 { 59 return readw(reg + (long)reg - (long)priv->regs); 60 } 61 62 static void c_can_plat_write_reg_aligned_to_32bit(struct c_can_priv *priv, 63 void *reg, u16 val) 64 { 65 writew(val, reg + (long)reg - (long)priv->regs); 66 } 67 68 static int __devinit c_can_plat_probe(struct platform_device *pdev) 69 { 70 int ret; 71 void __iomem *addr; 72 struct net_device *dev; 73 struct c_can_priv *priv; 74 struct resource *mem; 75 int irq; 76 #ifdef CONFIG_HAVE_CLK 77 struct clk *clk; 78 79 /* get the appropriate clk */ 80 clk = clk_get(&pdev->dev, NULL); 81 if (IS_ERR(clk)) { 82 dev_err(&pdev->dev, "no clock defined\n"); 83 ret = -ENODEV; 84 goto exit; 85 } 86 #endif 87 88 /* get the platform data */ 89 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 90 irq = platform_get_irq(pdev, 0); 91 if (!mem || irq <= 0) { 92 ret = -ENODEV; 93 goto exit_free_clk; 94 } 95 96 if (!request_mem_region(mem->start, resource_size(mem), 97 KBUILD_MODNAME)) { 98 dev_err(&pdev->dev, "resource unavailable\n"); 99 ret = -ENODEV; 100 goto exit_free_clk; 101 } 102 103 addr = ioremap(mem->start, resource_size(mem)); 104 if (!addr) { 105 dev_err(&pdev->dev, "failed to map can port\n"); 106 ret = -ENOMEM; 107 goto exit_release_mem; 108 } 109 110 /* allocate the c_can device */ 111 dev = alloc_c_can_dev(); 112 if (!dev) { 113 ret = -ENOMEM; 114 goto exit_iounmap; 115 } 116 117 priv = netdev_priv(dev); 118 119 dev->irq = irq; 120 priv->regs = addr; 121 #ifdef CONFIG_HAVE_CLK 122 priv->can.clock.freq = clk_get_rate(clk); 123 priv->priv = clk; 124 #endif 125 126 switch (mem->flags & IORESOURCE_MEM_TYPE_MASK) { 127 case IORESOURCE_MEM_32BIT: 128 priv->read_reg = c_can_plat_read_reg_aligned_to_32bit; 129 priv->write_reg = c_can_plat_write_reg_aligned_to_32bit; 130 break; 131 case IORESOURCE_MEM_16BIT: 132 default: 133 priv->read_reg = c_can_plat_read_reg_aligned_to_16bit; 134 priv->write_reg = c_can_plat_write_reg_aligned_to_16bit; 135 break; 136 } 137 138 platform_set_drvdata(pdev, dev); 139 SET_NETDEV_DEV(dev, &pdev->dev); 140 141 ret = register_c_can_dev(dev); 142 if (ret) { 143 dev_err(&pdev->dev, "registering %s failed (err=%d)\n", 144 KBUILD_MODNAME, ret); 145 goto exit_free_device; 146 } 147 148 dev_info(&pdev->dev, "%s device registered (regs=%p, irq=%d)\n", 149 KBUILD_MODNAME, priv->regs, dev->irq); 150 return 0; 151 152 exit_free_device: 153 platform_set_drvdata(pdev, NULL); 154 free_c_can_dev(dev); 155 exit_iounmap: 156 iounmap(addr); 157 exit_release_mem: 158 release_mem_region(mem->start, resource_size(mem)); 159 exit_free_clk: 160 #ifdef CONFIG_HAVE_CLK 161 clk_put(clk); 162 exit: 163 #endif 164 dev_err(&pdev->dev, "probe failed\n"); 165 166 return ret; 167 } 168 169 static int __devexit c_can_plat_remove(struct platform_device *pdev) 170 { 171 struct net_device *dev = platform_get_drvdata(pdev); 172 struct c_can_priv *priv = netdev_priv(dev); 173 struct resource *mem; 174 175 unregister_c_can_dev(dev); 176 platform_set_drvdata(pdev, NULL); 177 178 free_c_can_dev(dev); 179 iounmap(priv->regs); 180 181 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 182 release_mem_region(mem->start, resource_size(mem)); 183 184 #ifdef CONFIG_HAVE_CLK 185 clk_put(priv->priv); 186 #endif 187 188 return 0; 189 } 190 191 static struct platform_driver c_can_plat_driver = { 192 .driver = { 193 .name = KBUILD_MODNAME, 194 .owner = THIS_MODULE, 195 }, 196 .probe = c_can_plat_probe, 197 .remove = __devexit_p(c_can_plat_remove), 198 }; 199 200 static int __init c_can_plat_init(void) 201 { 202 return platform_driver_register(&c_can_plat_driver); 203 } 204 module_init(c_can_plat_init); 205 206 static void __exit c_can_plat_exit(void) 207 { 208 platform_driver_unregister(&c_can_plat_driver); 209 } 210 module_exit(c_can_plat_exit); 211 212 MODULE_AUTHOR("Bhupesh Sharma <bhupesh.sharma@st.com>"); 213 MODULE_LICENSE("GPL v2"); 214 MODULE_DESCRIPTION("Platform CAN bus driver for Bosch C_CAN controller"); 215