xref: /openbmc/linux/drivers/net/can/c_can/c_can.h (revision b34e08d5)
1 /*
2  * CAN bus driver for Bosch C_CAN controller
3  *
4  * Copyright (C) 2010 ST Microelectronics
5  * Bhupesh Sharma <bhupesh.sharma@st.com>
6  *
7  * Borrowed heavily from the C_CAN driver originally written by:
8  * Copyright (C) 2007
9  * - Sascha Hauer, Marc Kleine-Budde, Pengutronix <s.hauer@pengutronix.de>
10  * - Simon Kallweit, intefo AG <simon.kallweit@intefo.ch>
11  *
12  * Bosch C_CAN controller is compliant to CAN protocol version 2.0 part A and B.
13  * Bosch C_CAN user manual can be obtained from:
14  * http://www.semiconductors.bosch.de/media/en/pdf/ipmodules_1/c_can/
15  * users_manual_c_can.pdf
16  *
17  * This file is licensed under the terms of the GNU General Public
18  * License version 2. This program is licensed "as is" without any
19  * warranty of any kind, whether express or implied.
20  */
21 
22 #ifndef C_CAN_H
23 #define C_CAN_H
24 
25 /*
26  * IFx register masks:
27  * allow easy operation on 16-bit registers when the
28  * argument is 32-bit instead
29  */
30 #define IFX_WRITE_LOW_16BIT(x)	((x) & 0xFFFF)
31 #define IFX_WRITE_HIGH_16BIT(x)	(((x) & 0xFFFF0000) >> 16)
32 
33 /* message object split */
34 #define C_CAN_NO_OF_OBJECTS	32
35 #define C_CAN_MSG_OBJ_RX_NUM	16
36 #define C_CAN_MSG_OBJ_TX_NUM	16
37 
38 #define C_CAN_MSG_OBJ_RX_FIRST	1
39 #define C_CAN_MSG_OBJ_RX_LAST	(C_CAN_MSG_OBJ_RX_FIRST + \
40 				C_CAN_MSG_OBJ_RX_NUM - 1)
41 
42 #define C_CAN_MSG_OBJ_TX_FIRST	(C_CAN_MSG_OBJ_RX_LAST + 1)
43 #define C_CAN_MSG_OBJ_TX_LAST	(C_CAN_MSG_OBJ_TX_FIRST + \
44 				C_CAN_MSG_OBJ_TX_NUM - 1)
45 
46 #define C_CAN_MSG_OBJ_RX_SPLIT	9
47 #define C_CAN_MSG_RX_LOW_LAST	(C_CAN_MSG_OBJ_RX_SPLIT - 1)
48 
49 #define C_CAN_NEXT_MSG_OBJ_MASK	(C_CAN_MSG_OBJ_TX_NUM - 1)
50 #define RECEIVE_OBJECT_BITS	0x0000ffff
51 
52 enum reg {
53 	C_CAN_CTRL_REG = 0,
54 	C_CAN_CTRL_EX_REG,
55 	C_CAN_STS_REG,
56 	C_CAN_ERR_CNT_REG,
57 	C_CAN_BTR_REG,
58 	C_CAN_INT_REG,
59 	C_CAN_TEST_REG,
60 	C_CAN_BRPEXT_REG,
61 	C_CAN_IF1_COMREQ_REG,
62 	C_CAN_IF1_COMMSK_REG,
63 	C_CAN_IF1_MASK1_REG,
64 	C_CAN_IF1_MASK2_REG,
65 	C_CAN_IF1_ARB1_REG,
66 	C_CAN_IF1_ARB2_REG,
67 	C_CAN_IF1_MSGCTRL_REG,
68 	C_CAN_IF1_DATA1_REG,
69 	C_CAN_IF1_DATA2_REG,
70 	C_CAN_IF1_DATA3_REG,
71 	C_CAN_IF1_DATA4_REG,
72 	C_CAN_IF2_COMREQ_REG,
73 	C_CAN_IF2_COMMSK_REG,
74 	C_CAN_IF2_MASK1_REG,
75 	C_CAN_IF2_MASK2_REG,
76 	C_CAN_IF2_ARB1_REG,
77 	C_CAN_IF2_ARB2_REG,
78 	C_CAN_IF2_MSGCTRL_REG,
79 	C_CAN_IF2_DATA1_REG,
80 	C_CAN_IF2_DATA2_REG,
81 	C_CAN_IF2_DATA3_REG,
82 	C_CAN_IF2_DATA4_REG,
83 	C_CAN_TXRQST1_REG,
84 	C_CAN_TXRQST2_REG,
85 	C_CAN_NEWDAT1_REG,
86 	C_CAN_NEWDAT2_REG,
87 	C_CAN_INTPND1_REG,
88 	C_CAN_INTPND2_REG,
89 	C_CAN_MSGVAL1_REG,
90 	C_CAN_MSGVAL2_REG,
91 };
92 
93 static const u16 reg_map_c_can[] = {
94 	[C_CAN_CTRL_REG]	= 0x00,
95 	[C_CAN_STS_REG]		= 0x02,
96 	[C_CAN_ERR_CNT_REG]	= 0x04,
97 	[C_CAN_BTR_REG]		= 0x06,
98 	[C_CAN_INT_REG]		= 0x08,
99 	[C_CAN_TEST_REG]	= 0x0A,
100 	[C_CAN_BRPEXT_REG]	= 0x0C,
101 	[C_CAN_IF1_COMREQ_REG]	= 0x10,
102 	[C_CAN_IF1_COMMSK_REG]	= 0x12,
103 	[C_CAN_IF1_MASK1_REG]	= 0x14,
104 	[C_CAN_IF1_MASK2_REG]	= 0x16,
105 	[C_CAN_IF1_ARB1_REG]	= 0x18,
106 	[C_CAN_IF1_ARB2_REG]	= 0x1A,
107 	[C_CAN_IF1_MSGCTRL_REG]	= 0x1C,
108 	[C_CAN_IF1_DATA1_REG]	= 0x1E,
109 	[C_CAN_IF1_DATA2_REG]	= 0x20,
110 	[C_CAN_IF1_DATA3_REG]	= 0x22,
111 	[C_CAN_IF1_DATA4_REG]	= 0x24,
112 	[C_CAN_IF2_COMREQ_REG]	= 0x40,
113 	[C_CAN_IF2_COMMSK_REG]	= 0x42,
114 	[C_CAN_IF2_MASK1_REG]	= 0x44,
115 	[C_CAN_IF2_MASK2_REG]	= 0x46,
116 	[C_CAN_IF2_ARB1_REG]	= 0x48,
117 	[C_CAN_IF2_ARB2_REG]	= 0x4A,
118 	[C_CAN_IF2_MSGCTRL_REG]	= 0x4C,
119 	[C_CAN_IF2_DATA1_REG]	= 0x4E,
120 	[C_CAN_IF2_DATA2_REG]	= 0x50,
121 	[C_CAN_IF2_DATA3_REG]	= 0x52,
122 	[C_CAN_IF2_DATA4_REG]	= 0x54,
123 	[C_CAN_TXRQST1_REG]	= 0x80,
124 	[C_CAN_TXRQST2_REG]	= 0x82,
125 	[C_CAN_NEWDAT1_REG]	= 0x90,
126 	[C_CAN_NEWDAT2_REG]	= 0x92,
127 	[C_CAN_INTPND1_REG]	= 0xA0,
128 	[C_CAN_INTPND2_REG]	= 0xA2,
129 	[C_CAN_MSGVAL1_REG]	= 0xB0,
130 	[C_CAN_MSGVAL2_REG]	= 0xB2,
131 };
132 
133 static const u16 reg_map_d_can[] = {
134 	[C_CAN_CTRL_REG]	= 0x00,
135 	[C_CAN_CTRL_EX_REG]	= 0x02,
136 	[C_CAN_STS_REG]		= 0x04,
137 	[C_CAN_ERR_CNT_REG]	= 0x08,
138 	[C_CAN_BTR_REG]		= 0x0C,
139 	[C_CAN_BRPEXT_REG]	= 0x0E,
140 	[C_CAN_INT_REG]		= 0x10,
141 	[C_CAN_TEST_REG]	= 0x14,
142 	[C_CAN_TXRQST1_REG]	= 0x88,
143 	[C_CAN_TXRQST2_REG]	= 0x8A,
144 	[C_CAN_NEWDAT1_REG]	= 0x9C,
145 	[C_CAN_NEWDAT2_REG]	= 0x9E,
146 	[C_CAN_INTPND1_REG]	= 0xB0,
147 	[C_CAN_INTPND2_REG]	= 0xB2,
148 	[C_CAN_MSGVAL1_REG]	= 0xC4,
149 	[C_CAN_MSGVAL2_REG]	= 0xC6,
150 	[C_CAN_IF1_COMREQ_REG]	= 0x100,
151 	[C_CAN_IF1_COMMSK_REG]	= 0x102,
152 	[C_CAN_IF1_MASK1_REG]	= 0x104,
153 	[C_CAN_IF1_MASK2_REG]	= 0x106,
154 	[C_CAN_IF1_ARB1_REG]	= 0x108,
155 	[C_CAN_IF1_ARB2_REG]	= 0x10A,
156 	[C_CAN_IF1_MSGCTRL_REG]	= 0x10C,
157 	[C_CAN_IF1_DATA1_REG]	= 0x110,
158 	[C_CAN_IF1_DATA2_REG]	= 0x112,
159 	[C_CAN_IF1_DATA3_REG]	= 0x114,
160 	[C_CAN_IF1_DATA4_REG]	= 0x116,
161 	[C_CAN_IF2_COMREQ_REG]	= 0x120,
162 	[C_CAN_IF2_COMMSK_REG]	= 0x122,
163 	[C_CAN_IF2_MASK1_REG]	= 0x124,
164 	[C_CAN_IF2_MASK2_REG]	= 0x126,
165 	[C_CAN_IF2_ARB1_REG]	= 0x128,
166 	[C_CAN_IF2_ARB2_REG]	= 0x12A,
167 	[C_CAN_IF2_MSGCTRL_REG]	= 0x12C,
168 	[C_CAN_IF2_DATA1_REG]	= 0x130,
169 	[C_CAN_IF2_DATA2_REG]	= 0x132,
170 	[C_CAN_IF2_DATA3_REG]	= 0x134,
171 	[C_CAN_IF2_DATA4_REG]	= 0x136,
172 };
173 
174 enum c_can_dev_id {
175 	BOSCH_C_CAN_PLATFORM,
176 	BOSCH_C_CAN,
177 	BOSCH_D_CAN,
178 };
179 
180 /* c_can private data structure */
181 struct c_can_priv {
182 	struct can_priv can;	/* must be the first member */
183 	struct napi_struct napi;
184 	struct net_device *dev;
185 	struct device *device;
186 	spinlock_t xmit_lock;
187 	int tx_object;
188 	int current_status;
189 	int last_status;
190 	u16 (*read_reg) (struct c_can_priv *priv, enum reg index);
191 	void (*write_reg) (struct c_can_priv *priv, enum reg index, u16 val);
192 	void __iomem *base;
193 	const u16 *regs;
194 	unsigned long irq_flags; /* for request_irq() */
195 	unsigned int tx_next;
196 	unsigned int tx_echo;
197 	void *priv;		/* for board-specific data */
198 	u16 irqstatus;
199 	enum c_can_dev_id type;
200 	u32 __iomem *raminit_ctrlreg;
201 	unsigned int instance;
202 	void (*raminit) (const struct c_can_priv *priv, bool enable);
203 	u32 dlc[C_CAN_MSG_OBJ_TX_NUM];
204 };
205 
206 struct net_device *alloc_c_can_dev(void);
207 void free_c_can_dev(struct net_device *dev);
208 int register_c_can_dev(struct net_device *dev);
209 void unregister_c_can_dev(struct net_device *dev);
210 
211 #ifdef CONFIG_PM
212 int c_can_power_up(struct net_device *dev);
213 int c_can_power_down(struct net_device *dev);
214 #endif
215 
216 #endif /* C_CAN_H */
217