1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (C) 2005, Intec Automation Inc. 4 * Copyright (C) 2014, Freescale Semiconductor, Inc. 5 */ 6 7 #include <linux/mtd/spi-nor.h> 8 9 #include "core.h" 10 11 static int 12 w25q256_post_bfpt_fixups(struct spi_nor *nor, 13 const struct sfdp_parameter_header *bfpt_header, 14 const struct sfdp_bfpt *bfpt) 15 { 16 /* 17 * W25Q256JV supports 4B opcodes but W25Q256FV does not. 18 * Unfortunately, Winbond has re-used the same JEDEC ID for both 19 * variants which prevents us from defining a new entry in the parts 20 * table. 21 * To differentiate between W25Q256JV and W25Q256FV check SFDP header 22 * version: only JV has JESD216A compliant structure (version 5). 23 */ 24 if (bfpt_header->major == SFDP_JESD216_MAJOR && 25 bfpt_header->minor == SFDP_JESD216A_MINOR) 26 nor->flags |= SNOR_F_4B_OPCODES; 27 28 return 0; 29 } 30 31 static const struct spi_nor_fixups w25q256_fixups = { 32 .post_bfpt = w25q256_post_bfpt_fixups, 33 }; 34 35 static const struct flash_info winbond_nor_parts[] = { 36 /* Winbond -- w25x "blocks" are 64K, "sectors" are 4KiB */ 37 { "w25x05", INFO(0xef3010, 0, 64 * 1024, 1) 38 NO_SFDP_FLAGS(SECT_4K) }, 39 { "w25x10", INFO(0xef3011, 0, 64 * 1024, 2) 40 NO_SFDP_FLAGS(SECT_4K) }, 41 { "w25x20", INFO(0xef3012, 0, 64 * 1024, 4) 42 NO_SFDP_FLAGS(SECT_4K) }, 43 { "w25x40", INFO(0xef3013, 0, 64 * 1024, 8) 44 NO_SFDP_FLAGS(SECT_4K) }, 45 { "w25x80", INFO(0xef3014, 0, 64 * 1024, 16) 46 NO_SFDP_FLAGS(SECT_4K) }, 47 { "w25x16", INFO(0xef3015, 0, 64 * 1024, 32) 48 NO_SFDP_FLAGS(SECT_4K) }, 49 { "w25q16dw", INFO(0xef6015, 0, 64 * 1024, 32) 50 FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) 51 NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | 52 SPI_NOR_QUAD_READ) }, 53 { "w25x32", INFO(0xef3016, 0, 64 * 1024, 64) 54 NO_SFDP_FLAGS(SECT_4K) }, 55 { "w25q16jv-im/jm", INFO(0xef7015, 0, 64 * 1024, 32) 56 FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) 57 NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | 58 SPI_NOR_QUAD_READ) }, 59 { "w25q20cl", INFO(0xef4012, 0, 64 * 1024, 4) 60 NO_SFDP_FLAGS(SECT_4K) }, 61 { "w25q20bw", INFO(0xef5012, 0, 64 * 1024, 4) 62 NO_SFDP_FLAGS(SECT_4K) }, 63 { "w25q20ew", INFO(0xef6012, 0, 64 * 1024, 4) 64 NO_SFDP_FLAGS(SECT_4K) }, 65 { "w25q32", INFO(0xef4016, 0, 64 * 1024, 64) 66 NO_SFDP_FLAGS(SECT_4K) }, 67 { "w25q32dw", INFO(0xef6016, 0, 64 * 1024, 64) 68 FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) 69 NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) 70 OTP_INFO(256, 3, 0x1000, 0x1000) }, 71 { "w25q32jv", INFO(0xef7016, 0, 64 * 1024, 64) 72 FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) 73 NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | 74 SPI_NOR_QUAD_READ) }, 75 { "w25q32jwm", INFO(0xef8016, 0, 64 * 1024, 64) 76 FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) 77 NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) 78 OTP_INFO(256, 3, 0x1000, 0x1000) }, 79 { "w25q64jwm", INFO(0xef8017, 0, 64 * 1024, 128) 80 FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) 81 NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | 82 SPI_NOR_QUAD_READ) }, 83 { "w25q128jwm", INFO(0xef8018, 0, 64 * 1024, 256) 84 FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) 85 NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | 86 SPI_NOR_QUAD_READ) }, 87 { "w25q256jwm", INFO(0xef8019, 0, 64 * 1024, 512) 88 FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) 89 NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | 90 SPI_NOR_QUAD_READ) }, 91 { "w25x64", INFO(0xef3017, 0, 64 * 1024, 128) 92 NO_SFDP_FLAGS(SECT_4K) }, 93 { "w25q64", INFO(0xef4017, 0, 64 * 1024, 128) 94 NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | 95 SPI_NOR_QUAD_READ) }, 96 { "w25q64dw", INFO(0xef6017, 0, 64 * 1024, 128) 97 FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) 98 NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | 99 SPI_NOR_QUAD_READ) }, 100 { "w25q64jvm", INFO(0xef7017, 0, 64 * 1024, 128) 101 NO_SFDP_FLAGS(SECT_4K) }, 102 { "w25q128fw", INFO(0xef6018, 0, 64 * 1024, 256) 103 FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) 104 NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | 105 SPI_NOR_QUAD_READ) }, 106 { "w25q128jv", INFO(0xef7018, 0, 64 * 1024, 256) 107 FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) 108 NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | 109 SPI_NOR_QUAD_READ) }, 110 { "w25q80", INFO(0xef5014, 0, 64 * 1024, 16) 111 NO_SFDP_FLAGS(SECT_4K) }, 112 { "w25q80bl", INFO(0xef4014, 0, 64 * 1024, 16) 113 NO_SFDP_FLAGS(SECT_4K) }, 114 { "w25q128", INFO(0xef4018, 0, 64 * 1024, 256) 115 NO_SFDP_FLAGS(SECT_4K) }, 116 { "w25q256", INFO(0xef4019, 0, 64 * 1024, 512) 117 NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) 118 .fixups = &w25q256_fixups }, 119 { "w25q256jvm", INFO(0xef7019, 0, 64 * 1024, 512) 120 PARSE_SFDP }, 121 { "w25q256jw", INFO(0xef6019, 0, 64 * 1024, 512) 122 NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | 123 SPI_NOR_QUAD_READ) }, 124 { "w25m512jv", INFO(0xef7119, 0, 64 * 1024, 1024) 125 NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ | 126 SPI_NOR_DUAL_READ) }, 127 { "w25q512jvq", INFO(0xef4020, 0, 64 * 1024, 1024) 128 NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | 129 SPI_NOR_QUAD_READ) }, 130 }; 131 132 /** 133 * winbond_nor_set_4byte_addr_mode() - Set 4-byte address mode for Winbond 134 * flashes. 135 * @nor: pointer to 'struct spi_nor'. 136 * @enable: true to enter the 4-byte address mode, false to exit the 4-byte 137 * address mode. 138 * 139 * Return: 0 on success, -errno otherwise. 140 */ 141 static int winbond_nor_set_4byte_addr_mode(struct spi_nor *nor, bool enable) 142 { 143 int ret; 144 145 ret = spi_nor_set_4byte_addr_mode(nor, enable); 146 if (ret || enable) 147 return ret; 148 149 /* 150 * On Winbond W25Q256FV, leaving 4byte mode causes the Extended Address 151 * Register to be set to 1, so all 3-byte-address reads come from the 152 * second 16M. We must clear the register to enable normal behavior. 153 */ 154 ret = spi_nor_write_enable(nor); 155 if (ret) 156 return ret; 157 158 ret = spi_nor_write_ear(nor, 0); 159 if (ret) 160 return ret; 161 162 return spi_nor_write_disable(nor); 163 } 164 165 static const struct spi_nor_otp_ops winbond_nor_otp_ops = { 166 .read = spi_nor_otp_read_secr, 167 .write = spi_nor_otp_write_secr, 168 .erase = spi_nor_otp_erase_secr, 169 .lock = spi_nor_otp_lock_sr2, 170 .is_locked = spi_nor_otp_is_locked_sr2, 171 }; 172 173 static void winbond_nor_default_init(struct spi_nor *nor) 174 { 175 nor->params->set_4byte_addr_mode = winbond_nor_set_4byte_addr_mode; 176 } 177 178 static void winbond_nor_late_init(struct spi_nor *nor) 179 { 180 if (nor->params->otp.org->n_regions) 181 nor->params->otp.ops = &winbond_nor_otp_ops; 182 } 183 184 static const struct spi_nor_fixups winbond_nor_fixups = { 185 .default_init = winbond_nor_default_init, 186 .late_init = winbond_nor_late_init, 187 }; 188 189 const struct spi_nor_manufacturer spi_nor_winbond = { 190 .name = "winbond", 191 .parts = winbond_nor_parts, 192 .nparts = ARRAY_SIZE(winbond_nor_parts), 193 .fixups = &winbond_nor_fixups, 194 }; 195