1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (C) 2005, Intec Automation Inc. 4 * Copyright (C) 2014, Freescale Semiconductor, Inc. 5 */ 6 7 #include <linux/mtd/spi-nor.h> 8 9 #include "core.h" 10 11 #define SST26VF_CR_BPNV BIT(3) 12 13 static int sst26vf_lock(struct spi_nor *nor, loff_t ofs, uint64_t len) 14 { 15 return -EOPNOTSUPP; 16 } 17 18 static int sst26vf_unlock(struct spi_nor *nor, loff_t ofs, uint64_t len) 19 { 20 int ret; 21 22 /* We only support unlocking the entire flash array. */ 23 if (ofs != 0 || len != nor->params->size) 24 return -EINVAL; 25 26 ret = spi_nor_read_cr(nor, nor->bouncebuf); 27 if (ret) 28 return ret; 29 30 if (!(nor->bouncebuf[0] & SST26VF_CR_BPNV)) { 31 dev_dbg(nor->dev, "Any block has been permanently locked\n"); 32 return -EINVAL; 33 } 34 35 return spi_nor_global_block_unlock(nor); 36 } 37 38 static int sst26vf_is_locked(struct spi_nor *nor, loff_t ofs, uint64_t len) 39 { 40 return -EOPNOTSUPP; 41 } 42 43 static const struct spi_nor_locking_ops sst26vf_locking_ops = { 44 .lock = sst26vf_lock, 45 .unlock = sst26vf_unlock, 46 .is_locked = sst26vf_is_locked, 47 }; 48 49 static void sst26vf_default_init(struct spi_nor *nor) 50 { 51 nor->params->locking_ops = &sst26vf_locking_ops; 52 } 53 54 static const struct spi_nor_fixups sst26vf_fixups = { 55 .default_init = sst26vf_default_init, 56 }; 57 58 static const struct flash_info sst_parts[] = { 59 /* SST -- large erase sizes are "overlays", "sectors" are 4K */ 60 { "sst25vf040b", INFO(0xbf258d, 0, 64 * 1024, 8, 61 SECT_4K | SST_WRITE | SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) }, 62 { "sst25vf080b", INFO(0xbf258e, 0, 64 * 1024, 16, 63 SECT_4K | SST_WRITE | SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) }, 64 { "sst25vf016b", INFO(0xbf2541, 0, 64 * 1024, 32, 65 SECT_4K | SST_WRITE | SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) }, 66 { "sst25vf032b", INFO(0xbf254a, 0, 64 * 1024, 64, 67 SECT_4K | SST_WRITE | SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) }, 68 { "sst25vf064c", INFO(0xbf254b, 0, 64 * 1024, 128, 69 SECT_4K | SPI_NOR_4BIT_BP | SPI_NOR_HAS_LOCK | 70 SPI_NOR_SWP_IS_VOLATILE) }, 71 { "sst25wf512", INFO(0xbf2501, 0, 64 * 1024, 1, 72 SECT_4K | SST_WRITE | SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) }, 73 { "sst25wf010", INFO(0xbf2502, 0, 64 * 1024, 2, 74 SECT_4K | SST_WRITE | SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) }, 75 { "sst25wf020", INFO(0xbf2503, 0, 64 * 1024, 4, 76 SECT_4K | SST_WRITE | SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) }, 77 { "sst25wf020a", INFO(0x621612, 0, 64 * 1024, 4, SECT_4K | SPI_NOR_HAS_LOCK) }, 78 { "sst25wf040b", INFO(0x621613, 0, 64 * 1024, 8, SECT_4K | SPI_NOR_HAS_LOCK) }, 79 { "sst25wf040", INFO(0xbf2504, 0, 64 * 1024, 8, 80 SECT_4K | SST_WRITE | SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) }, 81 { "sst25wf080", INFO(0xbf2505, 0, 64 * 1024, 16, 82 SECT_4K | SST_WRITE | SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) }, 83 { "sst26wf016b", INFO(0xbf2651, 0, 64 * 1024, 32, 84 SECT_4K | SPI_NOR_DUAL_READ | 85 SPI_NOR_QUAD_READ) }, 86 { "sst26vf016b", INFO(0xbf2641, 0, 64 * 1024, 32, 87 SECT_4K | SPI_NOR_DUAL_READ) }, 88 { "sst26vf064b", INFO(0xbf2643, 0, 64 * 1024, 128, 89 SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | 90 SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) 91 .fixups = &sst26vf_fixups }, 92 }; 93 94 static int sst_write(struct mtd_info *mtd, loff_t to, size_t len, 95 size_t *retlen, const u_char *buf) 96 { 97 struct spi_nor *nor = mtd_to_spi_nor(mtd); 98 size_t actual = 0; 99 int ret; 100 101 dev_dbg(nor->dev, "to 0x%08x, len %zd\n", (u32)to, len); 102 103 ret = spi_nor_lock_and_prep(nor); 104 if (ret) 105 return ret; 106 107 ret = spi_nor_write_enable(nor); 108 if (ret) 109 goto out; 110 111 nor->sst_write_second = false; 112 113 /* Start write from odd address. */ 114 if (to % 2) { 115 nor->program_opcode = SPINOR_OP_BP; 116 117 /* write one byte. */ 118 ret = spi_nor_write_data(nor, to, 1, buf); 119 if (ret < 0) 120 goto out; 121 WARN(ret != 1, "While writing 1 byte written %i bytes\n", ret); 122 ret = spi_nor_wait_till_ready(nor); 123 if (ret) 124 goto out; 125 126 to++; 127 actual++; 128 } 129 130 /* Write out most of the data here. */ 131 for (; actual < len - 1; actual += 2) { 132 nor->program_opcode = SPINOR_OP_AAI_WP; 133 134 /* write two bytes. */ 135 ret = spi_nor_write_data(nor, to, 2, buf + actual); 136 if (ret < 0) 137 goto out; 138 WARN(ret != 2, "While writing 2 bytes written %i bytes\n", ret); 139 ret = spi_nor_wait_till_ready(nor); 140 if (ret) 141 goto out; 142 to += 2; 143 nor->sst_write_second = true; 144 } 145 nor->sst_write_second = false; 146 147 ret = spi_nor_write_disable(nor); 148 if (ret) 149 goto out; 150 151 ret = spi_nor_wait_till_ready(nor); 152 if (ret) 153 goto out; 154 155 /* Write out trailing byte if it exists. */ 156 if (actual != len) { 157 ret = spi_nor_write_enable(nor); 158 if (ret) 159 goto out; 160 161 nor->program_opcode = SPINOR_OP_BP; 162 ret = spi_nor_write_data(nor, to, 1, buf + actual); 163 if (ret < 0) 164 goto out; 165 WARN(ret != 1, "While writing 1 byte written %i bytes\n", ret); 166 ret = spi_nor_wait_till_ready(nor); 167 if (ret) 168 goto out; 169 170 actual += 1; 171 172 ret = spi_nor_write_disable(nor); 173 } 174 out: 175 *retlen += actual; 176 spi_nor_unlock_and_unprep(nor); 177 return ret; 178 } 179 180 static void sst_post_sfdp_fixups(struct spi_nor *nor) 181 { 182 if (nor->info->flags & SST_WRITE) 183 nor->mtd._write = sst_write; 184 } 185 186 static const struct spi_nor_fixups sst_fixups = { 187 .post_sfdp = sst_post_sfdp_fixups, 188 }; 189 190 const struct spi_nor_manufacturer spi_nor_sst = { 191 .name = "sst", 192 .parts = sst_parts, 193 .nparts = ARRAY_SIZE(sst_parts), 194 .fixups = &sst_fixups, 195 }; 196