1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (C) 2005, Intec Automation Inc. 4 * Copyright (C) 2014, Freescale Semiconductor, Inc. 5 */ 6 7 #include <linux/mtd/spi-nor.h> 8 9 #include "core.h" 10 11 static const struct flash_info sst_parts[] = { 12 /* SST -- large erase sizes are "overlays", "sectors" are 4K */ 13 { "sst25vf040b", INFO(0xbf258d, 0, 64 * 1024, 8, 14 SECT_4K | SST_WRITE) }, 15 { "sst25vf080b", INFO(0xbf258e, 0, 64 * 1024, 16, 16 SECT_4K | SST_WRITE) }, 17 { "sst25vf016b", INFO(0xbf2541, 0, 64 * 1024, 32, 18 SECT_4K | SST_WRITE) }, 19 { "sst25vf032b", INFO(0xbf254a, 0, 64 * 1024, 64, 20 SECT_4K | SST_WRITE) }, 21 { "sst25vf064c", INFO(0xbf254b, 0, 64 * 1024, 128, SECT_4K) }, 22 { "sst25wf512", INFO(0xbf2501, 0, 64 * 1024, 1, 23 SECT_4K | SST_WRITE) }, 24 { "sst25wf010", INFO(0xbf2502, 0, 64 * 1024, 2, 25 SECT_4K | SST_WRITE) }, 26 { "sst25wf020", INFO(0xbf2503, 0, 64 * 1024, 4, 27 SECT_4K | SST_WRITE) }, 28 { "sst25wf020a", INFO(0x621612, 0, 64 * 1024, 4, SECT_4K) }, 29 { "sst25wf040b", INFO(0x621613, 0, 64 * 1024, 8, SECT_4K) }, 30 { "sst25wf040", INFO(0xbf2504, 0, 64 * 1024, 8, 31 SECT_4K | SST_WRITE) }, 32 { "sst25wf080", INFO(0xbf2505, 0, 64 * 1024, 16, 33 SECT_4K | SST_WRITE) }, 34 { "sst26wf016b", INFO(0xbf2651, 0, 64 * 1024, 32, 35 SECT_4K | SPI_NOR_DUAL_READ | 36 SPI_NOR_QUAD_READ) }, 37 { "sst26vf016b", INFO(0xbf2641, 0, 64 * 1024, 32, 38 SECT_4K | SPI_NOR_DUAL_READ) }, 39 { "sst26vf064b", INFO(0xbf2643, 0, 64 * 1024, 128, 40 SECT_4K | SPI_NOR_DUAL_READ | 41 SPI_NOR_QUAD_READ) }, 42 }; 43 44 static int sst_write(struct mtd_info *mtd, loff_t to, size_t len, 45 size_t *retlen, const u_char *buf) 46 { 47 struct spi_nor *nor = mtd_to_spi_nor(mtd); 48 size_t actual = 0; 49 int ret; 50 51 dev_dbg(nor->dev, "to 0x%08x, len %zd\n", (u32)to, len); 52 53 ret = spi_nor_lock_and_prep(nor); 54 if (ret) 55 return ret; 56 57 ret = spi_nor_write_enable(nor); 58 if (ret) 59 goto out; 60 61 nor->sst_write_second = false; 62 63 /* Start write from odd address. */ 64 if (to % 2) { 65 nor->program_opcode = SPINOR_OP_BP; 66 67 /* write one byte. */ 68 ret = spi_nor_write_data(nor, to, 1, buf); 69 if (ret < 0) 70 goto out; 71 WARN(ret != 1, "While writing 1 byte written %i bytes\n", ret); 72 ret = spi_nor_wait_till_ready(nor); 73 if (ret) 74 goto out; 75 76 to++; 77 actual++; 78 } 79 80 /* Write out most of the data here. */ 81 for (; actual < len - 1; actual += 2) { 82 nor->program_opcode = SPINOR_OP_AAI_WP; 83 84 /* write two bytes. */ 85 ret = spi_nor_write_data(nor, to, 2, buf + actual); 86 if (ret < 0) 87 goto out; 88 WARN(ret != 2, "While writing 2 bytes written %i bytes\n", ret); 89 ret = spi_nor_wait_till_ready(nor); 90 if (ret) 91 goto out; 92 to += 2; 93 nor->sst_write_second = true; 94 } 95 nor->sst_write_second = false; 96 97 ret = spi_nor_write_disable(nor); 98 if (ret) 99 goto out; 100 101 ret = spi_nor_wait_till_ready(nor); 102 if (ret) 103 goto out; 104 105 /* Write out trailing byte if it exists. */ 106 if (actual != len) { 107 ret = spi_nor_write_enable(nor); 108 if (ret) 109 goto out; 110 111 nor->program_opcode = SPINOR_OP_BP; 112 ret = spi_nor_write_data(nor, to, 1, buf + actual); 113 if (ret < 0) 114 goto out; 115 WARN(ret != 1, "While writing 1 byte written %i bytes\n", ret); 116 ret = spi_nor_wait_till_ready(nor); 117 if (ret) 118 goto out; 119 120 actual += 1; 121 122 ret = spi_nor_write_disable(nor); 123 } 124 out: 125 *retlen += actual; 126 spi_nor_unlock_and_unprep(nor); 127 return ret; 128 } 129 130 static void sst_default_init(struct spi_nor *nor) 131 { 132 nor->flags |= SNOR_F_HAS_LOCK; 133 } 134 135 static void sst_post_sfdp_fixups(struct spi_nor *nor) 136 { 137 if (nor->info->flags & SST_WRITE) 138 nor->mtd._write = sst_write; 139 } 140 141 static const struct spi_nor_fixups sst_fixups = { 142 .default_init = sst_default_init, 143 .post_sfdp = sst_post_sfdp_fixups, 144 }; 145 146 const struct spi_nor_manufacturer spi_nor_sst = { 147 .name = "sst", 148 .parts = sst_parts, 149 .nparts = ARRAY_SIZE(sst_parts), 150 .fixups = &sst_fixups, 151 }; 152