1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (C) 2005, Intec Automation Inc. 4 * Copyright (C) 2014, Freescale Semiconductor, Inc. 5 */ 6 7 #include <linux/mtd/spi-nor.h> 8 9 #include "core.h" 10 11 static int 12 is25lp256_post_bfpt_fixups(struct spi_nor *nor, 13 const struct sfdp_parameter_header *bfpt_header, 14 const struct sfdp_bfpt *bfpt) 15 { 16 /* 17 * IS25LP256 supports 4B opcodes, but the BFPT advertises 18 * BFPT_DWORD1_ADDRESS_BYTES_3_ONLY. 19 * Overwrite the number of address bytes advertised by the BFPT. 20 */ 21 if ((bfpt->dwords[SFDP_DWORD(1)] & BFPT_DWORD1_ADDRESS_BYTES_MASK) == 22 BFPT_DWORD1_ADDRESS_BYTES_3_ONLY) 23 nor->params->addr_nbytes = 4; 24 25 return 0; 26 } 27 28 static const struct spi_nor_fixups is25lp256_fixups = { 29 .post_bfpt = is25lp256_post_bfpt_fixups, 30 }; 31 32 static void pm25lv_nor_late_init(struct spi_nor *nor) 33 { 34 struct spi_nor_erase_map *map = &nor->params->erase_map; 35 int i; 36 37 /* The PM25LV series has a different 4k sector erase opcode */ 38 for (i = 0; i < SNOR_ERASE_TYPE_MAX; i++) 39 if (map->erase_type[i].size == 4096) 40 map->erase_type[i].opcode = SPINOR_OP_BE_4K_PMC; 41 } 42 43 static const struct spi_nor_fixups pm25lv_nor_fixups = { 44 .late_init = pm25lv_nor_late_init, 45 }; 46 47 static const struct flash_info issi_nor_parts[] = { 48 /* ISSI */ 49 { "is25cd512", INFO(0x7f9d20, 0, 32 * 1024, 2) 50 NO_SFDP_FLAGS(SECT_4K) }, 51 { "is25lq040b", INFO(0x9d4013, 0, 64 * 1024, 8) 52 NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, 53 { "is25lp016d", INFO(0x9d6015, 0, 64 * 1024, 32) 54 NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, 55 { "is25lp080d", INFO(0x9d6014, 0, 64 * 1024, 16) 56 NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, 57 { "is25lp032", INFO(0x9d6016, 0, 64 * 1024, 64) 58 NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ) }, 59 { "is25lp064", INFO(0x9d6017, 0, 64 * 1024, 128) 60 NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ) }, 61 { "is25lp128", INFO(0x9d6018, 0, 64 * 1024, 256) 62 NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ) }, 63 { "is25lp256", INFO(0x9d6019, 0, 64 * 1024, 512) 64 PARSE_SFDP 65 FIXUP_FLAGS(SPI_NOR_4B_OPCODES) 66 .fixups = &is25lp256_fixups }, 67 { "is25wp032", INFO(0x9d7016, 0, 64 * 1024, 64) 68 NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, 69 { "is25wp064", INFO(0x9d7017, 0, 64 * 1024, 128) 70 NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, 71 { "is25wp128", INFO(0x9d7018, 0, 64 * 1024, 256) 72 NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, 73 { "is25wp256", INFO(0x9d7019, 0, 0, 0) 74 PARSE_SFDP 75 FIXUP_FLAGS(SPI_NOR_4B_OPCODES) 76 FLAGS(SPI_NOR_QUAD_PP) 77 .fixups = &is25lp256_fixups }, 78 79 /* PMC */ 80 { "pm25lv512", INFO(0, 0, 32 * 1024, 2) 81 NO_SFDP_FLAGS(SECT_4K) 82 .fixups = &pm25lv_nor_fixups 83 }, 84 { "pm25lv010", INFO(0, 0, 32 * 1024, 4) 85 NO_SFDP_FLAGS(SECT_4K) 86 .fixups = &pm25lv_nor_fixups 87 }, 88 { "pm25lq032", INFO(0x7f9d46, 0, 64 * 1024, 64) 89 NO_SFDP_FLAGS(SECT_4K) }, 90 }; 91 92 static void issi_nor_default_init(struct spi_nor *nor) 93 { 94 nor->params->quad_enable = spi_nor_sr1_bit6_quad_enable; 95 } 96 97 static const struct spi_nor_fixups issi_fixups = { 98 .default_init = issi_nor_default_init, 99 }; 100 101 const struct spi_nor_manufacturer spi_nor_issi = { 102 .name = "issi", 103 .parts = issi_nor_parts, 104 .nparts = ARRAY_SIZE(issi_nor_parts), 105 .fixups = &issi_fixups, 106 }; 107