1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (C) 2005, Intec Automation Inc. 4 * Copyright (C) 2014, Freescale Semiconductor, Inc. 5 */ 6 7 #include <linux/mtd/spi-nor.h> 8 9 #include "core.h" 10 11 static int 12 is25lp256_post_bfpt_fixups(struct spi_nor *nor, 13 const struct sfdp_parameter_header *bfpt_header, 14 const struct sfdp_bfpt *bfpt) 15 { 16 /* 17 * IS25LP256 supports 4B opcodes, but the BFPT advertises a 18 * BFPT_DWORD1_ADDRESS_BYTES_3_ONLY address width. 19 * Overwrite the address width advertised by the BFPT. 20 */ 21 if ((bfpt->dwords[BFPT_DWORD(1)] & BFPT_DWORD1_ADDRESS_BYTES_MASK) == 22 BFPT_DWORD1_ADDRESS_BYTES_3_ONLY) 23 nor->addr_width = 4; 24 25 return 0; 26 } 27 28 static struct spi_nor_fixups is25lp256_fixups = { 29 .post_bfpt = is25lp256_post_bfpt_fixups, 30 }; 31 32 static const struct flash_info issi_parts[] = { 33 /* ISSI */ 34 { "is25cd512", INFO(0x7f9d20, 0, 32 * 1024, 2, SECT_4K) }, 35 { "is25lq040b", INFO(0x9d4013, 0, 64 * 1024, 8, 36 SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, 37 { "is25lp016d", INFO(0x9d6015, 0, 64 * 1024, 32, 38 SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, 39 { "is25lp080d", INFO(0x9d6014, 0, 64 * 1024, 16, 40 SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, 41 { "is25lp032", INFO(0x9d6016, 0, 64 * 1024, 64, 42 SECT_4K | SPI_NOR_DUAL_READ) }, 43 { "is25lp064", INFO(0x9d6017, 0, 64 * 1024, 128, 44 SECT_4K | SPI_NOR_DUAL_READ) }, 45 { "is25lp128", INFO(0x9d6018, 0, 64 * 1024, 256, 46 SECT_4K | SPI_NOR_DUAL_READ) }, 47 { "is25lp256", INFO(0x9d6019, 0, 64 * 1024, 512, 48 SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | 49 SPI_NOR_4B_OPCODES) 50 .fixups = &is25lp256_fixups }, 51 { "is25wp032", INFO(0x9d7016, 0, 64 * 1024, 64, 52 SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, 53 { "is25wp064", INFO(0x9d7017, 0, 64 * 1024, 128, 54 SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, 55 { "is25wp128", INFO(0x9d7018, 0, 64 * 1024, 256, 56 SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, 57 { "is25wp256", INFO(0x9d7019, 0, 64 * 1024, 512, 58 SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | 59 SPI_NOR_4B_OPCODES) 60 .fixups = &is25lp256_fixups }, 61 62 /* PMC */ 63 { "pm25lv512", INFO(0, 0, 32 * 1024, 2, SECT_4K_PMC) }, 64 { "pm25lv010", INFO(0, 0, 32 * 1024, 4, SECT_4K_PMC) }, 65 { "pm25lq032", INFO(0x7f9d46, 0, 64 * 1024, 64, SECT_4K) }, 66 }; 67 68 static void issi_default_init(struct spi_nor *nor) 69 { 70 nor->params->quad_enable = spi_nor_sr1_bit6_quad_enable; 71 } 72 73 static const struct spi_nor_fixups issi_fixups = { 74 .default_init = issi_default_init, 75 }; 76 77 const struct spi_nor_manufacturer spi_nor_issi = { 78 .name = "issi", 79 .parts = issi_parts, 80 .nparts = ARRAY_SIZE(issi_parts), 81 .fixups = &issi_fixups, 82 }; 83