1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (C) 2005, Intec Automation Inc. 4 * Copyright (C) 2014, Freescale Semiconductor, Inc. 5 */ 6 7 #ifndef __LINUX_MTD_SPI_NOR_INTERNAL_H 8 #define __LINUX_MTD_SPI_NOR_INTERNAL_H 9 10 #include "sfdp.h" 11 12 #define SPI_NOR_MAX_ID_LEN 6 13 14 enum spi_nor_option_flags { 15 SNOR_F_HAS_SR_TB = BIT(0), 16 SNOR_F_NO_OP_CHIP_ERASE = BIT(1), 17 SNOR_F_BROKEN_RESET = BIT(2), 18 SNOR_F_4B_OPCODES = BIT(3), 19 SNOR_F_HAS_4BAIT = BIT(4), 20 SNOR_F_HAS_LOCK = BIT(5), 21 SNOR_F_HAS_16BIT_SR = BIT(6), 22 SNOR_F_NO_READ_CR = BIT(7), 23 SNOR_F_HAS_SR_TB_BIT6 = BIT(8), 24 SNOR_F_HAS_4BIT_BP = BIT(9), 25 SNOR_F_HAS_SR_BP3_BIT6 = BIT(10), 26 SNOR_F_IO_MODE_EN_VOLATILE = BIT(11), 27 SNOR_F_SOFT_RESET = BIT(12), 28 SNOR_F_SWP_IS_VOLATILE = BIT(13), 29 }; 30 31 struct spi_nor_read_command { 32 u8 num_mode_clocks; 33 u8 num_wait_states; 34 u8 opcode; 35 enum spi_nor_protocol proto; 36 }; 37 38 struct spi_nor_pp_command { 39 u8 opcode; 40 enum spi_nor_protocol proto; 41 }; 42 43 enum spi_nor_read_command_index { 44 SNOR_CMD_READ, 45 SNOR_CMD_READ_FAST, 46 SNOR_CMD_READ_1_1_1_DTR, 47 48 /* Dual SPI */ 49 SNOR_CMD_READ_1_1_2, 50 SNOR_CMD_READ_1_2_2, 51 SNOR_CMD_READ_2_2_2, 52 SNOR_CMD_READ_1_2_2_DTR, 53 54 /* Quad SPI */ 55 SNOR_CMD_READ_1_1_4, 56 SNOR_CMD_READ_1_4_4, 57 SNOR_CMD_READ_4_4_4, 58 SNOR_CMD_READ_1_4_4_DTR, 59 60 /* Octal SPI */ 61 SNOR_CMD_READ_1_1_8, 62 SNOR_CMD_READ_1_8_8, 63 SNOR_CMD_READ_8_8_8, 64 SNOR_CMD_READ_1_8_8_DTR, 65 SNOR_CMD_READ_8_8_8_DTR, 66 67 SNOR_CMD_READ_MAX 68 }; 69 70 enum spi_nor_pp_command_index { 71 SNOR_CMD_PP, 72 73 /* Quad SPI */ 74 SNOR_CMD_PP_1_1_4, 75 SNOR_CMD_PP_1_4_4, 76 SNOR_CMD_PP_4_4_4, 77 78 /* Octal SPI */ 79 SNOR_CMD_PP_1_1_8, 80 SNOR_CMD_PP_1_8_8, 81 SNOR_CMD_PP_8_8_8, 82 SNOR_CMD_PP_8_8_8_DTR, 83 84 SNOR_CMD_PP_MAX 85 }; 86 87 /** 88 * struct spi_nor_erase_type - Structure to describe a SPI NOR erase type 89 * @size: the size of the sector/block erased by the erase type. 90 * JEDEC JESD216B imposes erase sizes to be a power of 2. 91 * @size_shift: @size is a power of 2, the shift is stored in 92 * @size_shift. 93 * @size_mask: the size mask based on @size_shift. 94 * @opcode: the SPI command op code to erase the sector/block. 95 * @idx: Erase Type index as sorted in the Basic Flash Parameter 96 * Table. It will be used to synchronize the supported 97 * Erase Types with the ones identified in the SFDP 98 * optional tables. 99 */ 100 struct spi_nor_erase_type { 101 u32 size; 102 u32 size_shift; 103 u32 size_mask; 104 u8 opcode; 105 u8 idx; 106 }; 107 108 /** 109 * struct spi_nor_erase_command - Used for non-uniform erases 110 * The structure is used to describe a list of erase commands to be executed 111 * once we validate that the erase can be performed. The elements in the list 112 * are run-length encoded. 113 * @list: for inclusion into the list of erase commands. 114 * @count: how many times the same erase command should be 115 * consecutively used. 116 * @size: the size of the sector/block erased by the command. 117 * @opcode: the SPI command op code to erase the sector/block. 118 */ 119 struct spi_nor_erase_command { 120 struct list_head list; 121 u32 count; 122 u32 size; 123 u8 opcode; 124 }; 125 126 /** 127 * struct spi_nor_erase_region - Structure to describe a SPI NOR erase region 128 * @offset: the offset in the data array of erase region start. 129 * LSB bits are used as a bitmask encoding flags to 130 * determine if this region is overlaid, if this region is 131 * the last in the SPI NOR flash memory and to indicate 132 * all the supported erase commands inside this region. 133 * The erase types are sorted in ascending order with the 134 * smallest Erase Type size being at BIT(0). 135 * @size: the size of the region in bytes. 136 */ 137 struct spi_nor_erase_region { 138 u64 offset; 139 u64 size; 140 }; 141 142 #define SNOR_ERASE_TYPE_MAX 4 143 #define SNOR_ERASE_TYPE_MASK GENMASK_ULL(SNOR_ERASE_TYPE_MAX - 1, 0) 144 145 #define SNOR_LAST_REGION BIT(4) 146 #define SNOR_OVERLAID_REGION BIT(5) 147 148 #define SNOR_ERASE_FLAGS_MAX 6 149 #define SNOR_ERASE_FLAGS_MASK GENMASK_ULL(SNOR_ERASE_FLAGS_MAX - 1, 0) 150 151 /** 152 * struct spi_nor_erase_map - Structure to describe the SPI NOR erase map 153 * @regions: array of erase regions. The regions are consecutive in 154 * address space. Walking through the regions is done 155 * incrementally. 156 * @uniform_region: a pre-allocated erase region for SPI NOR with a uniform 157 * sector size (legacy implementation). 158 * @erase_type: an array of erase types shared by all the regions. 159 * The erase types are sorted in ascending order, with the 160 * smallest Erase Type size being the first member in the 161 * erase_type array. 162 * @uniform_erase_type: bitmask encoding erase types that can erase the 163 * entire memory. This member is completed at init by 164 * uniform and non-uniform SPI NOR flash memories if they 165 * support at least one erase type that can erase the 166 * entire memory. 167 */ 168 struct spi_nor_erase_map { 169 struct spi_nor_erase_region *regions; 170 struct spi_nor_erase_region uniform_region; 171 struct spi_nor_erase_type erase_type[SNOR_ERASE_TYPE_MAX]; 172 u8 uniform_erase_type; 173 }; 174 175 /** 176 * struct spi_nor_locking_ops - SPI NOR locking methods 177 * @lock: lock a region of the SPI NOR. 178 * @unlock: unlock a region of the SPI NOR. 179 * @is_locked: check if a region of the SPI NOR is completely locked 180 */ 181 struct spi_nor_locking_ops { 182 int (*lock)(struct spi_nor *nor, loff_t ofs, uint64_t len); 183 int (*unlock)(struct spi_nor *nor, loff_t ofs, uint64_t len); 184 int (*is_locked)(struct spi_nor *nor, loff_t ofs, uint64_t len); 185 }; 186 187 /** 188 * struct spi_nor_otp_organization - Structure to describe the SPI NOR OTP regions 189 * @len: size of one OTP region in bytes. 190 * @base: start address of the OTP area. 191 * @offset: offset between consecutive OTP regions if there are more 192 * than one. 193 * @n_regions: number of individual OTP regions. 194 */ 195 struct spi_nor_otp_organization { 196 size_t len; 197 loff_t base; 198 loff_t offset; 199 unsigned int n_regions; 200 }; 201 202 /** 203 * struct spi_nor_otp_ops - SPI NOR OTP methods 204 * @read: read from the SPI NOR OTP area. 205 * @write: write to the SPI NOR OTP area. 206 * @lock: lock an OTP region. 207 * @erase: erase an OTP region. 208 * @is_locked: check if an OTP region of the SPI NOR is locked. 209 */ 210 struct spi_nor_otp_ops { 211 int (*read)(struct spi_nor *nor, loff_t addr, size_t len, u8 *buf); 212 int (*write)(struct spi_nor *nor, loff_t addr, size_t len, 213 const u8 *buf); 214 int (*lock)(struct spi_nor *nor, unsigned int region); 215 int (*erase)(struct spi_nor *nor, loff_t addr); 216 int (*is_locked)(struct spi_nor *nor, unsigned int region); 217 }; 218 219 /** 220 * struct spi_nor_otp - SPI NOR OTP grouping structure 221 * @org: OTP region organization 222 * @ops: OTP access ops 223 */ 224 struct spi_nor_otp { 225 const struct spi_nor_otp_organization *org; 226 const struct spi_nor_otp_ops *ops; 227 }; 228 229 /** 230 * struct spi_nor_flash_parameter - SPI NOR flash parameters and settings. 231 * Includes legacy flash parameters and settings that can be overwritten 232 * by the spi_nor_fixups hooks, or dynamically when parsing the JESD216 233 * Serial Flash Discoverable Parameters (SFDP) tables. 234 * 235 * @size: the flash memory density in bytes. 236 * @writesize Minimal writable flash unit size. Defaults to 1. Set to 237 * ECC unit size for ECC-ed flashes. 238 * @page_size: the page size of the SPI NOR flash memory. 239 * @rdsr_dummy: dummy cycles needed for Read Status Register command. 240 * @rdsr_addr_nbytes: dummy address bytes needed for Read Status Register 241 * command. 242 * @hwcaps: describes the read and page program hardware 243 * capabilities. 244 * @reads: read capabilities ordered by priority: the higher index 245 * in the array, the higher priority. 246 * @page_programs: page program capabilities ordered by priority: the 247 * higher index in the array, the higher priority. 248 * @erase_map: the erase map parsed from the SFDP Sector Map Parameter 249 * Table. 250 * @otp: SPI NOR OTP info. 251 * @octal_dtr_enable: enables SPI NOR octal DTR mode. 252 * @quad_enable: enables SPI NOR quad mode. 253 * @set_4byte_addr_mode: puts the SPI NOR in 4 byte addressing mode. 254 * @convert_addr: converts an absolute address into something the flash 255 * will understand. Particularly useful when pagesize is 256 * not a power-of-2. 257 * @setup: (optional) configures the SPI NOR memory. Useful for 258 * SPI NOR flashes that have peculiarities to the SPI NOR 259 * standard e.g. different opcodes, specific address 260 * calculation, page size, etc. 261 * @ready: (optional) flashes might use a different mechanism 262 * than reading the status register to indicate they 263 * are ready for a new command 264 * @locking_ops: SPI NOR locking methods. 265 */ 266 struct spi_nor_flash_parameter { 267 u64 size; 268 u32 writesize; 269 u32 page_size; 270 u8 rdsr_dummy; 271 u8 rdsr_addr_nbytes; 272 273 struct spi_nor_hwcaps hwcaps; 274 struct spi_nor_read_command reads[SNOR_CMD_READ_MAX]; 275 struct spi_nor_pp_command page_programs[SNOR_CMD_PP_MAX]; 276 277 struct spi_nor_erase_map erase_map; 278 struct spi_nor_otp otp; 279 280 int (*octal_dtr_enable)(struct spi_nor *nor, bool enable); 281 int (*quad_enable)(struct spi_nor *nor); 282 int (*set_4byte_addr_mode)(struct spi_nor *nor, bool enable); 283 u32 (*convert_addr)(struct spi_nor *nor, u32 addr); 284 int (*setup)(struct spi_nor *nor, const struct spi_nor_hwcaps *hwcaps); 285 int (*ready)(struct spi_nor *nor); 286 287 const struct spi_nor_locking_ops *locking_ops; 288 }; 289 290 /** 291 * struct spi_nor_fixups - SPI NOR fixup hooks 292 * @default_init: called after default flash parameters init. Used to tweak 293 * flash parameters when information provided by the flash_info 294 * table is incomplete or wrong. 295 * @post_bfpt: called after the BFPT table has been parsed 296 * @post_sfdp: called after SFDP has been parsed (is also called for SPI NORs 297 * that do not support RDSFDP). Typically used to tweak various 298 * parameters that could not be extracted by other means (i.e. 299 * when information provided by the SFDP/flash_info tables are 300 * incomplete or wrong). 301 * @late_init: used to initialize flash parameters that are not declared in the 302 * JESD216 SFDP standard, or where SFDP tables not defined at all. 303 * Will replace the default_init() hook. 304 * 305 * Those hooks can be used to tweak the SPI NOR configuration when the SFDP 306 * table is broken or not available. 307 */ 308 struct spi_nor_fixups { 309 void (*default_init)(struct spi_nor *nor); 310 int (*post_bfpt)(struct spi_nor *nor, 311 const struct sfdp_parameter_header *bfpt_header, 312 const struct sfdp_bfpt *bfpt); 313 void (*post_sfdp)(struct spi_nor *nor); 314 void (*late_init)(struct spi_nor *nor); 315 }; 316 317 /** 318 * struct flash_info - SPI NOR flash_info entry. 319 * @name: the name of the flash. 320 * @id: the flash's ID bytes. The first three bytes are the 321 * JEDIC ID. JEDEC ID zero means "no ID" (mostly older chips). 322 * @id_len: the number of bytes of ID. 323 * @sector_size: the size listed here is what works with SPINOR_OP_SE, which 324 * isn't necessarily called a "sector" by the vendor. 325 * @n_sectors: the number of sectors. 326 * @page_size: the flash's page size. 327 * @addr_width: the flash's address width. 328 * 329 * @parse_sfdp: true when flash supports SFDP tables. The false value has no 330 * meaning. If one wants to skip the SFDP tables, one should 331 * instead use the SPI_NOR_SKIP_SFDP sfdp_flag. 332 * @flags: flags that indicate support that is not defined by the 333 * JESD216 standard in its SFDP tables. Flag meanings: 334 * SPI_NOR_HAS_LOCK: flash supports lock/unlock via SR 335 * SPI_NOR_HAS_TB: flash SR has Top/Bottom (TB) protect bit. Must be 336 * used with SPI_NOR_HAS_LOCK. 337 * SPI_NOR_TB_SR_BIT6: Top/Bottom (TB) is bit 6 of status register. 338 * Must be used with SPI_NOR_HAS_TB. 339 * SPI_NOR_4BIT_BP: flash SR has 4 bit fields (BP0-3) for block 340 * protection. 341 * SPI_NOR_BP3_SR_BIT6: BP3 is bit 6 of status register. Must be used with 342 * SPI_NOR_4BIT_BP. 343 * SPI_NOR_SWP_IS_VOLATILE: flash has volatile software write protection bits. 344 * Usually these will power-up in a write-protected 345 * state. 346 * SPI_NOR_NO_ERASE: no erase command needed. 347 * NO_CHIP_ERASE: chip does not support chip erase. 348 * SPI_NOR_NO_FR: can't do fastread. 349 * 350 * @no_sfdp_flags: flags that indicate support that can be discovered via SFDP. 351 * Used when SFDP tables are not defined in the flash. These 352 * flags are used together with the SPI_NOR_SKIP_SFDP flag. 353 * SPI_NOR_SKIP_SFDP: skip parsing of SFDP tables. 354 * SECT_4K: SPINOR_OP_BE_4K works uniformly. 355 * SECT_4K_PMC: SPINOR_OP_BE_4K_PMC works uniformly. 356 * SPI_NOR_DUAL_READ: flash supports Dual Read. 357 * SPI_NOR_QUAD_READ: flash supports Quad Read. 358 * SPI_NOR_OCTAL_READ: flash supports Octal Read. 359 * SPI_NOR_OCTAL_DTR_READ: flash supports octal DTR Read. 360 * SPI_NOR_OCTAL_DTR_PP: flash supports Octal DTR Page Program. 361 * 362 * @fixup_flags: flags that indicate support that can be discovered via SFDP 363 * ideally, but can not be discovered for this particular flash 364 * because the SFDP table that indicates this support is not 365 * defined by the flash. In case the table for this support is 366 * defined but has wrong values, one should instead use a 367 * post_sfdp() hook to set the SNOR_F equivalent flag. 368 * 369 * SPI_NOR_4B_OPCODES: use dedicated 4byte address op codes to support 370 * memory size above 128Mib. 371 * SPI_NOR_IO_MODE_EN_VOLATILE: flash enables the best available I/O mode 372 * via a volatile bit. 373 * @mfr_flags: manufacturer private flags. Used in the manufacturer fixup 374 * hooks to differentiate support between flashes of the same 375 * manufacturer. 376 * @otp_org: flash's OTP organization. 377 * @fixups: part specific fixup hooks. 378 */ 379 struct flash_info { 380 char *name; 381 u8 id[SPI_NOR_MAX_ID_LEN]; 382 u8 id_len; 383 unsigned sector_size; 384 u16 n_sectors; 385 u16 page_size; 386 u16 addr_width; 387 388 bool parse_sfdp; 389 u16 flags; 390 #define SPI_NOR_HAS_LOCK BIT(0) 391 #define SPI_NOR_HAS_TB BIT(1) 392 #define SPI_NOR_TB_SR_BIT6 BIT(2) 393 #define SPI_NOR_4BIT_BP BIT(3) 394 #define SPI_NOR_BP3_SR_BIT6 BIT(4) 395 #define SPI_NOR_SWP_IS_VOLATILE BIT(5) 396 #define SPI_NOR_NO_ERASE BIT(6) 397 #define NO_CHIP_ERASE BIT(7) 398 #define SPI_NOR_NO_FR BIT(8) 399 400 u8 no_sfdp_flags; 401 #define SPI_NOR_SKIP_SFDP BIT(0) 402 #define SECT_4K BIT(1) 403 #define SECT_4K_PMC BIT(2) 404 #define SPI_NOR_DUAL_READ BIT(3) 405 #define SPI_NOR_QUAD_READ BIT(4) 406 #define SPI_NOR_OCTAL_READ BIT(5) 407 #define SPI_NOR_OCTAL_DTR_READ BIT(6) 408 #define SPI_NOR_OCTAL_DTR_PP BIT(7) 409 410 u8 fixup_flags; 411 #define SPI_NOR_4B_OPCODES BIT(0) 412 #define SPI_NOR_IO_MODE_EN_VOLATILE BIT(1) 413 414 u8 mfr_flags; 415 416 const struct spi_nor_otp_organization otp_org; 417 const struct spi_nor_fixups *fixups; 418 }; 419 420 /* Used when the "_ext_id" is two bytes at most */ 421 #define INFO(_jedec_id, _ext_id, _sector_size, _n_sectors) \ 422 .id = { \ 423 ((_jedec_id) >> 16) & 0xff, \ 424 ((_jedec_id) >> 8) & 0xff, \ 425 (_jedec_id) & 0xff, \ 426 ((_ext_id) >> 8) & 0xff, \ 427 (_ext_id) & 0xff, \ 428 }, \ 429 .id_len = (!(_jedec_id) ? 0 : (3 + ((_ext_id) ? 2 : 0))), \ 430 .sector_size = (_sector_size), \ 431 .n_sectors = (_n_sectors), \ 432 .page_size = 256, \ 433 434 #define INFO6(_jedec_id, _ext_id, _sector_size, _n_sectors) \ 435 .id = { \ 436 ((_jedec_id) >> 16) & 0xff, \ 437 ((_jedec_id) >> 8) & 0xff, \ 438 (_jedec_id) & 0xff, \ 439 ((_ext_id) >> 16) & 0xff, \ 440 ((_ext_id) >> 8) & 0xff, \ 441 (_ext_id) & 0xff, \ 442 }, \ 443 .id_len = 6, \ 444 .sector_size = (_sector_size), \ 445 .n_sectors = (_n_sectors), \ 446 .page_size = 256, \ 447 448 #define CAT25_INFO(_sector_size, _n_sectors, _page_size, _addr_width) \ 449 .sector_size = (_sector_size), \ 450 .n_sectors = (_n_sectors), \ 451 .page_size = (_page_size), \ 452 .addr_width = (_addr_width), \ 453 .flags = SPI_NOR_NO_ERASE | SPI_NOR_NO_FR, \ 454 455 #define OTP_INFO(_len, _n_regions, _base, _offset) \ 456 .otp_org = { \ 457 .len = (_len), \ 458 .base = (_base), \ 459 .offset = (_offset), \ 460 .n_regions = (_n_regions), \ 461 }, 462 463 #define PARSE_SFDP \ 464 .parse_sfdp = true, \ 465 466 #define FLAGS(_flags) \ 467 .flags = (_flags), \ 468 469 #define NO_SFDP_FLAGS(_no_sfdp_flags) \ 470 .no_sfdp_flags = (_no_sfdp_flags), \ 471 472 #define FIXUP_FLAGS(_fixup_flags) \ 473 .fixup_flags = (_fixup_flags), \ 474 475 #define MFR_FLAGS(_mfr_flags) \ 476 .mfr_flags = (_mfr_flags), \ 477 478 /** 479 * struct spi_nor_manufacturer - SPI NOR manufacturer object 480 * @name: manufacturer name 481 * @parts: array of parts supported by this manufacturer 482 * @nparts: number of entries in the parts array 483 * @fixups: hooks called at various points in time during spi_nor_scan() 484 */ 485 struct spi_nor_manufacturer { 486 const char *name; 487 const struct flash_info *parts; 488 unsigned int nparts; 489 const struct spi_nor_fixups *fixups; 490 }; 491 492 /** 493 * struct sfdp - SFDP data 494 * @num_dwords: number of entries in the dwords array 495 * @dwords: array of double words of the SFDP data 496 */ 497 struct sfdp { 498 size_t num_dwords; 499 u32 *dwords; 500 }; 501 502 /* Manufacturer drivers. */ 503 extern const struct spi_nor_manufacturer spi_nor_atmel; 504 extern const struct spi_nor_manufacturer spi_nor_catalyst; 505 extern const struct spi_nor_manufacturer spi_nor_eon; 506 extern const struct spi_nor_manufacturer spi_nor_esmt; 507 extern const struct spi_nor_manufacturer spi_nor_everspin; 508 extern const struct spi_nor_manufacturer spi_nor_fujitsu; 509 extern const struct spi_nor_manufacturer spi_nor_gigadevice; 510 extern const struct spi_nor_manufacturer spi_nor_intel; 511 extern const struct spi_nor_manufacturer spi_nor_issi; 512 extern const struct spi_nor_manufacturer spi_nor_macronix; 513 extern const struct spi_nor_manufacturer spi_nor_micron; 514 extern const struct spi_nor_manufacturer spi_nor_st; 515 extern const struct spi_nor_manufacturer spi_nor_spansion; 516 extern const struct spi_nor_manufacturer spi_nor_sst; 517 extern const struct spi_nor_manufacturer spi_nor_winbond; 518 extern const struct spi_nor_manufacturer spi_nor_xilinx; 519 extern const struct spi_nor_manufacturer spi_nor_xmc; 520 521 extern const struct attribute_group *spi_nor_sysfs_groups[]; 522 523 void spi_nor_spimem_setup_op(const struct spi_nor *nor, 524 struct spi_mem_op *op, 525 const enum spi_nor_protocol proto); 526 int spi_nor_write_enable(struct spi_nor *nor); 527 int spi_nor_write_disable(struct spi_nor *nor); 528 int spi_nor_set_4byte_addr_mode(struct spi_nor *nor, bool enable); 529 int spi_nor_write_ear(struct spi_nor *nor, u8 ear); 530 int spi_nor_wait_till_ready(struct spi_nor *nor); 531 int spi_nor_global_block_unlock(struct spi_nor *nor); 532 int spi_nor_lock_and_prep(struct spi_nor *nor); 533 void spi_nor_unlock_and_unprep(struct spi_nor *nor); 534 int spi_nor_sr1_bit6_quad_enable(struct spi_nor *nor); 535 int spi_nor_sr2_bit1_quad_enable(struct spi_nor *nor); 536 int spi_nor_sr2_bit7_quad_enable(struct spi_nor *nor); 537 int spi_nor_read_sr(struct spi_nor *nor, u8 *sr); 538 int spi_nor_sr_ready(struct spi_nor *nor); 539 int spi_nor_read_cr(struct spi_nor *nor, u8 *cr); 540 int spi_nor_write_sr(struct spi_nor *nor, const u8 *sr, size_t len); 541 int spi_nor_write_sr_and_check(struct spi_nor *nor, u8 sr1); 542 int spi_nor_write_16bit_cr_and_check(struct spi_nor *nor, u8 cr); 543 544 ssize_t spi_nor_read_data(struct spi_nor *nor, loff_t from, size_t len, 545 u8 *buf); 546 ssize_t spi_nor_write_data(struct spi_nor *nor, loff_t to, size_t len, 547 const u8 *buf); 548 int spi_nor_erase_sector(struct spi_nor *nor, u32 addr); 549 550 int spi_nor_otp_read_secr(struct spi_nor *nor, loff_t addr, size_t len, u8 *buf); 551 int spi_nor_otp_write_secr(struct spi_nor *nor, loff_t addr, size_t len, 552 const u8 *buf); 553 int spi_nor_otp_erase_secr(struct spi_nor *nor, loff_t addr); 554 int spi_nor_otp_lock_sr2(struct spi_nor *nor, unsigned int region); 555 int spi_nor_otp_is_locked_sr2(struct spi_nor *nor, unsigned int region); 556 557 int spi_nor_hwcaps_read2cmd(u32 hwcaps); 558 u8 spi_nor_convert_3to4_read(u8 opcode); 559 void spi_nor_set_read_settings(struct spi_nor_read_command *read, 560 u8 num_mode_clocks, 561 u8 num_wait_states, 562 u8 opcode, 563 enum spi_nor_protocol proto); 564 void spi_nor_set_pp_settings(struct spi_nor_pp_command *pp, u8 opcode, 565 enum spi_nor_protocol proto); 566 567 void spi_nor_set_erase_type(struct spi_nor_erase_type *erase, u32 size, 568 u8 opcode); 569 struct spi_nor_erase_region * 570 spi_nor_region_next(struct spi_nor_erase_region *region); 571 void spi_nor_init_uniform_erase_map(struct spi_nor_erase_map *map, 572 u8 erase_mask, u64 flash_size); 573 574 int spi_nor_post_bfpt_fixups(struct spi_nor *nor, 575 const struct sfdp_parameter_header *bfpt_header, 576 const struct sfdp_bfpt *bfpt); 577 578 void spi_nor_init_default_locking_ops(struct spi_nor *nor); 579 void spi_nor_try_unlock_all(struct spi_nor *nor); 580 void spi_nor_set_mtd_locking_ops(struct spi_nor *nor); 581 void spi_nor_set_mtd_otp_ops(struct spi_nor *nor); 582 583 int spi_nor_controller_ops_read_reg(struct spi_nor *nor, u8 opcode, 584 u8 *buf, size_t len); 585 int spi_nor_controller_ops_write_reg(struct spi_nor *nor, u8 opcode, 586 const u8 *buf, size_t len); 587 588 static inline struct spi_nor *mtd_to_spi_nor(struct mtd_info *mtd) 589 { 590 return container_of(mtd, struct spi_nor, mtd); 591 } 592 593 #endif /* __LINUX_MTD_SPI_NOR_INTERNAL_H */ 594