xref: /openbmc/linux/drivers/mtd/nand/raw/r852.c (revision 9fb29c73)
1 /*
2  * Copyright © 2009 - Maxim Levitsky
3  * driver for Ricoh xD readers
4  *
5  * This program is free software; you can redistribute it and/or modify
6  * it under the terms of the GNU General Public License version 2 as
7  * published by the Free Software Foundation.
8  */
9 
10 #define DRV_NAME "r852"
11 #define pr_fmt(fmt)  DRV_NAME ": " fmt
12 
13 #include <linux/kernel.h>
14 #include <linux/module.h>
15 #include <linux/jiffies.h>
16 #include <linux/workqueue.h>
17 #include <linux/interrupt.h>
18 #include <linux/pci.h>
19 #include <linux/pci_ids.h>
20 #include <linux/delay.h>
21 #include <linux/slab.h>
22 #include <asm/byteorder.h>
23 #include <linux/sched.h>
24 #include "sm_common.h"
25 #include "r852.h"
26 
27 
28 static bool r852_enable_dma = 1;
29 module_param(r852_enable_dma, bool, S_IRUGO);
30 MODULE_PARM_DESC(r852_enable_dma, "Enable usage of the DMA (default)");
31 
32 static int debug;
33 module_param(debug, int, S_IRUGO | S_IWUSR);
34 MODULE_PARM_DESC(debug, "Debug level (0-2)");
35 
36 /* read register */
37 static inline uint8_t r852_read_reg(struct r852_device *dev, int address)
38 {
39 	uint8_t reg = readb(dev->mmio + address);
40 	return reg;
41 }
42 
43 /* write register */
44 static inline void r852_write_reg(struct r852_device *dev,
45 						int address, uint8_t value)
46 {
47 	writeb(value, dev->mmio + address);
48 	mmiowb();
49 }
50 
51 
52 /* read dword sized register */
53 static inline uint32_t r852_read_reg_dword(struct r852_device *dev, int address)
54 {
55 	uint32_t reg = le32_to_cpu(readl(dev->mmio + address));
56 	return reg;
57 }
58 
59 /* write dword sized register */
60 static inline void r852_write_reg_dword(struct r852_device *dev,
61 							int address, uint32_t value)
62 {
63 	writel(cpu_to_le32(value), dev->mmio + address);
64 	mmiowb();
65 }
66 
67 /* returns pointer to our private structure */
68 static inline struct r852_device *r852_get_dev(struct mtd_info *mtd)
69 {
70 	struct nand_chip *chip = mtd_to_nand(mtd);
71 	return nand_get_controller_data(chip);
72 }
73 
74 
75 /* check if controller supports dma */
76 static void r852_dma_test(struct r852_device *dev)
77 {
78 	dev->dma_usable = (r852_read_reg(dev, R852_DMA_CAP) &
79 		(R852_DMA1 | R852_DMA2)) == (R852_DMA1 | R852_DMA2);
80 
81 	if (!dev->dma_usable)
82 		message("Non dma capable device detected, dma disabled");
83 
84 	if (!r852_enable_dma) {
85 		message("disabling dma on user request");
86 		dev->dma_usable = 0;
87 	}
88 }
89 
90 /*
91  * Enable dma. Enables ether first or second stage of the DMA,
92  * Expects dev->dma_dir and dev->dma_state be set
93  */
94 static void r852_dma_enable(struct r852_device *dev)
95 {
96 	uint8_t dma_reg, dma_irq_reg;
97 
98 	/* Set up dma settings */
99 	dma_reg = r852_read_reg_dword(dev, R852_DMA_SETTINGS);
100 	dma_reg &= ~(R852_DMA_READ | R852_DMA_INTERNAL | R852_DMA_MEMORY);
101 
102 	if (dev->dma_dir)
103 		dma_reg |= R852_DMA_READ;
104 
105 	if (dev->dma_state == DMA_INTERNAL) {
106 		dma_reg |= R852_DMA_INTERNAL;
107 		/* Precaution to make sure HW doesn't write */
108 			/* to random kernel memory */
109 		r852_write_reg_dword(dev, R852_DMA_ADDR,
110 			cpu_to_le32(dev->phys_bounce_buffer));
111 	} else {
112 		dma_reg |= R852_DMA_MEMORY;
113 		r852_write_reg_dword(dev, R852_DMA_ADDR,
114 			cpu_to_le32(dev->phys_dma_addr));
115 	}
116 
117 	/* Precaution: make sure write reached the device */
118 	r852_read_reg_dword(dev, R852_DMA_ADDR);
119 
120 	r852_write_reg_dword(dev, R852_DMA_SETTINGS, dma_reg);
121 
122 	/* Set dma irq */
123 	dma_irq_reg = r852_read_reg_dword(dev, R852_DMA_IRQ_ENABLE);
124 	r852_write_reg_dword(dev, R852_DMA_IRQ_ENABLE,
125 		dma_irq_reg |
126 		R852_DMA_IRQ_INTERNAL |
127 		R852_DMA_IRQ_ERROR |
128 		R852_DMA_IRQ_MEMORY);
129 }
130 
131 /*
132  * Disable dma, called from the interrupt handler, which specifies
133  * success of the operation via 'error' argument
134  */
135 static void r852_dma_done(struct r852_device *dev, int error)
136 {
137 	WARN_ON(dev->dma_stage == 0);
138 
139 	r852_write_reg_dword(dev, R852_DMA_IRQ_STA,
140 			r852_read_reg_dword(dev, R852_DMA_IRQ_STA));
141 
142 	r852_write_reg_dword(dev, R852_DMA_SETTINGS, 0);
143 	r852_write_reg_dword(dev, R852_DMA_IRQ_ENABLE, 0);
144 
145 	/* Precaution to make sure HW doesn't write to random kernel memory */
146 	r852_write_reg_dword(dev, R852_DMA_ADDR,
147 		cpu_to_le32(dev->phys_bounce_buffer));
148 	r852_read_reg_dword(dev, R852_DMA_ADDR);
149 
150 	dev->dma_error = error;
151 	dev->dma_stage = 0;
152 
153 	if (dev->phys_dma_addr && dev->phys_dma_addr != dev->phys_bounce_buffer)
154 		dma_unmap_single(&dev->pci_dev->dev, dev->phys_dma_addr,
155 			R852_DMA_LEN,
156 			dev->dma_dir ? DMA_FROM_DEVICE : DMA_TO_DEVICE);
157 }
158 
159 /*
160  * Wait, till dma is done, which includes both phases of it
161  */
162 static int r852_dma_wait(struct r852_device *dev)
163 {
164 	long timeout = wait_for_completion_timeout(&dev->dma_done,
165 				msecs_to_jiffies(1000));
166 	if (!timeout) {
167 		dbg("timeout waiting for DMA interrupt");
168 		return -ETIMEDOUT;
169 	}
170 
171 	return 0;
172 }
173 
174 /*
175  * Read/Write one page using dma. Only pages can be read (512 bytes)
176 */
177 static void r852_do_dma(struct r852_device *dev, uint8_t *buf, int do_read)
178 {
179 	int bounce = 0;
180 	unsigned long flags;
181 	int error;
182 
183 	dev->dma_error = 0;
184 
185 	/* Set dma direction */
186 	dev->dma_dir = do_read;
187 	dev->dma_stage = 1;
188 	reinit_completion(&dev->dma_done);
189 
190 	dbg_verbose("doing dma %s ", do_read ? "read" : "write");
191 
192 	/* Set initial dma state: for reading first fill on board buffer,
193 	  from device, for writes first fill the buffer  from memory*/
194 	dev->dma_state = do_read ? DMA_INTERNAL : DMA_MEMORY;
195 
196 	/* if incoming buffer is not page aligned, we should do bounce */
197 	if ((unsigned long)buf & (R852_DMA_LEN-1))
198 		bounce = 1;
199 
200 	if (!bounce) {
201 		dev->phys_dma_addr = dma_map_single(&dev->pci_dev->dev, buf,
202 			R852_DMA_LEN,
203 			do_read ? DMA_FROM_DEVICE : DMA_TO_DEVICE);
204 		if (dma_mapping_error(&dev->pci_dev->dev, dev->phys_dma_addr))
205 			bounce = 1;
206 	}
207 
208 	if (bounce) {
209 		dbg_verbose("dma: using bounce buffer");
210 		dev->phys_dma_addr = dev->phys_bounce_buffer;
211 		if (!do_read)
212 			memcpy(dev->bounce_buffer, buf, R852_DMA_LEN);
213 	}
214 
215 	/* Enable DMA */
216 	spin_lock_irqsave(&dev->irqlock, flags);
217 	r852_dma_enable(dev);
218 	spin_unlock_irqrestore(&dev->irqlock, flags);
219 
220 	/* Wait till complete */
221 	error = r852_dma_wait(dev);
222 
223 	if (error) {
224 		r852_dma_done(dev, error);
225 		return;
226 	}
227 
228 	if (do_read && bounce)
229 		memcpy((void *)buf, dev->bounce_buffer, R852_DMA_LEN);
230 }
231 
232 /*
233  * Program data lines of the nand chip to send data to it
234  */
235 static void r852_write_buf(struct nand_chip *chip, const uint8_t *buf, int len)
236 {
237 	struct r852_device *dev = r852_get_dev(nand_to_mtd(chip));
238 	uint32_t reg;
239 
240 	/* Don't allow any access to hardware if we suspect card removal */
241 	if (dev->card_unstable)
242 		return;
243 
244 	/* Special case for whole sector read */
245 	if (len == R852_DMA_LEN && dev->dma_usable) {
246 		r852_do_dma(dev, (uint8_t *)buf, 0);
247 		return;
248 	}
249 
250 	/* write DWORD chinks - faster */
251 	while (len >= 4) {
252 		reg = buf[0] | buf[1] << 8 | buf[2] << 16 | buf[3] << 24;
253 		r852_write_reg_dword(dev, R852_DATALINE, reg);
254 		buf += 4;
255 		len -= 4;
256 
257 	}
258 
259 	/* write rest */
260 	while (len > 0) {
261 		r852_write_reg(dev, R852_DATALINE, *buf++);
262 		len--;
263 	}
264 }
265 
266 /*
267  * Read data lines of the nand chip to retrieve data
268  */
269 static void r852_read_buf(struct nand_chip *chip, uint8_t *buf, int len)
270 {
271 	struct r852_device *dev = r852_get_dev(nand_to_mtd(chip));
272 	uint32_t reg;
273 
274 	if (dev->card_unstable) {
275 		/* since we can't signal error here, at least, return
276 			predictable buffer */
277 		memset(buf, 0, len);
278 		return;
279 	}
280 
281 	/* special case for whole sector read */
282 	if (len == R852_DMA_LEN && dev->dma_usable) {
283 		r852_do_dma(dev, buf, 1);
284 		return;
285 	}
286 
287 	/* read in dword sized chunks */
288 	while (len >= 4) {
289 
290 		reg = r852_read_reg_dword(dev, R852_DATALINE);
291 		*buf++ = reg & 0xFF;
292 		*buf++ = (reg >> 8) & 0xFF;
293 		*buf++ = (reg >> 16) & 0xFF;
294 		*buf++ = (reg >> 24) & 0xFF;
295 		len -= 4;
296 	}
297 
298 	/* read the reset by bytes */
299 	while (len--)
300 		*buf++ = r852_read_reg(dev, R852_DATALINE);
301 }
302 
303 /*
304  * Read one byte from nand chip
305  */
306 static uint8_t r852_read_byte(struct nand_chip *chip)
307 {
308 	struct r852_device *dev = r852_get_dev(nand_to_mtd(chip));
309 
310 	/* Same problem as in r852_read_buf.... */
311 	if (dev->card_unstable)
312 		return 0;
313 
314 	return r852_read_reg(dev, R852_DATALINE);
315 }
316 
317 /*
318  * Control several chip lines & send commands
319  */
320 static void r852_cmdctl(struct nand_chip *chip, int dat, unsigned int ctrl)
321 {
322 	struct r852_device *dev = r852_get_dev(nand_to_mtd(chip));
323 
324 	if (dev->card_unstable)
325 		return;
326 
327 	if (ctrl & NAND_CTRL_CHANGE) {
328 
329 		dev->ctlreg &= ~(R852_CTL_DATA | R852_CTL_COMMAND |
330 				 R852_CTL_ON | R852_CTL_CARDENABLE);
331 
332 		if (ctrl & NAND_ALE)
333 			dev->ctlreg |= R852_CTL_DATA;
334 
335 		if (ctrl & NAND_CLE)
336 			dev->ctlreg |= R852_CTL_COMMAND;
337 
338 		if (ctrl & NAND_NCE)
339 			dev->ctlreg |= (R852_CTL_CARDENABLE | R852_CTL_ON);
340 		else
341 			dev->ctlreg &= ~R852_CTL_WRITE;
342 
343 		/* when write is stareted, enable write access */
344 		if (dat == NAND_CMD_ERASE1)
345 			dev->ctlreg |= R852_CTL_WRITE;
346 
347 		r852_write_reg(dev, R852_CTL, dev->ctlreg);
348 	}
349 
350 	 /* HACK: NAND_CMD_SEQIN is called without NAND_CTRL_CHANGE, but we need
351 		to set write mode */
352 	if (dat == NAND_CMD_SEQIN && (dev->ctlreg & R852_CTL_COMMAND)) {
353 		dev->ctlreg |= R852_CTL_WRITE;
354 		r852_write_reg(dev, R852_CTL, dev->ctlreg);
355 	}
356 
357 	if (dat != NAND_CMD_NONE)
358 		r852_write_reg(dev, R852_DATALINE, dat);
359 }
360 
361 /*
362  * Wait till card is ready.
363  * based on nand_wait, but returns errors on DMA error
364  */
365 static int r852_wait(struct nand_chip *chip)
366 {
367 	struct r852_device *dev = nand_get_controller_data(chip);
368 
369 	unsigned long timeout;
370 	u8 status;
371 
372 	timeout = jiffies + (chip->state == FL_ERASING ?
373 		msecs_to_jiffies(400) : msecs_to_jiffies(20));
374 
375 	while (time_before(jiffies, timeout))
376 		if (chip->legacy.dev_ready(chip))
377 			break;
378 
379 	nand_status_op(chip, &status);
380 
381 	/* Unfortunelly, no way to send detailed error status... */
382 	if (dev->dma_error) {
383 		status |= NAND_STATUS_FAIL;
384 		dev->dma_error = 0;
385 	}
386 	return status;
387 }
388 
389 /*
390  * Check if card is ready
391  */
392 
393 static int r852_ready(struct nand_chip *chip)
394 {
395 	struct r852_device *dev = r852_get_dev(nand_to_mtd(chip));
396 	return !(r852_read_reg(dev, R852_CARD_STA) & R852_CARD_STA_BUSY);
397 }
398 
399 
400 /*
401  * Set ECC engine mode
402 */
403 
404 static void r852_ecc_hwctl(struct nand_chip *chip, int mode)
405 {
406 	struct r852_device *dev = r852_get_dev(nand_to_mtd(chip));
407 
408 	if (dev->card_unstable)
409 		return;
410 
411 	switch (mode) {
412 	case NAND_ECC_READ:
413 	case NAND_ECC_WRITE:
414 		/* enable ecc generation/check*/
415 		dev->ctlreg |= R852_CTL_ECC_ENABLE;
416 
417 		/* flush ecc buffer */
418 		r852_write_reg(dev, R852_CTL,
419 			dev->ctlreg | R852_CTL_ECC_ACCESS);
420 
421 		r852_read_reg_dword(dev, R852_DATALINE);
422 		r852_write_reg(dev, R852_CTL, dev->ctlreg);
423 		return;
424 
425 	case NAND_ECC_READSYN:
426 		/* disable ecc generation */
427 		dev->ctlreg &= ~R852_CTL_ECC_ENABLE;
428 		r852_write_reg(dev, R852_CTL, dev->ctlreg);
429 	}
430 }
431 
432 /*
433  * Calculate ECC, only used for writes
434  */
435 
436 static int r852_ecc_calculate(struct nand_chip *chip, const uint8_t *dat,
437 			      uint8_t *ecc_code)
438 {
439 	struct r852_device *dev = r852_get_dev(nand_to_mtd(chip));
440 	struct sm_oob *oob = (struct sm_oob *)ecc_code;
441 	uint32_t ecc1, ecc2;
442 
443 	if (dev->card_unstable)
444 		return 0;
445 
446 	dev->ctlreg &= ~R852_CTL_ECC_ENABLE;
447 	r852_write_reg(dev, R852_CTL, dev->ctlreg | R852_CTL_ECC_ACCESS);
448 
449 	ecc1 = r852_read_reg_dword(dev, R852_DATALINE);
450 	ecc2 = r852_read_reg_dword(dev, R852_DATALINE);
451 
452 	oob->ecc1[0] = (ecc1) & 0xFF;
453 	oob->ecc1[1] = (ecc1 >> 8) & 0xFF;
454 	oob->ecc1[2] = (ecc1 >> 16) & 0xFF;
455 
456 	oob->ecc2[0] = (ecc2) & 0xFF;
457 	oob->ecc2[1] = (ecc2 >> 8) & 0xFF;
458 	oob->ecc2[2] = (ecc2 >> 16) & 0xFF;
459 
460 	r852_write_reg(dev, R852_CTL, dev->ctlreg);
461 	return 0;
462 }
463 
464 /*
465  * Correct the data using ECC, hw did almost everything for us
466  */
467 
468 static int r852_ecc_correct(struct nand_chip *chip, uint8_t *dat,
469 			    uint8_t *read_ecc, uint8_t *calc_ecc)
470 {
471 	uint32_t ecc_reg;
472 	uint8_t ecc_status, err_byte;
473 	int i, error = 0;
474 
475 	struct r852_device *dev = r852_get_dev(nand_to_mtd(chip));
476 
477 	if (dev->card_unstable)
478 		return 0;
479 
480 	if (dev->dma_error) {
481 		dev->dma_error = 0;
482 		return -EIO;
483 	}
484 
485 	r852_write_reg(dev, R852_CTL, dev->ctlreg | R852_CTL_ECC_ACCESS);
486 	ecc_reg = r852_read_reg_dword(dev, R852_DATALINE);
487 	r852_write_reg(dev, R852_CTL, dev->ctlreg);
488 
489 	for (i = 0 ; i <= 1 ; i++) {
490 
491 		ecc_status = (ecc_reg >> 8) & 0xFF;
492 
493 		/* ecc uncorrectable error */
494 		if (ecc_status & R852_ECC_FAIL) {
495 			dbg("ecc: unrecoverable error, in half %d", i);
496 			error = -EBADMSG;
497 			goto exit;
498 		}
499 
500 		/* correctable error */
501 		if (ecc_status & R852_ECC_CORRECTABLE) {
502 
503 			err_byte = ecc_reg & 0xFF;
504 			dbg("ecc: recoverable error, "
505 				"in half %d, byte %d, bit %d", i,
506 				err_byte, ecc_status & R852_ECC_ERR_BIT_MSK);
507 
508 			dat[err_byte] ^=
509 				1 << (ecc_status & R852_ECC_ERR_BIT_MSK);
510 			error++;
511 		}
512 
513 		dat += 256;
514 		ecc_reg >>= 16;
515 	}
516 exit:
517 	return error;
518 }
519 
520 /*
521  * This is copy of nand_read_oob_std
522  * nand_read_oob_syndrome assumes we can send column address - we can't
523  */
524 static int r852_read_oob(struct nand_chip *chip, int page)
525 {
526 	struct mtd_info *mtd = nand_to_mtd(chip);
527 
528 	return nand_read_oob_op(chip, page, 0, chip->oob_poi, mtd->oobsize);
529 }
530 
531 /*
532  * Start the nand engine
533  */
534 
535 static void r852_engine_enable(struct r852_device *dev)
536 {
537 	if (r852_read_reg_dword(dev, R852_HW) & R852_HW_UNKNOWN) {
538 		r852_write_reg(dev, R852_CTL, R852_CTL_RESET | R852_CTL_ON);
539 		r852_write_reg_dword(dev, R852_HW, R852_HW_ENABLED);
540 	} else {
541 		r852_write_reg_dword(dev, R852_HW, R852_HW_ENABLED);
542 		r852_write_reg(dev, R852_CTL, R852_CTL_RESET | R852_CTL_ON);
543 	}
544 	msleep(300);
545 	r852_write_reg(dev, R852_CTL, 0);
546 }
547 
548 
549 /*
550  * Stop the nand engine
551  */
552 
553 static void r852_engine_disable(struct r852_device *dev)
554 {
555 	r852_write_reg_dword(dev, R852_HW, 0);
556 	r852_write_reg(dev, R852_CTL, R852_CTL_RESET);
557 }
558 
559 /*
560  * Test if card is present
561  */
562 
563 static void r852_card_update_present(struct r852_device *dev)
564 {
565 	unsigned long flags;
566 	uint8_t reg;
567 
568 	spin_lock_irqsave(&dev->irqlock, flags);
569 	reg = r852_read_reg(dev, R852_CARD_STA);
570 	dev->card_detected = !!(reg & R852_CARD_STA_PRESENT);
571 	spin_unlock_irqrestore(&dev->irqlock, flags);
572 }
573 
574 /*
575  * Update card detection IRQ state according to current card state
576  * which is read in r852_card_update_present
577  */
578 static void r852_update_card_detect(struct r852_device *dev)
579 {
580 	int card_detect_reg = r852_read_reg(dev, R852_CARD_IRQ_ENABLE);
581 	dev->card_unstable = 0;
582 
583 	card_detect_reg &= ~(R852_CARD_IRQ_REMOVE | R852_CARD_IRQ_INSERT);
584 	card_detect_reg |= R852_CARD_IRQ_GENABLE;
585 
586 	card_detect_reg |= dev->card_detected ?
587 		R852_CARD_IRQ_REMOVE : R852_CARD_IRQ_INSERT;
588 
589 	r852_write_reg(dev, R852_CARD_IRQ_ENABLE, card_detect_reg);
590 }
591 
592 static ssize_t r852_media_type_show(struct device *sys_dev,
593 			struct device_attribute *attr, char *buf)
594 {
595 	struct mtd_info *mtd = container_of(sys_dev, struct mtd_info, dev);
596 	struct r852_device *dev = r852_get_dev(mtd);
597 	char *data = dev->sm ? "smartmedia" : "xd";
598 
599 	strcpy(buf, data);
600 	return strlen(data);
601 }
602 
603 static DEVICE_ATTR(media_type, S_IRUGO, r852_media_type_show, NULL);
604 
605 
606 /* Detect properties of card in slot */
607 static void r852_update_media_status(struct r852_device *dev)
608 {
609 	uint8_t reg;
610 	unsigned long flags;
611 	int readonly;
612 
613 	spin_lock_irqsave(&dev->irqlock, flags);
614 	if (!dev->card_detected) {
615 		message("card removed");
616 		spin_unlock_irqrestore(&dev->irqlock, flags);
617 		return ;
618 	}
619 
620 	readonly  = r852_read_reg(dev, R852_CARD_STA) & R852_CARD_STA_RO;
621 	reg = r852_read_reg(dev, R852_DMA_CAP);
622 	dev->sm = (reg & (R852_DMA1 | R852_DMA2)) && (reg & R852_SMBIT);
623 
624 	message("detected %s %s card in slot",
625 		dev->sm ? "SmartMedia" : "xD",
626 		readonly ? "readonly" : "writeable");
627 
628 	dev->readonly = readonly;
629 	spin_unlock_irqrestore(&dev->irqlock, flags);
630 }
631 
632 /*
633  * Register the nand device
634  * Called when the card is detected
635  */
636 static int r852_register_nand_device(struct r852_device *dev)
637 {
638 	struct mtd_info *mtd = nand_to_mtd(dev->chip);
639 
640 	WARN_ON(dev->card_registered);
641 
642 	mtd->dev.parent = &dev->pci_dev->dev;
643 
644 	if (dev->readonly)
645 		dev->chip->options |= NAND_ROM;
646 
647 	r852_engine_enable(dev);
648 
649 	if (sm_register_device(mtd, dev->sm))
650 		goto error1;
651 
652 	if (device_create_file(&mtd->dev, &dev_attr_media_type)) {
653 		message("can't create media type sysfs attribute");
654 		goto error3;
655 	}
656 
657 	dev->card_registered = 1;
658 	return 0;
659 error3:
660 	nand_release(dev->chip);
661 error1:
662 	/* Force card redetect */
663 	dev->card_detected = 0;
664 	return -1;
665 }
666 
667 /*
668  * Unregister the card
669  */
670 
671 static void r852_unregister_nand_device(struct r852_device *dev)
672 {
673 	struct mtd_info *mtd = nand_to_mtd(dev->chip);
674 
675 	if (!dev->card_registered)
676 		return;
677 
678 	device_remove_file(&mtd->dev, &dev_attr_media_type);
679 	nand_release(dev->chip);
680 	r852_engine_disable(dev);
681 	dev->card_registered = 0;
682 }
683 
684 /* Card state updater */
685 static void r852_card_detect_work(struct work_struct *work)
686 {
687 	struct r852_device *dev =
688 		container_of(work, struct r852_device, card_detect_work.work);
689 
690 	r852_card_update_present(dev);
691 	r852_update_card_detect(dev);
692 	dev->card_unstable = 0;
693 
694 	/* False alarm */
695 	if (dev->card_detected == dev->card_registered)
696 		goto exit;
697 
698 	/* Read media properties */
699 	r852_update_media_status(dev);
700 
701 	/* Register the card */
702 	if (dev->card_detected)
703 		r852_register_nand_device(dev);
704 	else
705 		r852_unregister_nand_device(dev);
706 exit:
707 	r852_update_card_detect(dev);
708 }
709 
710 /* Ack + disable IRQ generation */
711 static void r852_disable_irqs(struct r852_device *dev)
712 {
713 	uint8_t reg;
714 	reg = r852_read_reg(dev, R852_CARD_IRQ_ENABLE);
715 	r852_write_reg(dev, R852_CARD_IRQ_ENABLE, reg & ~R852_CARD_IRQ_MASK);
716 
717 	reg = r852_read_reg_dword(dev, R852_DMA_IRQ_ENABLE);
718 	r852_write_reg_dword(dev, R852_DMA_IRQ_ENABLE,
719 					reg & ~R852_DMA_IRQ_MASK);
720 
721 	r852_write_reg(dev, R852_CARD_IRQ_STA, R852_CARD_IRQ_MASK);
722 	r852_write_reg_dword(dev, R852_DMA_IRQ_STA, R852_DMA_IRQ_MASK);
723 }
724 
725 /* Interrupt handler */
726 static irqreturn_t r852_irq(int irq, void *data)
727 {
728 	struct r852_device *dev = (struct r852_device *)data;
729 
730 	uint8_t card_status, dma_status;
731 	unsigned long flags;
732 	irqreturn_t ret = IRQ_NONE;
733 
734 	spin_lock_irqsave(&dev->irqlock, flags);
735 
736 	/* handle card detection interrupts first */
737 	card_status = r852_read_reg(dev, R852_CARD_IRQ_STA);
738 	r852_write_reg(dev, R852_CARD_IRQ_STA, card_status);
739 
740 	if (card_status & (R852_CARD_IRQ_INSERT|R852_CARD_IRQ_REMOVE)) {
741 
742 		ret = IRQ_HANDLED;
743 		dev->card_detected = !!(card_status & R852_CARD_IRQ_INSERT);
744 
745 		/* we shouldn't receive any interrupts if we wait for card
746 			to settle */
747 		WARN_ON(dev->card_unstable);
748 
749 		/* disable irqs while card is unstable */
750 		/* this will timeout DMA if active, but better that garbage */
751 		r852_disable_irqs(dev);
752 
753 		if (dev->card_unstable)
754 			goto out;
755 
756 		/* let, card state to settle a bit, and then do the work */
757 		dev->card_unstable = 1;
758 		queue_delayed_work(dev->card_workqueue,
759 			&dev->card_detect_work, msecs_to_jiffies(100));
760 		goto out;
761 	}
762 
763 
764 	/* Handle dma interrupts */
765 	dma_status = r852_read_reg_dword(dev, R852_DMA_IRQ_STA);
766 	r852_write_reg_dword(dev, R852_DMA_IRQ_STA, dma_status);
767 
768 	if (dma_status & R852_DMA_IRQ_MASK) {
769 
770 		ret = IRQ_HANDLED;
771 
772 		if (dma_status & R852_DMA_IRQ_ERROR) {
773 			dbg("received dma error IRQ");
774 			r852_dma_done(dev, -EIO);
775 			complete(&dev->dma_done);
776 			goto out;
777 		}
778 
779 		/* received DMA interrupt out of nowhere? */
780 		WARN_ON_ONCE(dev->dma_stage == 0);
781 
782 		if (dev->dma_stage == 0)
783 			goto out;
784 
785 		/* done device access */
786 		if (dev->dma_state == DMA_INTERNAL &&
787 				(dma_status & R852_DMA_IRQ_INTERNAL)) {
788 
789 			dev->dma_state = DMA_MEMORY;
790 			dev->dma_stage++;
791 		}
792 
793 		/* done memory DMA */
794 		if (dev->dma_state == DMA_MEMORY &&
795 				(dma_status & R852_DMA_IRQ_MEMORY)) {
796 			dev->dma_state = DMA_INTERNAL;
797 			dev->dma_stage++;
798 		}
799 
800 		/* Enable 2nd half of dma dance */
801 		if (dev->dma_stage == 2)
802 			r852_dma_enable(dev);
803 
804 		/* Operation done */
805 		if (dev->dma_stage == 3) {
806 			r852_dma_done(dev, 0);
807 			complete(&dev->dma_done);
808 		}
809 		goto out;
810 	}
811 
812 	/* Handle unknown interrupts */
813 	if (dma_status)
814 		dbg("bad dma IRQ status = %x", dma_status);
815 
816 	if (card_status & ~R852_CARD_STA_CD)
817 		dbg("strange card status = %x", card_status);
818 
819 out:
820 	spin_unlock_irqrestore(&dev->irqlock, flags);
821 	return ret;
822 }
823 
824 static int  r852_probe(struct pci_dev *pci_dev, const struct pci_device_id *id)
825 {
826 	int error;
827 	struct nand_chip *chip;
828 	struct r852_device *dev;
829 
830 	/* pci initialization */
831 	error = pci_enable_device(pci_dev);
832 
833 	if (error)
834 		goto error1;
835 
836 	pci_set_master(pci_dev);
837 
838 	error = dma_set_mask(&pci_dev->dev, DMA_BIT_MASK(32));
839 	if (error)
840 		goto error2;
841 
842 	error = pci_request_regions(pci_dev, DRV_NAME);
843 
844 	if (error)
845 		goto error3;
846 
847 	error = -ENOMEM;
848 
849 	/* init nand chip, but register it only on card insert */
850 	chip = kzalloc(sizeof(struct nand_chip), GFP_KERNEL);
851 
852 	if (!chip)
853 		goto error4;
854 
855 	/* commands */
856 	chip->legacy.cmd_ctrl = r852_cmdctl;
857 	chip->legacy.waitfunc = r852_wait;
858 	chip->legacy.dev_ready = r852_ready;
859 
860 	/* I/O */
861 	chip->legacy.read_byte = r852_read_byte;
862 	chip->legacy.read_buf = r852_read_buf;
863 	chip->legacy.write_buf = r852_write_buf;
864 
865 	/* ecc */
866 	chip->ecc.mode = NAND_ECC_HW_SYNDROME;
867 	chip->ecc.size = R852_DMA_LEN;
868 	chip->ecc.bytes = SM_OOB_SIZE;
869 	chip->ecc.strength = 2;
870 	chip->ecc.hwctl = r852_ecc_hwctl;
871 	chip->ecc.calculate = r852_ecc_calculate;
872 	chip->ecc.correct = r852_ecc_correct;
873 
874 	/* TODO: hack */
875 	chip->ecc.read_oob = r852_read_oob;
876 
877 	/* init our device structure */
878 	dev = kzalloc(sizeof(struct r852_device), GFP_KERNEL);
879 
880 	if (!dev)
881 		goto error5;
882 
883 	nand_set_controller_data(chip, dev);
884 	dev->chip = chip;
885 	dev->pci_dev = pci_dev;
886 	pci_set_drvdata(pci_dev, dev);
887 
888 	dev->bounce_buffer = dma_alloc_coherent(&pci_dev->dev, R852_DMA_LEN,
889 		&dev->phys_bounce_buffer, GFP_KERNEL);
890 
891 	if (!dev->bounce_buffer)
892 		goto error6;
893 
894 
895 	error = -ENODEV;
896 	dev->mmio = pci_ioremap_bar(pci_dev, 0);
897 
898 	if (!dev->mmio)
899 		goto error7;
900 
901 	error = -ENOMEM;
902 	dev->tmp_buffer = kzalloc(SM_SECTOR_SIZE, GFP_KERNEL);
903 
904 	if (!dev->tmp_buffer)
905 		goto error8;
906 
907 	init_completion(&dev->dma_done);
908 
909 	dev->card_workqueue = create_freezable_workqueue(DRV_NAME);
910 
911 	if (!dev->card_workqueue)
912 		goto error9;
913 
914 	INIT_DELAYED_WORK(&dev->card_detect_work, r852_card_detect_work);
915 
916 	/* shutdown everything - precation */
917 	r852_engine_disable(dev);
918 	r852_disable_irqs(dev);
919 
920 	r852_dma_test(dev);
921 
922 	dev->irq = pci_dev->irq;
923 	spin_lock_init(&dev->irqlock);
924 
925 	dev->card_detected = 0;
926 	r852_card_update_present(dev);
927 
928 	/*register irq handler*/
929 	error = -ENODEV;
930 	if (request_irq(pci_dev->irq, &r852_irq, IRQF_SHARED,
931 			  DRV_NAME, dev))
932 		goto error10;
933 
934 	/* kick initial present test */
935 	queue_delayed_work(dev->card_workqueue,
936 		&dev->card_detect_work, 0);
937 
938 
939 	pr_notice("driver loaded successfully\n");
940 	return 0;
941 
942 error10:
943 	destroy_workqueue(dev->card_workqueue);
944 error9:
945 	kfree(dev->tmp_buffer);
946 error8:
947 	pci_iounmap(pci_dev, dev->mmio);
948 error7:
949 	dma_free_coherent(&pci_dev->dev, R852_DMA_LEN, dev->bounce_buffer,
950 			  dev->phys_bounce_buffer);
951 error6:
952 	kfree(dev);
953 error5:
954 	kfree(chip);
955 error4:
956 	pci_release_regions(pci_dev);
957 error3:
958 error2:
959 	pci_disable_device(pci_dev);
960 error1:
961 	return error;
962 }
963 
964 static void r852_remove(struct pci_dev *pci_dev)
965 {
966 	struct r852_device *dev = pci_get_drvdata(pci_dev);
967 
968 	/* Stop detect workqueue -
969 		we are going to unregister the device anyway*/
970 	cancel_delayed_work_sync(&dev->card_detect_work);
971 	destroy_workqueue(dev->card_workqueue);
972 
973 	/* Unregister the device, this might make more IO */
974 	r852_unregister_nand_device(dev);
975 
976 	/* Stop interrupts */
977 	r852_disable_irqs(dev);
978 	free_irq(dev->irq, dev);
979 
980 	/* Cleanup */
981 	kfree(dev->tmp_buffer);
982 	pci_iounmap(pci_dev, dev->mmio);
983 	dma_free_coherent(&pci_dev->dev, R852_DMA_LEN, dev->bounce_buffer,
984 			  dev->phys_bounce_buffer);
985 
986 	kfree(dev->chip);
987 	kfree(dev);
988 
989 	/* Shutdown the PCI device */
990 	pci_release_regions(pci_dev);
991 	pci_disable_device(pci_dev);
992 }
993 
994 static void r852_shutdown(struct pci_dev *pci_dev)
995 {
996 	struct r852_device *dev = pci_get_drvdata(pci_dev);
997 
998 	cancel_delayed_work_sync(&dev->card_detect_work);
999 	r852_disable_irqs(dev);
1000 	synchronize_irq(dev->irq);
1001 	pci_disable_device(pci_dev);
1002 }
1003 
1004 #ifdef CONFIG_PM_SLEEP
1005 static int r852_suspend(struct device *device)
1006 {
1007 	struct r852_device *dev = pci_get_drvdata(to_pci_dev(device));
1008 
1009 	if (dev->ctlreg & R852_CTL_CARDENABLE)
1010 		return -EBUSY;
1011 
1012 	/* First make sure the detect work is gone */
1013 	cancel_delayed_work_sync(&dev->card_detect_work);
1014 
1015 	/* Turn off the interrupts and stop the device */
1016 	r852_disable_irqs(dev);
1017 	r852_engine_disable(dev);
1018 
1019 	/* If card was pulled off just during the suspend, which is very
1020 		unlikely, we will remove it on resume, it too late now
1021 		anyway... */
1022 	dev->card_unstable = 0;
1023 	return 0;
1024 }
1025 
1026 static int r852_resume(struct device *device)
1027 {
1028 	struct r852_device *dev = pci_get_drvdata(to_pci_dev(device));
1029 
1030 	r852_disable_irqs(dev);
1031 	r852_card_update_present(dev);
1032 	r852_engine_disable(dev);
1033 
1034 
1035 	/* If card status changed, just do the work */
1036 	if (dev->card_detected != dev->card_registered) {
1037 		dbg("card was %s during low power state",
1038 			dev->card_detected ? "added" : "removed");
1039 
1040 		queue_delayed_work(dev->card_workqueue,
1041 		&dev->card_detect_work, msecs_to_jiffies(1000));
1042 		return 0;
1043 	}
1044 
1045 	/* Otherwise, initialize the card */
1046 	if (dev->card_registered) {
1047 		r852_engine_enable(dev);
1048 		nand_select_target(dev->chip, 0);
1049 		nand_reset_op(dev->chip);
1050 		nand_deselect_target(dev->chip);
1051 	}
1052 
1053 	/* Program card detection IRQ */
1054 	r852_update_card_detect(dev);
1055 	return 0;
1056 }
1057 #endif
1058 
1059 static const struct pci_device_id r852_pci_id_tbl[] = {
1060 
1061 	{ PCI_VDEVICE(RICOH, 0x0852), },
1062 	{ },
1063 };
1064 
1065 MODULE_DEVICE_TABLE(pci, r852_pci_id_tbl);
1066 
1067 static SIMPLE_DEV_PM_OPS(r852_pm_ops, r852_suspend, r852_resume);
1068 
1069 static struct pci_driver r852_pci_driver = {
1070 	.name		= DRV_NAME,
1071 	.id_table	= r852_pci_id_tbl,
1072 	.probe		= r852_probe,
1073 	.remove		= r852_remove,
1074 	.shutdown	= r852_shutdown,
1075 	.driver.pm	= &r852_pm_ops,
1076 };
1077 
1078 module_pci_driver(r852_pci_driver);
1079 
1080 MODULE_LICENSE("GPL");
1081 MODULE_AUTHOR("Maxim Levitsky <maximlevitsky@gmail.com>");
1082 MODULE_DESCRIPTION("Ricoh 85xx xD/smartmedia card reader driver");
1083