1 /* 2 * NAND support for Marvell Orion SoC platforms 3 * 4 * Tzachi Perelstein <tzachi@marvell.com> 5 * 6 * This file is licensed under the terms of the GNU General Public 7 * License version 2. This program is licensed "as is" without any 8 * warranty of any kind, whether express or implied. 9 */ 10 11 #include <linux/slab.h> 12 #include <linux/module.h> 13 #include <linux/platform_device.h> 14 #include <linux/of.h> 15 #include <linux/mtd/mtd.h> 16 #include <linux/mtd/rawnand.h> 17 #include <linux/mtd/partitions.h> 18 #include <linux/clk.h> 19 #include <linux/err.h> 20 #include <linux/io.h> 21 #include <linux/sizes.h> 22 #include <linux/platform_data/mtd-orion_nand.h> 23 24 struct orion_nand_info { 25 struct nand_controller controller; 26 struct nand_chip chip; 27 struct clk *clk; 28 }; 29 30 static void orion_nand_cmd_ctrl(struct nand_chip *nc, int cmd, 31 unsigned int ctrl) 32 { 33 struct orion_nand_data *board = nand_get_controller_data(nc); 34 u32 offs; 35 36 if (cmd == NAND_CMD_NONE) 37 return; 38 39 if (ctrl & NAND_CLE) 40 offs = (1 << board->cle); 41 else if (ctrl & NAND_ALE) 42 offs = (1 << board->ale); 43 else 44 return; 45 46 if (nc->options & NAND_BUSWIDTH_16) 47 offs <<= 1; 48 49 writeb(cmd, nc->legacy.IO_ADDR_W + offs); 50 } 51 52 static void orion_nand_read_buf(struct nand_chip *chip, uint8_t *buf, int len) 53 { 54 void __iomem *io_base = chip->legacy.IO_ADDR_R; 55 #if defined(__LINUX_ARM_ARCH__) && __LINUX_ARM_ARCH__ >= 5 56 uint64_t *buf64; 57 #endif 58 int i = 0; 59 60 while (len && (unsigned long)buf & 7) { 61 *buf++ = readb(io_base); 62 len--; 63 } 64 #if defined(__LINUX_ARM_ARCH__) && __LINUX_ARM_ARCH__ >= 5 65 buf64 = (uint64_t *)buf; 66 while (i < len/8) { 67 /* 68 * Since GCC has no proper constraint (PR 43518) 69 * force x variable to r2/r3 registers as ldrd instruction 70 * requires first register to be even. 71 */ 72 register uint64_t x asm ("r2"); 73 74 asm volatile ("ldrd\t%0, [%1]" : "=&r" (x) : "r" (io_base)); 75 buf64[i++] = x; 76 } 77 i *= 8; 78 #else 79 readsl(io_base, buf, len/4); 80 i = len / 4 * 4; 81 #endif 82 while (i < len) 83 buf[i++] = readb(io_base); 84 } 85 86 static int orion_nand_attach_chip(struct nand_chip *chip) 87 { 88 if (chip->ecc.engine_type == NAND_ECC_ENGINE_TYPE_SOFT && 89 chip->ecc.algo == NAND_ECC_ALGO_UNKNOWN) 90 chip->ecc.algo = NAND_ECC_ALGO_HAMMING; 91 92 return 0; 93 } 94 95 static const struct nand_controller_ops orion_nand_ops = { 96 .attach_chip = orion_nand_attach_chip, 97 }; 98 99 static int __init orion_nand_probe(struct platform_device *pdev) 100 { 101 struct orion_nand_info *info; 102 struct mtd_info *mtd; 103 struct nand_chip *nc; 104 struct orion_nand_data *board; 105 struct resource *res; 106 void __iomem *io_base; 107 int ret = 0; 108 u32 val = 0; 109 110 info = devm_kzalloc(&pdev->dev, 111 sizeof(struct orion_nand_info), 112 GFP_KERNEL); 113 if (!info) 114 return -ENOMEM; 115 nc = &info->chip; 116 mtd = nand_to_mtd(nc); 117 118 nand_controller_init(&info->controller); 119 info->controller.ops = &orion_nand_ops; 120 nc->controller = &info->controller; 121 122 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 123 io_base = devm_ioremap_resource(&pdev->dev, res); 124 125 if (IS_ERR(io_base)) 126 return PTR_ERR(io_base); 127 128 if (pdev->dev.of_node) { 129 board = devm_kzalloc(&pdev->dev, sizeof(struct orion_nand_data), 130 GFP_KERNEL); 131 if (!board) 132 return -ENOMEM; 133 if (!of_property_read_u32(pdev->dev.of_node, "cle", &val)) 134 board->cle = (u8)val; 135 else 136 board->cle = 0; 137 if (!of_property_read_u32(pdev->dev.of_node, "ale", &val)) 138 board->ale = (u8)val; 139 else 140 board->ale = 1; 141 if (!of_property_read_u32(pdev->dev.of_node, 142 "bank-width", &val)) 143 board->width = (u8)val * 8; 144 else 145 board->width = 8; 146 if (!of_property_read_u32(pdev->dev.of_node, 147 "chip-delay", &val)) 148 board->chip_delay = (u8)val; 149 } else { 150 board = dev_get_platdata(&pdev->dev); 151 } 152 153 mtd->dev.parent = &pdev->dev; 154 155 nand_set_controller_data(nc, board); 156 nand_set_flash_node(nc, pdev->dev.of_node); 157 nc->legacy.IO_ADDR_R = nc->legacy.IO_ADDR_W = io_base; 158 nc->legacy.cmd_ctrl = orion_nand_cmd_ctrl; 159 nc->legacy.read_buf = orion_nand_read_buf; 160 161 if (board->chip_delay) 162 nc->legacy.chip_delay = board->chip_delay; 163 164 WARN(board->width > 16, 165 "%d bit bus width out of range", 166 board->width); 167 168 if (board->width == 16) 169 nc->options |= NAND_BUSWIDTH_16; 170 171 platform_set_drvdata(pdev, info); 172 173 /* Not all platforms can gate the clock, so it is optional. */ 174 info->clk = devm_clk_get_optional(&pdev->dev, NULL); 175 if (IS_ERR(info->clk)) 176 return dev_err_probe(&pdev->dev, PTR_ERR(info->clk), 177 "failed to get clock!\n"); 178 179 ret = clk_prepare_enable(info->clk); 180 if (ret) { 181 dev_err(&pdev->dev, "failed to prepare clock!\n"); 182 return ret; 183 } 184 185 /* 186 * This driver assumes that the default ECC engine should be TYPE_SOFT. 187 * Set ->engine_type before registering the NAND devices in order to 188 * provide a driver specific default value. 189 */ 190 nc->ecc.engine_type = NAND_ECC_ENGINE_TYPE_SOFT; 191 192 ret = nand_scan(nc, 1); 193 if (ret) 194 goto no_dev; 195 196 mtd->name = "orion_nand"; 197 ret = mtd_device_register(mtd, board->parts, board->nr_parts); 198 if (ret) { 199 nand_cleanup(nc); 200 goto no_dev; 201 } 202 203 return 0; 204 205 no_dev: 206 clk_disable_unprepare(info->clk); 207 return ret; 208 } 209 210 static int orion_nand_remove(struct platform_device *pdev) 211 { 212 struct orion_nand_info *info = platform_get_drvdata(pdev); 213 struct nand_chip *chip = &info->chip; 214 int ret; 215 216 ret = mtd_device_unregister(nand_to_mtd(chip)); 217 WARN_ON(ret); 218 219 nand_cleanup(chip); 220 221 clk_disable_unprepare(info->clk); 222 223 return 0; 224 } 225 226 #ifdef CONFIG_OF 227 static const struct of_device_id orion_nand_of_match_table[] = { 228 { .compatible = "marvell,orion-nand", }, 229 {}, 230 }; 231 MODULE_DEVICE_TABLE(of, orion_nand_of_match_table); 232 #endif 233 234 static struct platform_driver orion_nand_driver = { 235 .remove = orion_nand_remove, 236 .driver = { 237 .name = "orion_nand", 238 .of_match_table = of_match_ptr(orion_nand_of_match_table), 239 }, 240 }; 241 242 module_platform_driver_probe(orion_nand_driver, orion_nand_probe); 243 244 MODULE_LICENSE("GPL"); 245 MODULE_AUTHOR("Tzachi Perelstein"); 246 MODULE_DESCRIPTION("NAND glue for Orion platforms"); 247 MODULE_ALIAS("platform:orion_nand"); 248