xref: /openbmc/linux/drivers/mtd/nand/raw/orion_nand.c (revision aa6159ab)
1 /*
2  * NAND support for Marvell Orion SoC platforms
3  *
4  * Tzachi Perelstein <tzachi@marvell.com>
5  *
6  * This file is licensed under  the terms of the GNU General Public
7  * License version 2. This program is licensed "as is" without any
8  * warranty of any kind, whether express or implied.
9  */
10 
11 #include <linux/slab.h>
12 #include <linux/module.h>
13 #include <linux/platform_device.h>
14 #include <linux/of.h>
15 #include <linux/mtd/mtd.h>
16 #include <linux/mtd/rawnand.h>
17 #include <linux/mtd/partitions.h>
18 #include <linux/clk.h>
19 #include <linux/err.h>
20 #include <linux/io.h>
21 #include <linux/sizes.h>
22 #include <linux/platform_data/mtd-orion_nand.h>
23 
24 struct orion_nand_info {
25 	struct nand_controller controller;
26 	struct nand_chip chip;
27 	struct clk *clk;
28 };
29 
30 static void orion_nand_cmd_ctrl(struct nand_chip *nc, int cmd,
31 				unsigned int ctrl)
32 {
33 	struct orion_nand_data *board = nand_get_controller_data(nc);
34 	u32 offs;
35 
36 	if (cmd == NAND_CMD_NONE)
37 		return;
38 
39 	if (ctrl & NAND_CLE)
40 		offs = (1 << board->cle);
41 	else if (ctrl & NAND_ALE)
42 		offs = (1 << board->ale);
43 	else
44 		return;
45 
46 	if (nc->options & NAND_BUSWIDTH_16)
47 		offs <<= 1;
48 
49 	writeb(cmd, nc->legacy.IO_ADDR_W + offs);
50 }
51 
52 static void orion_nand_read_buf(struct nand_chip *chip, uint8_t *buf, int len)
53 {
54 	void __iomem *io_base = chip->legacy.IO_ADDR_R;
55 #if defined(__LINUX_ARM_ARCH__) && __LINUX_ARM_ARCH__ >= 5
56 	uint64_t *buf64;
57 #endif
58 	int i = 0;
59 
60 	while (len && (unsigned long)buf & 7) {
61 		*buf++ = readb(io_base);
62 		len--;
63 	}
64 #if defined(__LINUX_ARM_ARCH__) && __LINUX_ARM_ARCH__ >= 5
65 	buf64 = (uint64_t *)buf;
66 	while (i < len/8) {
67 		/*
68 		 * Since GCC has no proper constraint (PR 43518)
69 		 * force x variable to r2/r3 registers as ldrd instruction
70 		 * requires first register to be even.
71 		 */
72 		register uint64_t x asm ("r2");
73 
74 		asm volatile ("ldrd\t%0, [%1]" : "=&r" (x) : "r" (io_base));
75 		buf64[i++] = x;
76 	}
77 	i *= 8;
78 #else
79 	readsl(io_base, buf, len/4);
80 	i = len / 4 * 4;
81 #endif
82 	while (i < len)
83 		buf[i++] = readb(io_base);
84 }
85 
86 static int orion_nand_attach_chip(struct nand_chip *chip)
87 {
88 	chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_SOFT;
89 
90 	if (chip->ecc.algo == NAND_ECC_ALGO_UNKNOWN)
91 		chip->ecc.algo = NAND_ECC_ALGO_HAMMING;
92 
93 	return 0;
94 }
95 
96 static const struct nand_controller_ops orion_nand_ops = {
97 	.attach_chip = orion_nand_attach_chip,
98 };
99 
100 static int __init orion_nand_probe(struct platform_device *pdev)
101 {
102 	struct orion_nand_info *info;
103 	struct mtd_info *mtd;
104 	struct nand_chip *nc;
105 	struct orion_nand_data *board;
106 	struct resource *res;
107 	void __iomem *io_base;
108 	int ret = 0;
109 	u32 val = 0;
110 
111 	info = devm_kzalloc(&pdev->dev,
112 			sizeof(struct orion_nand_info),
113 			GFP_KERNEL);
114 	if (!info)
115 		return -ENOMEM;
116 	nc = &info->chip;
117 	mtd = nand_to_mtd(nc);
118 
119 	nand_controller_init(&info->controller);
120 	info->controller.ops = &orion_nand_ops;
121 	nc->controller = &info->controller;
122 
123 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
124 	io_base = devm_ioremap_resource(&pdev->dev, res);
125 
126 	if (IS_ERR(io_base))
127 		return PTR_ERR(io_base);
128 
129 	if (pdev->dev.of_node) {
130 		board = devm_kzalloc(&pdev->dev, sizeof(struct orion_nand_data),
131 					GFP_KERNEL);
132 		if (!board)
133 			return -ENOMEM;
134 		if (!of_property_read_u32(pdev->dev.of_node, "cle", &val))
135 			board->cle = (u8)val;
136 		else
137 			board->cle = 0;
138 		if (!of_property_read_u32(pdev->dev.of_node, "ale", &val))
139 			board->ale = (u8)val;
140 		else
141 			board->ale = 1;
142 		if (!of_property_read_u32(pdev->dev.of_node,
143 						"bank-width", &val))
144 			board->width = (u8)val * 8;
145 		else
146 			board->width = 8;
147 		if (!of_property_read_u32(pdev->dev.of_node,
148 						"chip-delay", &val))
149 			board->chip_delay = (u8)val;
150 	} else {
151 		board = dev_get_platdata(&pdev->dev);
152 	}
153 
154 	mtd->dev.parent = &pdev->dev;
155 
156 	nand_set_controller_data(nc, board);
157 	nand_set_flash_node(nc, pdev->dev.of_node);
158 	nc->legacy.IO_ADDR_R = nc->legacy.IO_ADDR_W = io_base;
159 	nc->legacy.cmd_ctrl = orion_nand_cmd_ctrl;
160 	nc->legacy.read_buf = orion_nand_read_buf;
161 
162 	if (board->chip_delay)
163 		nc->legacy.chip_delay = board->chip_delay;
164 
165 	WARN(board->width > 16,
166 		"%d bit bus width out of range",
167 		board->width);
168 
169 	if (board->width == 16)
170 		nc->options |= NAND_BUSWIDTH_16;
171 
172 	platform_set_drvdata(pdev, info);
173 
174 	/* Not all platforms can gate the clock, so it is not
175 	   an error if the clock does not exists. */
176 	info->clk = devm_clk_get(&pdev->dev, NULL);
177 	if (IS_ERR(info->clk)) {
178 		ret = PTR_ERR(info->clk);
179 		if (ret == -ENOENT) {
180 			info->clk = NULL;
181 		} else {
182 			dev_err(&pdev->dev, "failed to get clock!\n");
183 			return ret;
184 		}
185 	}
186 
187 	ret = clk_prepare_enable(info->clk);
188 	if (ret) {
189 		dev_err(&pdev->dev, "failed to prepare clock!\n");
190 		return ret;
191 	}
192 
193 	ret = nand_scan(nc, 1);
194 	if (ret)
195 		goto no_dev;
196 
197 	mtd->name = "orion_nand";
198 	ret = mtd_device_register(mtd, board->parts, board->nr_parts);
199 	if (ret) {
200 		nand_cleanup(nc);
201 		goto no_dev;
202 	}
203 
204 	return 0;
205 
206 no_dev:
207 	clk_disable_unprepare(info->clk);
208 	return ret;
209 }
210 
211 static int orion_nand_remove(struct platform_device *pdev)
212 {
213 	struct orion_nand_info *info = platform_get_drvdata(pdev);
214 	struct nand_chip *chip = &info->chip;
215 	int ret;
216 
217 	ret = mtd_device_unregister(nand_to_mtd(chip));
218 	WARN_ON(ret);
219 
220 	nand_cleanup(chip);
221 
222 	clk_disable_unprepare(info->clk);
223 
224 	return 0;
225 }
226 
227 #ifdef CONFIG_OF
228 static const struct of_device_id orion_nand_of_match_table[] = {
229 	{ .compatible = "marvell,orion-nand", },
230 	{},
231 };
232 MODULE_DEVICE_TABLE(of, orion_nand_of_match_table);
233 #endif
234 
235 static struct platform_driver orion_nand_driver = {
236 	.remove		= orion_nand_remove,
237 	.driver		= {
238 		.name	= "orion_nand",
239 		.of_match_table = of_match_ptr(orion_nand_of_match_table),
240 	},
241 };
242 
243 module_platform_driver_probe(orion_nand_driver, orion_nand_probe);
244 
245 MODULE_LICENSE("GPL");
246 MODULE_AUTHOR("Tzachi Perelstein");
247 MODULE_DESCRIPTION("NAND glue for Orion platforms");
248 MODULE_ALIAS("platform:orion_nand");
249