1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * Copyright (C) 2017 Free Electrons
4  * Copyright (C) 2017 NextThing Co
5  *
6  * Author: Boris Brezillon <boris.brezillon@free-electrons.com>
7  */
8 
9 #include "linux/delay.h"
10 #include "internals.h"
11 
12 #define MACRONIX_READ_RETRY_BIT BIT(0)
13 #define MACRONIX_NUM_READ_RETRY_MODES 6
14 
15 #define ONFI_FEATURE_ADDR_MXIC_PROTECTION 0xA0
16 #define MXIC_BLOCK_PROTECTION_ALL_LOCK 0x38
17 #define MXIC_BLOCK_PROTECTION_ALL_UNLOCK 0x0
18 
19 #define ONFI_FEATURE_ADDR_MXIC_RANDOMIZER 0xB0
20 #define MACRONIX_RANDOMIZER_BIT BIT(1)
21 #define MACRONIX_RANDOMIZER_ENPGM BIT(0)
22 #define MACRONIX_RANDOMIZER_RANDEN BIT(1)
23 #define MACRONIX_RANDOMIZER_RANDOPT BIT(2)
24 #define MACRONIX_RANDOMIZER_MODE_ENTER	\
25 	(MACRONIX_RANDOMIZER_ENPGM |	\
26 	 MACRONIX_RANDOMIZER_RANDEN |	\
27 	 MACRONIX_RANDOMIZER_RANDOPT)
28 #define MACRONIX_RANDOMIZER_MODE_EXIT	\
29 	(MACRONIX_RANDOMIZER_RANDEN |	\
30 	 MACRONIX_RANDOMIZER_RANDOPT)
31 
32 #define MXIC_CMD_POWER_DOWN 0xB9
33 
34 struct nand_onfi_vendor_macronix {
35 	u8 reserved;
36 	u8 reliability_func;
37 } __packed;
38 
39 static int macronix_nand_setup_read_retry(struct nand_chip *chip, int mode)
40 {
41 	u8 feature[ONFI_SUBFEATURE_PARAM_LEN];
42 
43 	if (!chip->parameters.supports_set_get_features ||
44 	    !test_bit(ONFI_FEATURE_ADDR_READ_RETRY,
45 		      chip->parameters.set_feature_list))
46 		return -ENOTSUPP;
47 
48 	feature[0] = mode;
49 	return nand_set_features(chip, ONFI_FEATURE_ADDR_READ_RETRY, feature);
50 }
51 
52 static int macronix_nand_randomizer_check_enable(struct nand_chip *chip)
53 {
54 	u8 feature[ONFI_SUBFEATURE_PARAM_LEN];
55 	int ret;
56 
57 	ret = nand_get_features(chip, ONFI_FEATURE_ADDR_MXIC_RANDOMIZER,
58 				feature);
59 	if (ret < 0)
60 		return ret;
61 
62 	if (feature[0])
63 		return feature[0];
64 
65 	feature[0] = MACRONIX_RANDOMIZER_MODE_ENTER;
66 	ret = nand_set_features(chip, ONFI_FEATURE_ADDR_MXIC_RANDOMIZER,
67 				feature);
68 	if (ret < 0)
69 		return ret;
70 
71 	/* RANDEN and RANDOPT OTP bits are programmed */
72 	feature[0] = 0x0;
73 	ret = nand_prog_page_op(chip, 0, 0, feature, 1);
74 	if (ret < 0)
75 		return ret;
76 
77 	ret = nand_get_features(chip, ONFI_FEATURE_ADDR_MXIC_RANDOMIZER,
78 				feature);
79 	if (ret < 0)
80 		return ret;
81 
82 	feature[0] &= MACRONIX_RANDOMIZER_MODE_EXIT;
83 	ret = nand_set_features(chip, ONFI_FEATURE_ADDR_MXIC_RANDOMIZER,
84 				feature);
85 	if (ret < 0)
86 		return ret;
87 
88 	return 0;
89 }
90 
91 static void macronix_nand_onfi_init(struct nand_chip *chip)
92 {
93 	struct nand_parameters *p = &chip->parameters;
94 	struct nand_onfi_vendor_macronix *mxic;
95 	struct device_node *dn = nand_get_flash_node(chip);
96 	int rand_otp;
97 	int ret;
98 
99 	if (!p->onfi)
100 		return;
101 
102 	rand_otp = of_property_read_bool(dn, "mxic,enable-randomizer-otp");
103 
104 	mxic = (struct nand_onfi_vendor_macronix *)p->onfi->vendor;
105 	/* Subpage write is prohibited in randomizer operatoin */
106 	if (rand_otp && chip->options & NAND_NO_SUBPAGE_WRITE &&
107 	    mxic->reliability_func & MACRONIX_RANDOMIZER_BIT) {
108 		if (p->supports_set_get_features) {
109 			bitmap_set(p->set_feature_list,
110 				   ONFI_FEATURE_ADDR_MXIC_RANDOMIZER, 1);
111 			bitmap_set(p->get_feature_list,
112 				   ONFI_FEATURE_ADDR_MXIC_RANDOMIZER, 1);
113 			ret = macronix_nand_randomizer_check_enable(chip);
114 			if (ret < 0) {
115 				bitmap_clear(p->set_feature_list,
116 					     ONFI_FEATURE_ADDR_MXIC_RANDOMIZER,
117 					     1);
118 				bitmap_clear(p->get_feature_list,
119 					     ONFI_FEATURE_ADDR_MXIC_RANDOMIZER,
120 					     1);
121 				pr_info("Macronix NAND randomizer failed\n");
122 			} else {
123 				pr_info("Macronix NAND randomizer enabled\n");
124 			}
125 		}
126 	}
127 
128 	if ((mxic->reliability_func & MACRONIX_READ_RETRY_BIT) == 0)
129 		return;
130 
131 	chip->read_retries = MACRONIX_NUM_READ_RETRY_MODES;
132 	chip->ops.setup_read_retry = macronix_nand_setup_read_retry;
133 
134 	if (p->supports_set_get_features) {
135 		bitmap_set(p->set_feature_list,
136 			   ONFI_FEATURE_ADDR_READ_RETRY, 1);
137 		bitmap_set(p->get_feature_list,
138 			   ONFI_FEATURE_ADDR_READ_RETRY, 1);
139 	}
140 }
141 
142 /*
143  * Macronix AC series does not support using SET/GET_FEATURES to change
144  * the timings unlike what is declared in the parameter page. Unflag
145  * this feature to avoid unnecessary downturns.
146  */
147 static void macronix_nand_fix_broken_get_timings(struct nand_chip *chip)
148 {
149 	int i;
150 	static const char * const broken_get_timings[] = {
151 		"MX30LF1G18AC",
152 		"MX30LF1G28AC",
153 		"MX30LF2G18AC",
154 		"MX30LF2G28AC",
155 		"MX30LF4G18AC",
156 		"MX30LF4G28AC",
157 		"MX60LF8G18AC",
158 		"MX30UF1G18AC",
159 		"MX30UF1G16AC",
160 		"MX30UF2G18AC",
161 		"MX30UF2G16AC",
162 		"MX30UF4G18AC",
163 		"MX30UF4G16AC",
164 		"MX30UF4G28AC",
165 	};
166 
167 	if (!chip->parameters.supports_set_get_features)
168 		return;
169 
170 	i = match_string(broken_get_timings, ARRAY_SIZE(broken_get_timings),
171 			 chip->parameters.model);
172 	if (i < 0)
173 		return;
174 
175 	bitmap_clear(chip->parameters.get_feature_list,
176 		     ONFI_FEATURE_ADDR_TIMING_MODE, 1);
177 	bitmap_clear(chip->parameters.set_feature_list,
178 		     ONFI_FEATURE_ADDR_TIMING_MODE, 1);
179 }
180 
181 /*
182  * Macronix NAND supports Block Protection by Protectoin(PT) pin;
183  * active high at power-on which protects the entire chip even the #WP is
184  * disabled. Lock/unlock protection area can be partition according to
185  * protection bits, i.e. upper 1/2 locked, upper 1/4 locked and so on.
186  */
187 static int mxic_nand_lock(struct nand_chip *chip, loff_t ofs, uint64_t len)
188 {
189 	u8 feature[ONFI_SUBFEATURE_PARAM_LEN];
190 	int ret;
191 
192 	feature[0] = MXIC_BLOCK_PROTECTION_ALL_LOCK;
193 	nand_select_target(chip, 0);
194 	ret = nand_set_features(chip, ONFI_FEATURE_ADDR_MXIC_PROTECTION,
195 				feature);
196 	nand_deselect_target(chip);
197 	if (ret)
198 		pr_err("%s all blocks failed\n", __func__);
199 
200 	return ret;
201 }
202 
203 static int mxic_nand_unlock(struct nand_chip *chip, loff_t ofs, uint64_t len)
204 {
205 	u8 feature[ONFI_SUBFEATURE_PARAM_LEN];
206 	int ret;
207 
208 	feature[0] = MXIC_BLOCK_PROTECTION_ALL_UNLOCK;
209 	nand_select_target(chip, 0);
210 	ret = nand_set_features(chip, ONFI_FEATURE_ADDR_MXIC_PROTECTION,
211 				feature);
212 	nand_deselect_target(chip);
213 	if (ret)
214 		pr_err("%s all blocks failed\n", __func__);
215 
216 	return ret;
217 }
218 
219 static void macronix_nand_block_protection_support(struct nand_chip *chip)
220 {
221 	u8 feature[ONFI_SUBFEATURE_PARAM_LEN];
222 	int ret;
223 
224 	bitmap_set(chip->parameters.get_feature_list,
225 		   ONFI_FEATURE_ADDR_MXIC_PROTECTION, 1);
226 
227 	feature[0] = MXIC_BLOCK_PROTECTION_ALL_UNLOCK;
228 	nand_select_target(chip, 0);
229 	ret = nand_get_features(chip, ONFI_FEATURE_ADDR_MXIC_PROTECTION,
230 				feature);
231 	nand_deselect_target(chip);
232 	if (ret || feature[0] != MXIC_BLOCK_PROTECTION_ALL_LOCK) {
233 		if (ret)
234 			pr_err("Block protection check failed\n");
235 
236 		bitmap_clear(chip->parameters.get_feature_list,
237 			     ONFI_FEATURE_ADDR_MXIC_PROTECTION, 1);
238 		return;
239 	}
240 
241 	bitmap_set(chip->parameters.set_feature_list,
242 		   ONFI_FEATURE_ADDR_MXIC_PROTECTION, 1);
243 
244 	chip->ops.lock_area = mxic_nand_lock;
245 	chip->ops.unlock_area = mxic_nand_unlock;
246 }
247 
248 static int nand_power_down_op(struct nand_chip *chip)
249 {
250 	int ret;
251 
252 	if (nand_has_exec_op(chip)) {
253 		struct nand_op_instr instrs[] = {
254 			NAND_OP_CMD(MXIC_CMD_POWER_DOWN, 0),
255 		};
256 
257 		struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs);
258 
259 		ret = nand_exec_op(chip, &op);
260 		if (ret)
261 			return ret;
262 
263 	} else {
264 		chip->legacy.cmdfunc(chip, MXIC_CMD_POWER_DOWN, -1, -1);
265 	}
266 
267 	return 0;
268 }
269 
270 static int mxic_nand_suspend(struct nand_chip *chip)
271 {
272 	int ret;
273 
274 	nand_select_target(chip, 0);
275 	ret = nand_power_down_op(chip);
276 	if (ret < 0)
277 		pr_err("Suspending MXIC NAND chip failed (%d)\n", ret);
278 	nand_deselect_target(chip);
279 
280 	return ret;
281 }
282 
283 static void mxic_nand_resume(struct nand_chip *chip)
284 {
285 	/*
286 	 * Toggle #CS pin to resume NAND device and don't care
287 	 * of the others CLE, #WE, #RE pins status.
288 	 * A NAND controller ensure it is able to assert/de-assert #CS
289 	 * by sending any byte over the NAND bus.
290 	 * i.e.,
291 	 * NAND power down command or reset command w/o R/B# status checking.
292 	 */
293 	nand_select_target(chip, 0);
294 	nand_power_down_op(chip);
295 	/* The minimum of a recovery time tRDP is 35 us */
296 	usleep_range(35, 100);
297 	nand_deselect_target(chip);
298 }
299 
300 static void macronix_nand_deep_power_down_support(struct nand_chip *chip)
301 {
302 	int i;
303 	static const char * const deep_power_down_dev[] = {
304 		"MX30UF1G28AD",
305 		"MX30UF2G28AD",
306 		"MX30UF4G28AD",
307 	};
308 
309 	i = match_string(deep_power_down_dev, ARRAY_SIZE(deep_power_down_dev),
310 			 chip->parameters.model);
311 	if (i < 0)
312 		return;
313 
314 	chip->ops.suspend = mxic_nand_suspend;
315 	chip->ops.resume = mxic_nand_resume;
316 }
317 
318 static int macronix_nand_init(struct nand_chip *chip)
319 {
320 	if (nand_is_slc(chip))
321 		chip->options |= NAND_BBM_FIRSTPAGE | NAND_BBM_SECONDPAGE;
322 
323 	macronix_nand_fix_broken_get_timings(chip);
324 	macronix_nand_onfi_init(chip);
325 	macronix_nand_block_protection_support(chip);
326 	macronix_nand_deep_power_down_support(chip);
327 
328 	return 0;
329 }
330 
331 const struct nand_manufacturer_ops macronix_nand_manuf_ops = {
332 	.init = macronix_nand_init,
333 };
334