1 /* 2 * Freescale GPMI NAND Flash Driver 3 * 4 * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. 5 * Copyright (C) 2008 Embedded Alley Solutions, Inc. 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; either version 2 of the License, or 10 * (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 */ 17 #ifndef __DRIVERS_MTD_NAND_GPMI_NAND_H 18 #define __DRIVERS_MTD_NAND_GPMI_NAND_H 19 20 #include <linux/mtd/rawnand.h> 21 #include <linux/platform_device.h> 22 #include <linux/dma-mapping.h> 23 #include <linux/dmaengine.h> 24 25 #define GPMI_CLK_MAX 5 /* MX6Q needs five clocks */ 26 struct resources { 27 void __iomem *gpmi_regs; 28 void __iomem *bch_regs; 29 unsigned int dma_low_channel; 30 unsigned int dma_high_channel; 31 struct clk *clock[GPMI_CLK_MAX]; 32 }; 33 34 /** 35 * struct bch_geometry - BCH geometry description. 36 * @gf_len: The length of Galois Field. (e.g., 13 or 14) 37 * @ecc_strength: A number that describes the strength of the ECC 38 * algorithm. 39 * @page_size: The size, in bytes, of a physical page, including 40 * both data and OOB. 41 * @metadata_size: The size, in bytes, of the metadata. 42 * @ecc_chunk_size: The size, in bytes, of a single ECC chunk. Note 43 * the first chunk in the page includes both data and 44 * metadata, so it's a bit larger than this value. 45 * @ecc_chunk_count: The number of ECC chunks in the page, 46 * @payload_size: The size, in bytes, of the payload buffer. 47 * @auxiliary_size: The size, in bytes, of the auxiliary buffer. 48 * @auxiliary_status_offset: The offset into the auxiliary buffer at which 49 * the ECC status appears. 50 * @block_mark_byte_offset: The byte offset in the ECC-based page view at 51 * which the underlying physical block mark appears. 52 * @block_mark_bit_offset: The bit offset into the ECC-based page view at 53 * which the underlying physical block mark appears. 54 */ 55 struct bch_geometry { 56 unsigned int gf_len; 57 unsigned int ecc_strength; 58 unsigned int page_size; 59 unsigned int metadata_size; 60 unsigned int ecc_chunk_size; 61 unsigned int ecc_chunk_count; 62 unsigned int payload_size; 63 unsigned int auxiliary_size; 64 unsigned int auxiliary_status_offset; 65 unsigned int block_mark_byte_offset; 66 unsigned int block_mark_bit_offset; 67 }; 68 69 /** 70 * struct boot_rom_geometry - Boot ROM geometry description. 71 * @stride_size_in_pages: The size of a boot block stride, in pages. 72 * @search_area_stride_exponent: The logarithm to base 2 of the size of a 73 * search area in boot block strides. 74 */ 75 struct boot_rom_geometry { 76 unsigned int stride_size_in_pages; 77 unsigned int search_area_stride_exponent; 78 }; 79 80 /* DMA operations types */ 81 enum dma_ops_type { 82 DMA_FOR_COMMAND = 1, 83 DMA_FOR_READ_DATA, 84 DMA_FOR_WRITE_DATA, 85 DMA_FOR_READ_ECC_PAGE, 86 DMA_FOR_WRITE_ECC_PAGE 87 }; 88 89 enum gpmi_type { 90 IS_MX23, 91 IS_MX28, 92 IS_MX6Q, 93 IS_MX6SX, 94 IS_MX7D, 95 }; 96 97 struct gpmi_devdata { 98 enum gpmi_type type; 99 int bch_max_ecc_strength; 100 int max_chain_delay; /* See the async EDO mode */ 101 const char * const *clks; 102 const int clks_count; 103 }; 104 105 /** 106 * struct gpmi_nfc_hardware_timing - GPMI hardware timing parameters. 107 * @must_apply_timings: Whether controller timings have already been 108 * applied or not (useful only while there is 109 * support for only one chip select) 110 * @clk_rate: The clock rate that must be used to derive the 111 * following parameters 112 * @timing0: HW_GPMI_TIMING0 register 113 * @timing1: HW_GPMI_TIMING1 register 114 * @ctrl1n: HW_GPMI_CTRL1n register 115 */ 116 struct gpmi_nfc_hardware_timing { 117 bool must_apply_timings; 118 unsigned long int clk_rate; 119 u32 timing0; 120 u32 timing1; 121 u32 ctrl1n; 122 }; 123 124 struct gpmi_nand_data { 125 /* Devdata */ 126 const struct gpmi_devdata *devdata; 127 128 /* System Interface */ 129 struct device *dev; 130 struct platform_device *pdev; 131 132 /* Resources */ 133 struct resources resources; 134 135 /* Flash Hardware */ 136 struct gpmi_nfc_hardware_timing hw; 137 138 /* BCH */ 139 struct bch_geometry bch_geometry; 140 struct completion bch_done; 141 142 /* NAND Boot issue */ 143 bool swap_block_mark; 144 struct boot_rom_geometry rom_geometry; 145 146 /* MTD / NAND */ 147 struct nand_chip nand; 148 149 /* General-use Variables */ 150 int current_chip; 151 unsigned int command_length; 152 153 /* passed from upper layer */ 154 uint8_t *upper_buf; 155 int upper_len; 156 157 /* for DMA operations */ 158 bool direct_dma_map_ok; 159 160 struct scatterlist cmd_sgl; 161 char *cmd_buffer; 162 163 struct scatterlist data_sgl; 164 char *data_buffer_dma; 165 166 void *page_buffer_virt; 167 dma_addr_t page_buffer_phys; 168 unsigned int page_buffer_size; 169 170 void *payload_virt; 171 dma_addr_t payload_phys; 172 173 void *auxiliary_virt; 174 dma_addr_t auxiliary_phys; 175 176 void *raw_buffer; 177 178 /* DMA channels */ 179 #define DMA_CHANS 8 180 struct dma_chan *dma_chans[DMA_CHANS]; 181 enum dma_ops_type last_dma_type; 182 enum dma_ops_type dma_type; 183 struct completion dma_done; 184 185 /* private */ 186 void *private; 187 }; 188 189 /* Common Services */ 190 int common_nfc_set_geometry(struct gpmi_nand_data *); 191 struct dma_chan *get_dma_chan(struct gpmi_nand_data *); 192 void prepare_data_dma(struct gpmi_nand_data *, 193 enum dma_data_direction dr); 194 int start_dma_without_bch_irq(struct gpmi_nand_data *, 195 struct dma_async_tx_descriptor *); 196 int start_dma_with_bch_irq(struct gpmi_nand_data *, 197 struct dma_async_tx_descriptor *); 198 199 /* GPMI-NAND helper function library */ 200 int gpmi_init(struct gpmi_nand_data *); 201 void gpmi_clear_bch(struct gpmi_nand_data *); 202 void gpmi_dump_info(struct gpmi_nand_data *); 203 int bch_set_geometry(struct gpmi_nand_data *); 204 int gpmi_is_ready(struct gpmi_nand_data *, unsigned chip); 205 int gpmi_send_command(struct gpmi_nand_data *); 206 int gpmi_enable_clk(struct gpmi_nand_data *this); 207 int gpmi_disable_clk(struct gpmi_nand_data *this); 208 int gpmi_setup_data_interface(struct mtd_info *mtd, int chipnr, 209 const struct nand_data_interface *conf); 210 void gpmi_nfc_apply_timings(struct gpmi_nand_data *this); 211 int gpmi_read_data(struct gpmi_nand_data *); 212 int gpmi_send_data(struct gpmi_nand_data *); 213 int gpmi_send_page(struct gpmi_nand_data *, 214 dma_addr_t payload, dma_addr_t auxiliary); 215 int gpmi_read_page(struct gpmi_nand_data *, 216 dma_addr_t payload, dma_addr_t auxiliary); 217 218 void gpmi_copy_bits(u8 *dst, size_t dst_bit_off, 219 const u8 *src, size_t src_bit_off, 220 size_t nbits); 221 222 /* BCH : Status Block Completion Codes */ 223 #define STATUS_GOOD 0x00 224 #define STATUS_ERASED 0xff 225 #define STATUS_UNCORRECTABLE 0xfe 226 227 /* Use the devdata to distinguish different Archs. */ 228 #define GPMI_IS_MX23(x) ((x)->devdata->type == IS_MX23) 229 #define GPMI_IS_MX28(x) ((x)->devdata->type == IS_MX28) 230 #define GPMI_IS_MX6Q(x) ((x)->devdata->type == IS_MX6Q) 231 #define GPMI_IS_MX6SX(x) ((x)->devdata->type == IS_MX6SX) 232 #define GPMI_IS_MX7D(x) ((x)->devdata->type == IS_MX7D) 233 234 #define GPMI_IS_MX6(x) (GPMI_IS_MX6Q(x) || GPMI_IS_MX6SX(x) || \ 235 GPMI_IS_MX7D(x)) 236 #endif 237