1# SPDX-License-Identifier: GPL-2.0-only 2config MTD_NAND_ECC_SW_HAMMING 3 tristate 4 5config MTD_NAND_ECC_SW_HAMMING_SMC 6 bool "NAND ECC Smart Media byte order" 7 depends on MTD_NAND_ECC_SW_HAMMING 8 default n 9 help 10 Software ECC according to the Smart Media Specification. 11 The original Linux implementation had byte 0 and 1 swapped. 12 13menuconfig MTD_RAW_NAND 14 tristate "Raw/Parallel NAND Device Support" 15 depends on MTD 16 select MTD_NAND_CORE 17 select MTD_NAND_ECC_SW_HAMMING 18 help 19 This enables support for accessing all type of raw/parallel 20 NAND flash devices. For further information see 21 <http://www.linux-mtd.infradead.org/doc/nand.html>. 22 23if MTD_RAW_NAND 24 25config MTD_NAND_ECC_SW_BCH 26 bool "Support software BCH ECC" 27 select BCH 28 default n 29 help 30 This enables support for software BCH error correction. Binary BCH 31 codes are more powerful and cpu intensive than traditional Hamming 32 ECC codes. They are used with NAND devices requiring more than 1 bit 33 of error correction. 34 35comment "Raw/parallel NAND flash controllers" 36 37config MTD_NAND_DENALI 38 tristate 39 40config MTD_NAND_DENALI_PCI 41 tristate "Denali NAND controller on Intel Moorestown" 42 select MTD_NAND_DENALI 43 depends on PCI 44 help 45 Enable the driver for NAND flash on Intel Moorestown, using the 46 Denali NAND controller core. 47 48config MTD_NAND_DENALI_DT 49 tristate "Denali NAND controller as a DT device" 50 select MTD_NAND_DENALI 51 depends on HAS_DMA && HAVE_CLK && OF 52 help 53 Enable the driver for NAND flash on platforms using a Denali NAND 54 controller as a DT device. 55 56config MTD_NAND_AMS_DELTA 57 tristate "Amstrad E3 NAND controller" 58 depends on MACH_AMS_DELTA || COMPILE_TEST 59 default y 60 help 61 Support for NAND flash on Amstrad E3 (Delta). 62 63config MTD_NAND_OMAP2 64 tristate "OMAP2, OMAP3, OMAP4 and Keystone NAND controller" 65 depends on ARCH_OMAP2PLUS || ARCH_KEYSTONE || COMPILE_TEST 66 depends on HAS_IOMEM 67 help 68 Support for NAND flash on Texas Instruments OMAP2, OMAP3, OMAP4 69 and Keystone platforms. 70 71config MTD_NAND_OMAP_BCH 72 depends on MTD_NAND_OMAP2 73 bool "Support hardware based BCH error correction" 74 default n 75 select BCH 76 help 77 This config enables the ELM hardware engine, which can be used to 78 locate and correct errors when using BCH ECC scheme. This offloads 79 the cpu from doing ECC error searching and correction. However some 80 legacy OMAP families like OMAP2xxx, OMAP3xxx do not have ELM engine 81 so this is optional for them. 82 83config MTD_NAND_OMAP_BCH_BUILD 84 def_tristate MTD_NAND_OMAP2 && MTD_NAND_OMAP_BCH 85 86config MTD_NAND_AU1550 87 tristate "Au1550/1200 NAND support" 88 depends on MIPS_ALCHEMY 89 help 90 This enables the driver for the NAND flash controller on the 91 AMD/Alchemy 1550 SOC. 92 93config MTD_NAND_NDFC 94 tristate "IBM/MCC 4xx NAND controller" 95 depends on 4xx 96 select MTD_NAND_ECC_SW_HAMMING_SMC 97 help 98 NDFC Nand Flash Controllers are integrated in IBM/AMCC's 4xx SoCs 99 100config MTD_NAND_S3C2410 101 tristate "Samsung S3C NAND controller" 102 depends on ARCH_S3C24XX || ARCH_S3C64XX 103 help 104 This enables the NAND flash controller on the S3C24xx and S3C64xx 105 SoCs 106 107 No board specific support is done by this driver, each board 108 must advertise a platform_device for the driver to attach. 109 110config MTD_NAND_S3C2410_DEBUG 111 bool "Samsung S3C NAND controller debug" 112 depends on MTD_NAND_S3C2410 113 help 114 Enable debugging of the S3C NAND driver 115 116config MTD_NAND_S3C2410_CLKSTOP 117 bool "Samsung S3C NAND IDLE clock stop" 118 depends on MTD_NAND_S3C2410 119 default n 120 help 121 Stop the clock to the NAND controller when there is no chip 122 selected to save power. This will mean there is a small delay 123 when the is NAND chip selected or released, but will save 124 approximately 5mA of power when there is nothing happening. 125 126config MTD_NAND_TANGO 127 tristate "Tango NAND controller" 128 depends on ARCH_TANGO || COMPILE_TEST 129 depends on HAS_IOMEM 130 help 131 Enables the NAND Flash controller on Tango chips. 132 133config MTD_NAND_SHARPSL 134 tristate "Sharp SL Series (C7xx + others) NAND controller" 135 depends on ARCH_PXA || COMPILE_TEST 136 depends on HAS_IOMEM 137 138config MTD_NAND_CAFE 139 tristate "OLPC CAFÉ NAND controller" 140 depends on PCI 141 select REED_SOLOMON 142 select REED_SOLOMON_DEC16 143 help 144 Use NAND flash attached to the CAFÉ chip designed for the OLPC 145 laptop. 146 147config MTD_NAND_CS553X 148 tristate "CS5535/CS5536 (AMD Geode companion) NAND controller" 149 depends on X86_32 150 depends on !UML && HAS_IOMEM 151 help 152 The CS553x companion chips for the AMD Geode processor 153 include NAND flash controllers with built-in hardware ECC 154 capabilities; enabling this option will allow you to use 155 these. The driver will check the MSRs to verify that the 156 controller is enabled for NAND, and currently requires that 157 the controller be in MMIO mode. 158 159 If you say "m", the module will be called cs553x_nand. 160 161config MTD_NAND_ATMEL 162 tristate "Atmel AT91 NAND Flash/SmartMedia NAND controller" 163 depends on ARCH_AT91 || COMPILE_TEST 164 depends on HAS_IOMEM 165 select GENERIC_ALLOCATOR 166 select MFD_ATMEL_SMC 167 help 168 Enables support for NAND Flash / Smart Media Card interface 169 on Atmel AT91 processors. 170 171config MTD_NAND_ORION 172 tristate "Marvell Orion NAND controller" 173 depends on PLAT_ORION 174 help 175 This enables the NAND flash controller on Orion machines. 176 177 No board specific support is done by this driver, each board 178 must advertise a platform_device for the driver to attach. 179 180config MTD_NAND_MARVELL 181 tristate "Marvell EBU NAND controller" 182 depends on PXA3xx || ARCH_MMP || PLAT_ORION || ARCH_MVEBU || \ 183 COMPILE_TEST 184 depends on HAS_IOMEM 185 help 186 This enables the NAND flash controller driver for Marvell boards, 187 including: 188 - PXA3xx processors (NFCv1) 189 - 32-bit Armada platforms (XP, 37x, 38x, 39x) (NFCv2) 190 - 64-bit Aramda platforms (7k, 8k) (NFCv2) 191 192config MTD_NAND_SLC_LPC32XX 193 tristate "NXP LPC32xx SLC NAND controller" 194 depends on ARCH_LPC32XX || COMPILE_TEST 195 depends on HAS_IOMEM 196 help 197 Enables support for NXP's LPC32XX SLC (i.e. for Single Level Cell 198 chips) NAND controller. This is the default for the PHYTEC 3250 199 reference board which contains a NAND256R3A2CZA6 chip. 200 201 Please check the actual NAND chip connected and its support 202 by the SLC NAND controller. 203 204config MTD_NAND_MLC_LPC32XX 205 tristate "NXP LPC32xx MLC NAND controller" 206 depends on ARCH_LPC32XX || COMPILE_TEST 207 depends on HAS_IOMEM 208 help 209 Uses the LPC32XX MLC (i.e. for Multi Level Cell chips) NAND 210 controller. This is the default for the WORK92105 controller 211 board. 212 213 Please check the actual NAND chip connected and its support 214 by the MLC NAND controller. 215 216config MTD_NAND_CM_X270 217 tristate "CM-X270 modules NAND controller" 218 depends on MACH_ARMCORE 219 220config MTD_NAND_PASEMI 221 tristate "PA Semi PWRficient NAND controller" 222 depends on PPC_PASEMI 223 help 224 Enables support for NAND Flash interface on PA Semi PWRficient 225 based boards 226 227config MTD_NAND_TMIO 228 tristate "Toshiba Mobile IO NAND controller" 229 depends on MFD_TMIO 230 help 231 Support for NAND flash connected to a Toshiba Mobile IO 232 Controller in some PDAs, including the Sharp SL6000x. 233 234config MTD_NAND_BRCMNAND 235 tristate "Broadcom STB NAND controller" 236 depends on ARM || ARM64 || MIPS || COMPILE_TEST 237 depends on HAS_IOMEM 238 help 239 Enables the Broadcom NAND controller driver. The controller was 240 originally designed for Set-Top Box but is used on various BCM7xxx, 241 BCM3xxx, BCM63xxx, iProc/Cygnus and more. 242 243config MTD_NAND_BCM47XXNFLASH 244 tristate "BCM4706 BCMA NAND controller" 245 depends on BCMA_NFLASH 246 depends on BCMA 247 help 248 BCMA bus can have various flash memories attached, they are 249 registered by bcma as platform devices. This enables driver for 250 NAND flash memories. For now only BCM4706 is supported. 251 252config MTD_NAND_OXNAS 253 tristate "Oxford Semiconductor NAND controller" 254 depends on ARCH_OXNAS || COMPILE_TEST 255 depends on HAS_IOMEM 256 help 257 This enables the NAND flash controller on Oxford Semiconductor SoCs. 258 259config MTD_NAND_MPC5121_NFC 260 tristate "MPC5121 NAND controller" 261 depends on PPC_MPC512x 262 help 263 This enables the driver for the NAND flash controller on the 264 MPC5121 SoC. 265 266config MTD_NAND_GPMI_NAND 267 tristate "Freescale GPMI NAND controller" 268 depends on MXS_DMA 269 help 270 Enables NAND Flash support for IMX23, IMX28 or IMX6. 271 The GPMI controller is very powerful, with the help of BCH 272 module, it can do the hardware ECC. The GPMI supports several 273 NAND flashs at the same time. 274 275config MTD_NAND_FSL_ELBC 276 tristate "Freescale eLBC NAND controller" 277 depends on FSL_SOC 278 select FSL_LBC 279 help 280 Various Freescale chips, including the 8313, include a NAND Flash 281 Controller Module with built-in hardware ECC capabilities. 282 Enabling this option will enable you to use this to control 283 external NAND devices. 284 285config MTD_NAND_FSL_IFC 286 tristate "Freescale IFC NAND controller" 287 depends on FSL_SOC || ARCH_LAYERSCAPE || SOC_LS1021A || COMPILE_TEST 288 depends on HAS_IOMEM 289 select FSL_IFC 290 select MEMORY 291 help 292 Various Freescale chips e.g P1010, include a NAND Flash machine 293 with built-in hardware ECC capabilities. 294 Enabling this option will enable you to use this to control 295 external NAND devices. 296 297config MTD_NAND_FSL_UPM 298 tristate "Freescale UPM NAND controller" 299 depends on PPC_83xx || PPC_85xx 300 select FSL_LBC 301 help 302 Enables support for NAND Flash chips wired onto Freescale PowerPC 303 processor localbus with User-Programmable Machine support. 304 305config MTD_NAND_VF610_NFC 306 tristate "Freescale VF610/MPC5125 NAND controller" 307 depends on (SOC_VF610 || COMPILE_TEST) 308 depends on HAS_IOMEM 309 help 310 Enables support for NAND Flash Controller on some Freescale 311 processors like the VF610, MPC5125, MCF54418 or Kinetis K70. 312 The driver supports a maximum 2k page size. With 2k pages and 313 64 bytes or more of OOB, hardware ECC with up to 32-bit error 314 correction is supported. Hardware ECC is only enabled through 315 device tree. 316 317config MTD_NAND_MXC 318 tristate "Freescale MXC NAND controller" 319 depends on ARCH_MXC || COMPILE_TEST 320 depends on HAS_IOMEM 321 help 322 This enables the driver for the NAND flash controller on the 323 MXC processors. 324 325config MTD_NAND_SH_FLCTL 326 tristate "Renesas SuperH FLCTL NAND controller" 327 depends on SUPERH || COMPILE_TEST 328 depends on HAS_IOMEM 329 help 330 Several Renesas SuperH CPU has FLCTL. This option enables support 331 for NAND Flash using FLCTL. 332 333config MTD_NAND_DAVINCI 334 tristate "DaVinci/Keystone NAND controller" 335 depends on ARCH_DAVINCI || (ARCH_KEYSTONE && TI_AEMIF) || COMPILE_TEST 336 depends on HAS_IOMEM 337 help 338 Enable the driver for NAND flash chips on Texas Instruments 339 DaVinci/Keystone processors. 340 341config MTD_NAND_TXX9NDFMC 342 tristate "TXx9 NAND controller" 343 depends on SOC_TX4938 || SOC_TX4939 || COMPILE_TEST 344 depends on HAS_IOMEM 345 help 346 This enables the NAND flash controller on the TXx9 SoCs. 347 348config MTD_NAND_SOCRATES 349 tristate "Socrates NAND controller" 350 depends on SOCRATES 351 help 352 Enables support for NAND Flash chips wired onto Socrates board. 353 354source "drivers/mtd/nand/raw/ingenic/Kconfig" 355 356config MTD_NAND_FSMC 357 tristate "ST Micros FSMC NAND controller" 358 depends on OF && HAS_IOMEM 359 depends on PLAT_SPEAR || ARCH_NOMADIK || ARCH_U8500 || MACH_U300 || \ 360 COMPILE_TEST 361 help 362 Enables support for NAND Flash chips on the ST Microelectronics 363 Flexible Static Memory Controller (FSMC) 364 365config MTD_NAND_XWAY 366 bool "Lantiq XWAY NAND controller" 367 depends on LANTIQ && SOC_TYPE_XWAY 368 help 369 Enables support for NAND Flash chips on Lantiq XWAY SoCs. NAND is attached 370 to the External Bus Unit (EBU). 371 372config MTD_NAND_SUNXI 373 tristate "Allwinner NAND controller" 374 depends on ARCH_SUNXI || COMPILE_TEST 375 depends on HAS_IOMEM 376 help 377 Enables support for NAND Flash chips on Allwinner SoCs. 378 379config MTD_NAND_HISI504 380 tristate "Hisilicon Hip04 NAND controller" 381 depends on ARCH_HISI || COMPILE_TEST 382 depends on HAS_IOMEM 383 help 384 Enables support for NAND controller on Hisilicon SoC Hip04. 385 386config MTD_NAND_QCOM 387 tristate "QCOM NAND controller" 388 depends on ARCH_QCOM || COMPILE_TEST 389 depends on HAS_IOMEM 390 help 391 Enables support for NAND flash chips on SoCs containing the EBI2 NAND 392 controller. This controller is found on IPQ806x SoC. 393 394config MTD_NAND_MTK 395 tristate "MTK NAND controller" 396 depends on ARCH_MEDIATEK || COMPILE_TEST 397 depends on HAS_IOMEM 398 help 399 Enables support for NAND controller on MTK SoCs. 400 This controller is found on mt27xx, mt81xx, mt65xx SoCs. 401 402config MTD_NAND_MXIC 403 tristate "Macronix raw NAND controller" 404 depends on HAS_IOMEM || COMPILE_TEST 405 help 406 This selects the Macronix raw NAND controller driver. 407 408config MTD_NAND_TEGRA 409 tristate "NVIDIA Tegra NAND controller" 410 depends on ARCH_TEGRA || COMPILE_TEST 411 depends on HAS_IOMEM 412 help 413 Enables support for NAND flash controller on NVIDIA Tegra SoC. 414 The driver has been developed and tested on a Tegra 2 SoC. DMA 415 support, raw read/write page as well as HW ECC read/write page 416 is supported. Extra OOB bytes when using HW ECC are currently 417 not supported. 418 419config MTD_NAND_STM32_FMC2 420 tristate "Support for NAND controller on STM32MP SoCs" 421 depends on MACH_STM32MP157 || COMPILE_TEST 422 help 423 Enables support for NAND Flash chips on SoCs containing the FMC2 424 NAND controller. This controller is found on STM32MP SoCs. 425 The controller supports a maximum 8k page size and supports 426 a maximum 8-bit correction error per sector of 512 bytes. 427 428config MTD_NAND_MESON 429 tristate "Support for NAND controller on Amlogic's Meson SoCs" 430 depends on ARCH_MESON || COMPILE_TEST 431 select MFD_SYSCON 432 help 433 Enables support for NAND controller on Amlogic's Meson SoCs. 434 This controller is found on Meson SoCs. 435 436config MTD_NAND_GPIO 437 tristate "GPIO assisted NAND controller" 438 depends on GPIOLIB || COMPILE_TEST 439 depends on HAS_IOMEM 440 help 441 This enables a NAND flash driver where control signals are 442 connected to GPIO pins, and commands and data are communicated 443 via a memory mapped interface. 444 445config MTD_NAND_PLATFORM 446 tristate "Generic NAND controller" 447 depends on HAS_IOMEM 448 help 449 This implements a generic NAND driver for on-SOC platform 450 devices. You will need to provide platform-specific functions 451 via platform_data. 452 453comment "Misc" 454 455config MTD_SM_COMMON 456 tristate 457 default n 458 459config MTD_NAND_NANDSIM 460 tristate "Support for NAND Flash Simulator" 461 help 462 The simulator may simulate various NAND flash chips for the 463 MTD nand layer. 464 465config MTD_NAND_RICOH 466 tristate "Ricoh xD card reader" 467 default n 468 depends on PCI 469 select MTD_SM_COMMON 470 help 471 Enable support for Ricoh R5C852 xD card reader 472 You also need to enable ether 473 NAND SSFDC (SmartMedia) read only translation layer' or new 474 expermental, readwrite 475 'SmartMedia/xD new translation layer' 476 477config MTD_NAND_DISKONCHIP 478 tristate "DiskOnChip 2000, Millennium and Millennium Plus (NAND reimplementation)" 479 depends on HAS_IOMEM 480 select REED_SOLOMON 481 select REED_SOLOMON_DEC16 482 help 483 This is a reimplementation of M-Systems DiskOnChip 2000, 484 Millennium and Millennium Plus as a standard NAND device driver, 485 as opposed to the earlier self-contained MTD device drivers. 486 This should enable, among other things, proper JFFS2 operation on 487 these devices. 488 489config MTD_NAND_DISKONCHIP_PROBE_ADVANCED 490 bool "Advanced detection options for DiskOnChip" 491 depends on MTD_NAND_DISKONCHIP 492 help 493 This option allows you to specify nonstandard address at which to 494 probe for a DiskOnChip, or to change the detection options. You 495 are unlikely to need any of this unless you are using LinuxBIOS. 496 Say 'N'. 497 498config MTD_NAND_DISKONCHIP_PROBE_ADDRESS 499 hex "Physical address of DiskOnChip" if MTD_NAND_DISKONCHIP_PROBE_ADVANCED 500 depends on MTD_NAND_DISKONCHIP 501 default "0" 502 help 503 By default, the probe for DiskOnChip devices will look for a 504 DiskOnChip at every multiple of 0x2000 between 0xC8000 and 0xEE000. 505 This option allows you to specify a single address at which to probe 506 for the device, which is useful if you have other devices in that 507 range which get upset when they are probed. 508 509 (Note that on PowerPC, the normal probe will only check at 510 0xE4000000.) 511 512 Normally, you should leave this set to zero, to allow the probe at 513 the normal addresses. 514 515config MTD_NAND_DISKONCHIP_PROBE_HIGH 516 bool "Probe high addresses" 517 depends on MTD_NAND_DISKONCHIP_PROBE_ADVANCED 518 help 519 By default, the probe for DiskOnChip devices will look for a 520 DiskOnChip at every multiple of 0x2000 between 0xC8000 and 0xEE000. 521 This option changes to make it probe between 0xFFFC8000 and 522 0xFFFEE000. Unless you are using LinuxBIOS, this is unlikely to be 523 useful to you. Say 'N'. 524 525config MTD_NAND_DISKONCHIP_BBTWRITE 526 bool "Allow BBT writes on DiskOnChip Millennium and 2000TSOP" 527 depends on MTD_NAND_DISKONCHIP 528 help 529 On DiskOnChip devices shipped with the INFTL filesystem (Millennium 530 and 2000 TSOP/Alon), Linux reserves some space at the end of the 531 device for the Bad Block Table (BBT). If you have existing INFTL 532 data on your device (created by non-Linux tools such as M-Systems' 533 DOS drivers), your data might overlap the area Linux wants to use for 534 the BBT. If this is a concern for you, leave this option disabled and 535 Linux will not write BBT data into this area. 536 The downside of leaving this option disabled is that if bad blocks 537 are detected by Linux, they will not be recorded in the BBT, which 538 could cause future problems. 539 Once you enable this option, new filesystems (INFTL or others, created 540 in Linux or other operating systems) will not use the reserved area. 541 The only reason not to enable this option is to prevent damage to 542 preexisting filesystems. 543 Even if you leave this disabled, you can enable BBT writes at module 544 load time (assuming you build diskonchip as a module) with the module 545 parameter "inftl_bbt_write=1". 546 547endif # MTD_RAW_NAND 548