1# SPDX-License-Identifier: GPL-2.0-only 2config MTD_NAND_ECC_SW_HAMMING 3 tristate 4 5config MTD_NAND_ECC_SW_HAMMING_SMC 6 bool "NAND ECC Smart Media byte order" 7 depends on MTD_NAND_ECC_SW_HAMMING 8 default n 9 help 10 Software ECC according to the Smart Media Specification. 11 The original Linux implementation had byte 0 and 1 swapped. 12 13menuconfig MTD_RAW_NAND 14 tristate "Raw/Parallel NAND Device Support" 15 select MTD_NAND_CORE 16 select MTD_NAND_ECC_SW_HAMMING 17 help 18 This enables support for accessing all type of raw/parallel 19 NAND flash devices. For further information see 20 <http://www.linux-mtd.infradead.org/doc/nand.html>. 21 22if MTD_RAW_NAND 23 24config MTD_NAND_ECC_SW_BCH 25 bool "Support software BCH ECC" 26 select BCH 27 default n 28 help 29 This enables support for software BCH error correction. Binary BCH 30 codes are more powerful and cpu intensive than traditional Hamming 31 ECC codes. They are used with NAND devices requiring more than 1 bit 32 of error correction. 33 34comment "Raw/parallel NAND flash controllers" 35 36config MTD_NAND_DENALI 37 tristate 38 39config MTD_NAND_DENALI_PCI 40 tristate "Denali NAND controller on Intel Moorestown" 41 select MTD_NAND_DENALI 42 depends on PCI 43 help 44 Enable the driver for NAND flash on Intel Moorestown, using the 45 Denali NAND controller core. 46 47config MTD_NAND_DENALI_DT 48 tristate "Denali NAND controller as a DT device" 49 select MTD_NAND_DENALI 50 depends on HAS_DMA && HAVE_CLK && OF 51 help 52 Enable the driver for NAND flash on platforms using a Denali NAND 53 controller as a DT device. 54 55config MTD_NAND_AMS_DELTA 56 tristate "Amstrad E3 NAND controller" 57 depends on MACH_AMS_DELTA || COMPILE_TEST 58 default y 59 help 60 Support for NAND flash on Amstrad E3 (Delta). 61 62config MTD_NAND_OMAP2 63 tristate "OMAP2, OMAP3, OMAP4 and Keystone NAND controller" 64 depends on ARCH_OMAP2PLUS || ARCH_KEYSTONE || COMPILE_TEST 65 depends on HAS_IOMEM 66 help 67 Support for NAND flash on Texas Instruments OMAP2, OMAP3, OMAP4 68 and Keystone platforms. 69 70config MTD_NAND_OMAP_BCH 71 depends on MTD_NAND_OMAP2 72 bool "Support hardware based BCH error correction" 73 default n 74 select BCH 75 help 76 This config enables the ELM hardware engine, which can be used to 77 locate and correct errors when using BCH ECC scheme. This offloads 78 the cpu from doing ECC error searching and correction. However some 79 legacy OMAP families like OMAP2xxx, OMAP3xxx do not have ELM engine 80 so this is optional for them. 81 82config MTD_NAND_OMAP_BCH_BUILD 83 def_tristate MTD_NAND_OMAP2 && MTD_NAND_OMAP_BCH 84 85config MTD_NAND_AU1550 86 tristate "Au1550/1200 NAND support" 87 depends on MIPS_ALCHEMY 88 help 89 This enables the driver for the NAND flash controller on the 90 AMD/Alchemy 1550 SOC. 91 92config MTD_NAND_NDFC 93 tristate "IBM/MCC 4xx NAND controller" 94 depends on 4xx 95 select MTD_NAND_ECC_SW_HAMMING_SMC 96 help 97 NDFC Nand Flash Controllers are integrated in IBM/AMCC's 4xx SoCs 98 99config MTD_NAND_S3C2410 100 tristate "Samsung S3C NAND controller" 101 depends on ARCH_S3C24XX || ARCH_S3C64XX 102 help 103 This enables the NAND flash controller on the S3C24xx and S3C64xx 104 SoCs 105 106 No board specific support is done by this driver, each board 107 must advertise a platform_device for the driver to attach. 108 109config MTD_NAND_S3C2410_DEBUG 110 bool "Samsung S3C NAND controller debug" 111 depends on MTD_NAND_S3C2410 112 help 113 Enable debugging of the S3C NAND driver 114 115config MTD_NAND_S3C2410_CLKSTOP 116 bool "Samsung S3C NAND IDLE clock stop" 117 depends on MTD_NAND_S3C2410 118 default n 119 help 120 Stop the clock to the NAND controller when there is no chip 121 selected to save power. This will mean there is a small delay 122 when the is NAND chip selected or released, but will save 123 approximately 5mA of power when there is nothing happening. 124 125config MTD_NAND_TANGO 126 tristate "Tango NAND controller" 127 depends on ARCH_TANGO || COMPILE_TEST 128 depends on HAS_IOMEM 129 help 130 Enables the NAND Flash controller on Tango chips. 131 132config MTD_NAND_SHARPSL 133 tristate "Sharp SL Series (C7xx + others) NAND controller" 134 depends on ARCH_PXA || COMPILE_TEST 135 depends on HAS_IOMEM 136 137config MTD_NAND_CAFE 138 tristate "OLPC CAFÉ NAND controller" 139 depends on PCI 140 select REED_SOLOMON 141 select REED_SOLOMON_DEC16 142 help 143 Use NAND flash attached to the CAFÉ chip designed for the OLPC 144 laptop. 145 146config MTD_NAND_CS553X 147 tristate "CS5535/CS5536 (AMD Geode companion) NAND controller" 148 depends on X86_32 149 depends on !UML && HAS_IOMEM 150 help 151 The CS553x companion chips for the AMD Geode processor 152 include NAND flash controllers with built-in hardware ECC 153 capabilities; enabling this option will allow you to use 154 these. The driver will check the MSRs to verify that the 155 controller is enabled for NAND, and currently requires that 156 the controller be in MMIO mode. 157 158 If you say "m", the module will be called cs553x_nand. 159 160config MTD_NAND_ATMEL 161 tristate "Atmel AT91 NAND Flash/SmartMedia NAND controller" 162 depends on ARCH_AT91 || COMPILE_TEST 163 depends on HAS_IOMEM 164 select GENERIC_ALLOCATOR 165 select MFD_ATMEL_SMC 166 help 167 Enables support for NAND Flash / Smart Media Card interface 168 on Atmel AT91 processors. 169 170config MTD_NAND_ORION 171 tristate "Marvell Orion NAND controller" 172 depends on PLAT_ORION 173 help 174 This enables the NAND flash controller on Orion machines. 175 176 No board specific support is done by this driver, each board 177 must advertise a platform_device for the driver to attach. 178 179config MTD_NAND_MARVELL 180 tristate "Marvell EBU NAND controller" 181 depends on PXA3xx || ARCH_MMP || PLAT_ORION || ARCH_MVEBU || \ 182 COMPILE_TEST 183 depends on HAS_IOMEM 184 help 185 This enables the NAND flash controller driver for Marvell boards, 186 including: 187 - PXA3xx processors (NFCv1) 188 - 32-bit Armada platforms (XP, 37x, 38x, 39x) (NFCv2) 189 - 64-bit Aramda platforms (7k, 8k) (NFCv2) 190 191config MTD_NAND_SLC_LPC32XX 192 tristate "NXP LPC32xx SLC NAND controller" 193 depends on ARCH_LPC32XX || COMPILE_TEST 194 depends on HAS_IOMEM 195 help 196 Enables support for NXP's LPC32XX SLC (i.e. for Single Level Cell 197 chips) NAND controller. This is the default for the PHYTEC 3250 198 reference board which contains a NAND256R3A2CZA6 chip. 199 200 Please check the actual NAND chip connected and its support 201 by the SLC NAND controller. 202 203config MTD_NAND_MLC_LPC32XX 204 tristate "NXP LPC32xx MLC NAND controller" 205 depends on ARCH_LPC32XX || COMPILE_TEST 206 depends on HAS_IOMEM 207 help 208 Uses the LPC32XX MLC (i.e. for Multi Level Cell chips) NAND 209 controller. This is the default for the WORK92105 controller 210 board. 211 212 Please check the actual NAND chip connected and its support 213 by the MLC NAND controller. 214 215config MTD_NAND_PASEMI 216 tristate "PA Semi PWRficient NAND controller" 217 depends on PPC_PASEMI 218 help 219 Enables support for NAND Flash interface on PA Semi PWRficient 220 based boards 221 222config MTD_NAND_TMIO 223 tristate "Toshiba Mobile IO NAND controller" 224 depends on MFD_TMIO 225 help 226 Support for NAND flash connected to a Toshiba Mobile IO 227 Controller in some PDAs, including the Sharp SL6000x. 228 229config MTD_NAND_BRCMNAND 230 tristate "Broadcom STB NAND controller" 231 depends on ARM || ARM64 || MIPS || COMPILE_TEST 232 depends on HAS_IOMEM 233 help 234 Enables the Broadcom NAND controller driver. The controller was 235 originally designed for Set-Top Box but is used on various BCM7xxx, 236 BCM3xxx, BCM63xxx, iProc/Cygnus and more. 237 238config MTD_NAND_BCM47XXNFLASH 239 tristate "BCM4706 BCMA NAND controller" 240 depends on BCMA_NFLASH 241 depends on BCMA 242 help 243 BCMA bus can have various flash memories attached, they are 244 registered by bcma as platform devices. This enables driver for 245 NAND flash memories. For now only BCM4706 is supported. 246 247config MTD_NAND_OXNAS 248 tristate "Oxford Semiconductor NAND controller" 249 depends on ARCH_OXNAS || COMPILE_TEST 250 depends on HAS_IOMEM 251 help 252 This enables the NAND flash controller on Oxford Semiconductor SoCs. 253 254config MTD_NAND_MPC5121_NFC 255 tristate "MPC5121 NAND controller" 256 depends on PPC_MPC512x 257 help 258 This enables the driver for the NAND flash controller on the 259 MPC5121 SoC. 260 261config MTD_NAND_GPMI_NAND 262 tristate "Freescale GPMI NAND controller" 263 depends on MXS_DMA 264 help 265 Enables NAND Flash support for IMX23, IMX28 or IMX6. 266 The GPMI controller is very powerful, with the help of BCH 267 module, it can do the hardware ECC. The GPMI supports several 268 NAND flashs at the same time. 269 270config MTD_NAND_FSL_ELBC 271 tristate "Freescale eLBC NAND controller" 272 depends on FSL_SOC 273 select FSL_LBC 274 help 275 Various Freescale chips, including the 8313, include a NAND Flash 276 Controller Module with built-in hardware ECC capabilities. 277 Enabling this option will enable you to use this to control 278 external NAND devices. 279 280config MTD_NAND_FSL_IFC 281 tristate "Freescale IFC NAND controller" 282 depends on FSL_SOC || ARCH_LAYERSCAPE || SOC_LS1021A || COMPILE_TEST 283 depends on HAS_IOMEM 284 select FSL_IFC 285 select MEMORY 286 help 287 Various Freescale chips e.g P1010, include a NAND Flash machine 288 with built-in hardware ECC capabilities. 289 Enabling this option will enable you to use this to control 290 external NAND devices. 291 292config MTD_NAND_FSL_UPM 293 tristate "Freescale UPM NAND controller" 294 depends on PPC_83xx || PPC_85xx 295 select FSL_LBC 296 help 297 Enables support for NAND Flash chips wired onto Freescale PowerPC 298 processor localbus with User-Programmable Machine support. 299 300config MTD_NAND_VF610_NFC 301 tristate "Freescale VF610/MPC5125 NAND controller" 302 depends on (SOC_VF610 || COMPILE_TEST) 303 depends on HAS_IOMEM 304 help 305 Enables support for NAND Flash Controller on some Freescale 306 processors like the VF610, MPC5125, MCF54418 or Kinetis K70. 307 The driver supports a maximum 2k page size. With 2k pages and 308 64 bytes or more of OOB, hardware ECC with up to 32-bit error 309 correction is supported. Hardware ECC is only enabled through 310 device tree. 311 312config MTD_NAND_MXC 313 tristate "Freescale MXC NAND controller" 314 depends on ARCH_MXC || COMPILE_TEST 315 depends on HAS_IOMEM 316 help 317 This enables the driver for the NAND flash controller on the 318 MXC processors. 319 320config MTD_NAND_SH_FLCTL 321 tristate "Renesas SuperH FLCTL NAND controller" 322 depends on SUPERH || COMPILE_TEST 323 depends on HAS_IOMEM 324 help 325 Several Renesas SuperH CPU has FLCTL. This option enables support 326 for NAND Flash using FLCTL. 327 328config MTD_NAND_DAVINCI 329 tristate "DaVinci/Keystone NAND controller" 330 depends on ARCH_DAVINCI || (ARCH_KEYSTONE && TI_AEMIF) || COMPILE_TEST 331 depends on HAS_IOMEM 332 help 333 Enable the driver for NAND flash chips on Texas Instruments 334 DaVinci/Keystone processors. 335 336config MTD_NAND_TXX9NDFMC 337 tristate "TXx9 NAND controller" 338 depends on SOC_TX4938 || SOC_TX4939 || COMPILE_TEST 339 depends on HAS_IOMEM 340 help 341 This enables the NAND flash controller on the TXx9 SoCs. 342 343config MTD_NAND_SOCRATES 344 tristate "Socrates NAND controller" 345 depends on SOCRATES 346 help 347 Enables support for NAND Flash chips wired onto Socrates board. 348 349source "drivers/mtd/nand/raw/ingenic/Kconfig" 350 351config MTD_NAND_FSMC 352 tristate "ST Micros FSMC NAND controller" 353 depends on OF && HAS_IOMEM 354 depends on PLAT_SPEAR || ARCH_NOMADIK || ARCH_U8500 || MACH_U300 || \ 355 COMPILE_TEST 356 help 357 Enables support for NAND Flash chips on the ST Microelectronics 358 Flexible Static Memory Controller (FSMC) 359 360config MTD_NAND_XWAY 361 bool "Lantiq XWAY NAND controller" 362 depends on LANTIQ && SOC_TYPE_XWAY 363 help 364 Enables support for NAND Flash chips on Lantiq XWAY SoCs. NAND is attached 365 to the External Bus Unit (EBU). 366 367config MTD_NAND_SUNXI 368 tristate "Allwinner NAND controller" 369 depends on ARCH_SUNXI || COMPILE_TEST 370 depends on HAS_IOMEM 371 help 372 Enables support for NAND Flash chips on Allwinner SoCs. 373 374config MTD_NAND_HISI504 375 tristate "Hisilicon Hip04 NAND controller" 376 depends on ARCH_HISI || COMPILE_TEST 377 depends on HAS_IOMEM 378 help 379 Enables support for NAND controller on Hisilicon SoC Hip04. 380 381config MTD_NAND_QCOM 382 tristate "QCOM NAND controller" 383 depends on ARCH_QCOM || COMPILE_TEST 384 depends on HAS_IOMEM 385 help 386 Enables support for NAND flash chips on SoCs containing the EBI2 NAND 387 controller. This controller is found on IPQ806x SoC. 388 389config MTD_NAND_MTK 390 tristate "MTK NAND controller" 391 depends on ARCH_MEDIATEK || COMPILE_TEST 392 depends on HAS_IOMEM 393 help 394 Enables support for NAND controller on MTK SoCs. 395 This controller is found on mt27xx, mt81xx, mt65xx SoCs. 396 397config MTD_NAND_MXIC 398 tristate "Macronix raw NAND controller" 399 depends on HAS_IOMEM || COMPILE_TEST 400 help 401 This selects the Macronix raw NAND controller driver. 402 403config MTD_NAND_TEGRA 404 tristate "NVIDIA Tegra NAND controller" 405 depends on ARCH_TEGRA || COMPILE_TEST 406 depends on HAS_IOMEM 407 help 408 Enables support for NAND flash controller on NVIDIA Tegra SoC. 409 The driver has been developed and tested on a Tegra 2 SoC. DMA 410 support, raw read/write page as well as HW ECC read/write page 411 is supported. Extra OOB bytes when using HW ECC are currently 412 not supported. 413 414config MTD_NAND_STM32_FMC2 415 tristate "Support for NAND controller on STM32MP SoCs" 416 depends on MACH_STM32MP157 || COMPILE_TEST 417 select MFD_SYSCON 418 help 419 Enables support for NAND Flash chips on SoCs containing the FMC2 420 NAND controller. This controller is found on STM32MP SoCs. 421 The controller supports a maximum 8k page size and supports 422 a maximum 8-bit correction error per sector of 512 bytes. 423 424config MTD_NAND_MESON 425 tristate "Support for NAND controller on Amlogic's Meson SoCs" 426 depends on ARCH_MESON || COMPILE_TEST 427 select MFD_SYSCON 428 help 429 Enables support for NAND controller on Amlogic's Meson SoCs. 430 This controller is found on Meson SoCs. 431 432config MTD_NAND_GPIO 433 tristate "GPIO assisted NAND controller" 434 depends on GPIOLIB || COMPILE_TEST 435 depends on HAS_IOMEM 436 help 437 This enables a NAND flash driver where control signals are 438 connected to GPIO pins, and commands and data are communicated 439 via a memory mapped interface. 440 441config MTD_NAND_PLATFORM 442 tristate "Generic NAND controller" 443 depends on HAS_IOMEM 444 help 445 This implements a generic NAND driver for on-SOC platform 446 devices. You will need to provide platform-specific functions 447 via platform_data. 448 449config MTD_NAND_CADENCE 450 tristate "Support Cadence NAND (HPNFC) controller" 451 depends on (OF || COMPILE_TEST) && HAS_IOMEM 452 help 453 Enable the driver for NAND flash on platforms using a Cadence NAND 454 controller. 455 456config MTD_NAND_ARASAN 457 tristate "Support for Arasan NAND flash controller" 458 depends on HAS_IOMEM && HAS_DMA 459 select BCH 460 help 461 Enables the driver for the Arasan NAND flash controller on 462 Zynq Ultrascale+ MPSoC. 463 464comment "Misc" 465 466config MTD_SM_COMMON 467 tristate 468 default n 469 470config MTD_NAND_NANDSIM 471 tristate "Support for NAND Flash Simulator" 472 help 473 The simulator may simulate various NAND flash chips for the 474 MTD nand layer. 475 476config MTD_NAND_RICOH 477 tristate "Ricoh xD card reader" 478 default n 479 depends on PCI 480 select MTD_SM_COMMON 481 help 482 Enable support for Ricoh R5C852 xD card reader 483 You also need to enable ether 484 NAND SSFDC (SmartMedia) read only translation layer' or new 485 expermental, readwrite 486 'SmartMedia/xD new translation layer' 487 488config MTD_NAND_DISKONCHIP 489 tristate "DiskOnChip 2000, Millennium and Millennium Plus (NAND reimplementation)" 490 depends on HAS_IOMEM 491 select REED_SOLOMON 492 select REED_SOLOMON_DEC16 493 help 494 This is a reimplementation of M-Systems DiskOnChip 2000, 495 Millennium and Millennium Plus as a standard NAND device driver, 496 as opposed to the earlier self-contained MTD device drivers. 497 This should enable, among other things, proper JFFS2 operation on 498 these devices. 499 500config MTD_NAND_DISKONCHIP_PROBE_ADVANCED 501 bool "Advanced detection options for DiskOnChip" 502 depends on MTD_NAND_DISKONCHIP 503 help 504 This option allows you to specify nonstandard address at which to 505 probe for a DiskOnChip, or to change the detection options. You 506 are unlikely to need any of this unless you are using LinuxBIOS. 507 Say 'N'. 508 509config MTD_NAND_DISKONCHIP_PROBE_ADDRESS 510 hex "Physical address of DiskOnChip" if MTD_NAND_DISKONCHIP_PROBE_ADVANCED 511 depends on MTD_NAND_DISKONCHIP 512 default "0" 513 help 514 By default, the probe for DiskOnChip devices will look for a 515 DiskOnChip at every multiple of 0x2000 between 0xC8000 and 0xEE000. 516 This option allows you to specify a single address at which to probe 517 for the device, which is useful if you have other devices in that 518 range which get upset when they are probed. 519 520 (Note that on PowerPC, the normal probe will only check at 521 0xE4000000.) 522 523 Normally, you should leave this set to zero, to allow the probe at 524 the normal addresses. 525 526config MTD_NAND_DISKONCHIP_PROBE_HIGH 527 bool "Probe high addresses" 528 depends on MTD_NAND_DISKONCHIP_PROBE_ADVANCED 529 help 530 By default, the probe for DiskOnChip devices will look for a 531 DiskOnChip at every multiple of 0x2000 between 0xC8000 and 0xEE000. 532 This option changes to make it probe between 0xFFFC8000 and 533 0xFFFEE000. Unless you are using LinuxBIOS, this is unlikely to be 534 useful to you. Say 'N'. 535 536config MTD_NAND_DISKONCHIP_BBTWRITE 537 bool "Allow BBT writes on DiskOnChip Millennium and 2000TSOP" 538 depends on MTD_NAND_DISKONCHIP 539 help 540 On DiskOnChip devices shipped with the INFTL filesystem (Millennium 541 and 2000 TSOP/Alon), Linux reserves some space at the end of the 542 device for the Bad Block Table (BBT). If you have existing INFTL 543 data on your device (created by non-Linux tools such as M-Systems' 544 DOS drivers), your data might overlap the area Linux wants to use for 545 the BBT. If this is a concern for you, leave this option disabled and 546 Linux will not write BBT data into this area. 547 The downside of leaving this option disabled is that if bad blocks 548 are detected by Linux, they will not be recorded in the BBT, which 549 could cause future problems. 550 Once you enable this option, new filesystems (INFTL or others, created 551 in Linux or other operating systems) will not use the reserved area. 552 The only reason not to enable this option is to prevent damage to 553 preexisting filesystems. 554 Even if you leave this disabled, you can enable BBT writes at module 555 load time (assuming you build diskonchip as a module) with the module 556 parameter "inftl_bbt_write=1". 557 558endif # MTD_RAW_NAND 559