1 /*
2  *  Copyright © 2005-2009 Samsung Electronics
3  *  Copyright © 2007 Nokia Corporation
4  *
5  *  Kyungmin Park <kyungmin.park@samsung.com>
6  *
7  *  Credits:
8  *	Adrian Hunter <ext-adrian.hunter@nokia.com>:
9  *	auto-placement support, read-while load support, various fixes
10  *
11  *	Vishak G <vishak.g at samsung.com>, Rohit Hagargundgi <h.rohit at samsung.com>
12  *	Flex-OneNAND support
13  *	Amul Kumar Saha <amul.saha at samsung.com>
14  *	OTP support
15  *
16  * This program is free software; you can redistribute it and/or modify
17  * it under the terms of the GNU General Public License version 2 as
18  * published by the Free Software Foundation.
19  */
20 
21 #include <linux/kernel.h>
22 #include <linux/module.h>
23 #include <linux/moduleparam.h>
24 #include <linux/slab.h>
25 #include <linux/sched.h>
26 #include <linux/delay.h>
27 #include <linux/interrupt.h>
28 #include <linux/jiffies.h>
29 #include <linux/mtd/mtd.h>
30 #include <linux/mtd/onenand.h>
31 #include <linux/mtd/partitions.h>
32 
33 #include <asm/io.h>
34 
35 /*
36  * Multiblock erase if number of blocks to erase is 2 or more.
37  * Maximum number of blocks for simultaneous erase is 64.
38  */
39 #define MB_ERASE_MIN_BLK_COUNT 2
40 #define MB_ERASE_MAX_BLK_COUNT 64
41 
42 /* Default Flex-OneNAND boundary and lock respectively */
43 static int flex_bdry[MAX_DIES * 2] = { -1, 0, -1, 0 };
44 
45 module_param_array(flex_bdry, int, NULL, 0400);
46 MODULE_PARM_DESC(flex_bdry,	"SLC Boundary information for Flex-OneNAND"
47 				"Syntax:flex_bdry=DIE_BDRY,LOCK,..."
48 				"DIE_BDRY: SLC boundary of the die"
49 				"LOCK: Locking information for SLC boundary"
50 				"    : 0->Set boundary in unlocked status"
51 				"    : 1->Set boundary in locked status");
52 
53 /* Default OneNAND/Flex-OneNAND OTP options*/
54 static int otp;
55 
56 module_param(otp, int, 0400);
57 MODULE_PARM_DESC(otp,	"Corresponding behaviour of OneNAND in OTP"
58 			"Syntax : otp=LOCK_TYPE"
59 			"LOCK_TYPE : Keys issued, for specific OTP Lock type"
60 			"	   : 0 -> Default (No Blocks Locked)"
61 			"	   : 1 -> OTP Block lock"
62 			"	   : 2 -> 1st Block lock"
63 			"	   : 3 -> BOTH OTP Block and 1st Block lock");
64 
65 /*
66  * flexonenand_oob_128 - oob info for Flex-Onenand with 4KB page
67  * For now, we expose only 64 out of 80 ecc bytes
68  */
69 static int flexonenand_ooblayout_ecc(struct mtd_info *mtd, int section,
70 				     struct mtd_oob_region *oobregion)
71 {
72 	if (section > 7)
73 		return -ERANGE;
74 
75 	oobregion->offset = (section * 16) + 6;
76 	oobregion->length = 10;
77 
78 	return 0;
79 }
80 
81 static int flexonenand_ooblayout_free(struct mtd_info *mtd, int section,
82 				      struct mtd_oob_region *oobregion)
83 {
84 	if (section > 7)
85 		return -ERANGE;
86 
87 	oobregion->offset = (section * 16) + 2;
88 	oobregion->length = 4;
89 
90 	return 0;
91 }
92 
93 static const struct mtd_ooblayout_ops flexonenand_ooblayout_ops = {
94 	.ecc = flexonenand_ooblayout_ecc,
95 	.free = flexonenand_ooblayout_free,
96 };
97 
98 /*
99  * onenand_oob_128 - oob info for OneNAND with 4KB page
100  *
101  * Based on specification:
102  * 4Gb M-die OneNAND Flash (KFM4G16Q4M, KFN8G16Q4M). Rev. 1.3, Apr. 2010
103  *
104  */
105 static int onenand_ooblayout_128_ecc(struct mtd_info *mtd, int section,
106 				     struct mtd_oob_region *oobregion)
107 {
108 	if (section > 7)
109 		return -ERANGE;
110 
111 	oobregion->offset = (section * 16) + 7;
112 	oobregion->length = 9;
113 
114 	return 0;
115 }
116 
117 static int onenand_ooblayout_128_free(struct mtd_info *mtd, int section,
118 				      struct mtd_oob_region *oobregion)
119 {
120 	if (section >= 8)
121 		return -ERANGE;
122 
123 	/*
124 	 * free bytes are using the spare area fields marked as
125 	 * "Managed by internal ECC logic for Logical Sector Number area"
126 	 */
127 	oobregion->offset = (section * 16) + 2;
128 	oobregion->length = 3;
129 
130 	return 0;
131 }
132 
133 static const struct mtd_ooblayout_ops onenand_oob_128_ooblayout_ops = {
134 	.ecc = onenand_ooblayout_128_ecc,
135 	.free = onenand_ooblayout_128_free,
136 };
137 
138 /**
139  * onenand_oob_32_64 - oob info for large (2KB) page
140  */
141 static int onenand_ooblayout_32_64_ecc(struct mtd_info *mtd, int section,
142 				       struct mtd_oob_region *oobregion)
143 {
144 	if (section > 3)
145 		return -ERANGE;
146 
147 	oobregion->offset = (section * 16) + 8;
148 	oobregion->length = 5;
149 
150 	return 0;
151 }
152 
153 static int onenand_ooblayout_32_64_free(struct mtd_info *mtd, int section,
154 					struct mtd_oob_region *oobregion)
155 {
156 	int sections = (mtd->oobsize / 32) * 2;
157 
158 	if (section >= sections)
159 		return -ERANGE;
160 
161 	if (section & 1) {
162 		oobregion->offset = ((section - 1) * 16) + 14;
163 		oobregion->length = 2;
164 	} else  {
165 		oobregion->offset = (section * 16) + 2;
166 		oobregion->length = 3;
167 	}
168 
169 	return 0;
170 }
171 
172 static const struct mtd_ooblayout_ops onenand_oob_32_64_ooblayout_ops = {
173 	.ecc = onenand_ooblayout_32_64_ecc,
174 	.free = onenand_ooblayout_32_64_free,
175 };
176 
177 static const unsigned char ffchars[] = {
178 	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
179 	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,	/* 16 */
180 	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
181 	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,	/* 32 */
182 	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
183 	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,	/* 48 */
184 	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
185 	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,	/* 64 */
186 	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
187 	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,	/* 80 */
188 	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
189 	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,	/* 96 */
190 	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
191 	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,	/* 112 */
192 	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
193 	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,	/* 128 */
194 };
195 
196 /**
197  * onenand_readw - [OneNAND Interface] Read OneNAND register
198  * @param addr		address to read
199  *
200  * Read OneNAND register
201  */
202 static unsigned short onenand_readw(void __iomem *addr)
203 {
204 	return readw(addr);
205 }
206 
207 /**
208  * onenand_writew - [OneNAND Interface] Write OneNAND register with value
209  * @param value		value to write
210  * @param addr		address to write
211  *
212  * Write OneNAND register with value
213  */
214 static void onenand_writew(unsigned short value, void __iomem *addr)
215 {
216 	writew(value, addr);
217 }
218 
219 /**
220  * onenand_block_address - [DEFAULT] Get block address
221  * @param this		onenand chip data structure
222  * @param block		the block
223  * @return		translated block address if DDP, otherwise same
224  *
225  * Setup Start Address 1 Register (F100h)
226  */
227 static int onenand_block_address(struct onenand_chip *this, int block)
228 {
229 	/* Device Flash Core select, NAND Flash Block Address */
230 	if (block & this->density_mask)
231 		return ONENAND_DDP_CHIP1 | (block ^ this->density_mask);
232 
233 	return block;
234 }
235 
236 /**
237  * onenand_bufferram_address - [DEFAULT] Get bufferram address
238  * @param this		onenand chip data structure
239  * @param block		the block
240  * @return		set DBS value if DDP, otherwise 0
241  *
242  * Setup Start Address 2 Register (F101h) for DDP
243  */
244 static int onenand_bufferram_address(struct onenand_chip *this, int block)
245 {
246 	/* Device BufferRAM Select */
247 	if (block & this->density_mask)
248 		return ONENAND_DDP_CHIP1;
249 
250 	return ONENAND_DDP_CHIP0;
251 }
252 
253 /**
254  * onenand_page_address - [DEFAULT] Get page address
255  * @param page		the page address
256  * @param sector	the sector address
257  * @return		combined page and sector address
258  *
259  * Setup Start Address 8 Register (F107h)
260  */
261 static int onenand_page_address(int page, int sector)
262 {
263 	/* Flash Page Address, Flash Sector Address */
264 	int fpa, fsa;
265 
266 	fpa = page & ONENAND_FPA_MASK;
267 	fsa = sector & ONENAND_FSA_MASK;
268 
269 	return ((fpa << ONENAND_FPA_SHIFT) | fsa);
270 }
271 
272 /**
273  * onenand_buffer_address - [DEFAULT] Get buffer address
274  * @param dataram1	DataRAM index
275  * @param sectors	the sector address
276  * @param count		the number of sectors
277  * @return		the start buffer value
278  *
279  * Setup Start Buffer Register (F200h)
280  */
281 static int onenand_buffer_address(int dataram1, int sectors, int count)
282 {
283 	int bsa, bsc;
284 
285 	/* BufferRAM Sector Address */
286 	bsa = sectors & ONENAND_BSA_MASK;
287 
288 	if (dataram1)
289 		bsa |= ONENAND_BSA_DATARAM1;	/* DataRAM1 */
290 	else
291 		bsa |= ONENAND_BSA_DATARAM0;	/* DataRAM0 */
292 
293 	/* BufferRAM Sector Count */
294 	bsc = count & ONENAND_BSC_MASK;
295 
296 	return ((bsa << ONENAND_BSA_SHIFT) | bsc);
297 }
298 
299 /**
300  * flexonenand_block- For given address return block number
301  * @param this         - OneNAND device structure
302  * @param addr		- Address for which block number is needed
303  */
304 static unsigned flexonenand_block(struct onenand_chip *this, loff_t addr)
305 {
306 	unsigned boundary, blk, die = 0;
307 
308 	if (ONENAND_IS_DDP(this) && addr >= this->diesize[0]) {
309 		die = 1;
310 		addr -= this->diesize[0];
311 	}
312 
313 	boundary = this->boundary[die];
314 
315 	blk = addr >> (this->erase_shift - 1);
316 	if (blk > boundary)
317 		blk = (blk + boundary + 1) >> 1;
318 
319 	blk += die ? this->density_mask : 0;
320 	return blk;
321 }
322 
323 inline unsigned onenand_block(struct onenand_chip *this, loff_t addr)
324 {
325 	if (!FLEXONENAND(this))
326 		return addr >> this->erase_shift;
327 	return flexonenand_block(this, addr);
328 }
329 
330 /**
331  * flexonenand_addr - Return address of the block
332  * @this:		OneNAND device structure
333  * @block:		Block number on Flex-OneNAND
334  *
335  * Return address of the block
336  */
337 static loff_t flexonenand_addr(struct onenand_chip *this, int block)
338 {
339 	loff_t ofs = 0;
340 	int die = 0, boundary;
341 
342 	if (ONENAND_IS_DDP(this) && block >= this->density_mask) {
343 		block -= this->density_mask;
344 		die = 1;
345 		ofs = this->diesize[0];
346 	}
347 
348 	boundary = this->boundary[die];
349 	ofs += (loff_t)block << (this->erase_shift - 1);
350 	if (block > (boundary + 1))
351 		ofs += (loff_t)(block - boundary - 1) << (this->erase_shift - 1);
352 	return ofs;
353 }
354 
355 loff_t onenand_addr(struct onenand_chip *this, int block)
356 {
357 	if (!FLEXONENAND(this))
358 		return (loff_t)block << this->erase_shift;
359 	return flexonenand_addr(this, block);
360 }
361 EXPORT_SYMBOL(onenand_addr);
362 
363 /**
364  * onenand_get_density - [DEFAULT] Get OneNAND density
365  * @param dev_id	OneNAND device ID
366  *
367  * Get OneNAND density from device ID
368  */
369 static inline int onenand_get_density(int dev_id)
370 {
371 	int density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT;
372 	return (density & ONENAND_DEVICE_DENSITY_MASK);
373 }
374 
375 /**
376  * flexonenand_region - [Flex-OneNAND] Return erase region of addr
377  * @param mtd		MTD device structure
378  * @param addr		address whose erase region needs to be identified
379  */
380 int flexonenand_region(struct mtd_info *mtd, loff_t addr)
381 {
382 	int i;
383 
384 	for (i = 0; i < mtd->numeraseregions; i++)
385 		if (addr < mtd->eraseregions[i].offset)
386 			break;
387 	return i - 1;
388 }
389 EXPORT_SYMBOL(flexonenand_region);
390 
391 /**
392  * onenand_command - [DEFAULT] Send command to OneNAND device
393  * @param mtd		MTD device structure
394  * @param cmd		the command to be sent
395  * @param addr		offset to read from or write to
396  * @param len		number of bytes to read or write
397  *
398  * Send command to OneNAND device. This function is used for middle/large page
399  * devices (1KB/2KB Bytes per page)
400  */
401 static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, size_t len)
402 {
403 	struct onenand_chip *this = mtd->priv;
404 	int value, block, page;
405 
406 	/* Address translation */
407 	switch (cmd) {
408 	case ONENAND_CMD_UNLOCK:
409 	case ONENAND_CMD_LOCK:
410 	case ONENAND_CMD_LOCK_TIGHT:
411 	case ONENAND_CMD_UNLOCK_ALL:
412 		block = -1;
413 		page = -1;
414 		break;
415 
416 	case FLEXONENAND_CMD_PI_ACCESS:
417 		/* addr contains die index */
418 		block = addr * this->density_mask;
419 		page = -1;
420 		break;
421 
422 	case ONENAND_CMD_ERASE:
423 	case ONENAND_CMD_MULTIBLOCK_ERASE:
424 	case ONENAND_CMD_ERASE_VERIFY:
425 	case ONENAND_CMD_BUFFERRAM:
426 	case ONENAND_CMD_OTP_ACCESS:
427 		block = onenand_block(this, addr);
428 		page = -1;
429 		break;
430 
431 	case FLEXONENAND_CMD_READ_PI:
432 		cmd = ONENAND_CMD_READ;
433 		block = addr * this->density_mask;
434 		page = 0;
435 		break;
436 
437 	default:
438 		block = onenand_block(this, addr);
439 		if (FLEXONENAND(this))
440 			page = (int) (addr - onenand_addr(this, block))>>\
441 				this->page_shift;
442 		else
443 			page = (int) (addr >> this->page_shift);
444 		if (ONENAND_IS_2PLANE(this)) {
445 			/* Make the even block number */
446 			block &= ~1;
447 			/* Is it the odd plane? */
448 			if (addr & this->writesize)
449 				block++;
450 			page >>= 1;
451 		}
452 		page &= this->page_mask;
453 		break;
454 	}
455 
456 	/* NOTE: The setting order of the registers is very important! */
457 	if (cmd == ONENAND_CMD_BUFFERRAM) {
458 		/* Select DataRAM for DDP */
459 		value = onenand_bufferram_address(this, block);
460 		this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
461 
462 		if (ONENAND_IS_2PLANE(this) || ONENAND_IS_4KB_PAGE(this))
463 			/* It is always BufferRAM0 */
464 			ONENAND_SET_BUFFERRAM0(this);
465 		else
466 			/* Switch to the next data buffer */
467 			ONENAND_SET_NEXT_BUFFERRAM(this);
468 
469 		return 0;
470 	}
471 
472 	if (block != -1) {
473 		/* Write 'DFS, FBA' of Flash */
474 		value = onenand_block_address(this, block);
475 		this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
476 
477 		/* Select DataRAM for DDP */
478 		value = onenand_bufferram_address(this, block);
479 		this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
480 	}
481 
482 	if (page != -1) {
483 		/* Now we use page size operation */
484 		int sectors = 0, count = 0;
485 		int dataram;
486 
487 		switch (cmd) {
488 		case FLEXONENAND_CMD_RECOVER_LSB:
489 		case ONENAND_CMD_READ:
490 		case ONENAND_CMD_READOOB:
491 			if (ONENAND_IS_4KB_PAGE(this))
492 				/* It is always BufferRAM0 */
493 				dataram = ONENAND_SET_BUFFERRAM0(this);
494 			else
495 				dataram = ONENAND_SET_NEXT_BUFFERRAM(this);
496 			break;
497 
498 		default:
499 			if (ONENAND_IS_2PLANE(this) && cmd == ONENAND_CMD_PROG)
500 				cmd = ONENAND_CMD_2X_PROG;
501 			dataram = ONENAND_CURRENT_BUFFERRAM(this);
502 			break;
503 		}
504 
505 		/* Write 'FPA, FSA' of Flash */
506 		value = onenand_page_address(page, sectors);
507 		this->write_word(value, this->base + ONENAND_REG_START_ADDRESS8);
508 
509 		/* Write 'BSA, BSC' of DataRAM */
510 		value = onenand_buffer_address(dataram, sectors, count);
511 		this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
512 	}
513 
514 	/* Interrupt clear */
515 	this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
516 
517 	/* Write command */
518 	this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
519 
520 	return 0;
521 }
522 
523 /**
524  * onenand_read_ecc - return ecc status
525  * @param this		onenand chip structure
526  */
527 static inline int onenand_read_ecc(struct onenand_chip *this)
528 {
529 	int ecc, i, result = 0;
530 
531 	if (!FLEXONENAND(this) && !ONENAND_IS_4KB_PAGE(this))
532 		return this->read_word(this->base + ONENAND_REG_ECC_STATUS);
533 
534 	for (i = 0; i < 4; i++) {
535 		ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS + i*2);
536 		if (likely(!ecc))
537 			continue;
538 		if (ecc & FLEXONENAND_UNCORRECTABLE_ERROR)
539 			return ONENAND_ECC_2BIT_ALL;
540 		else
541 			result = ONENAND_ECC_1BIT_ALL;
542 	}
543 
544 	return result;
545 }
546 
547 /**
548  * onenand_wait - [DEFAULT] wait until the command is done
549  * @param mtd		MTD device structure
550  * @param state		state to select the max. timeout value
551  *
552  * Wait for command done. This applies to all OneNAND command
553  * Read can take up to 30us, erase up to 2ms and program up to 350us
554  * according to general OneNAND specs
555  */
556 static int onenand_wait(struct mtd_info *mtd, int state)
557 {
558 	struct onenand_chip * this = mtd->priv;
559 	unsigned long timeout;
560 	unsigned int flags = ONENAND_INT_MASTER;
561 	unsigned int interrupt = 0;
562 	unsigned int ctrl;
563 
564 	/* The 20 msec is enough */
565 	timeout = jiffies + msecs_to_jiffies(20);
566 	while (time_before(jiffies, timeout)) {
567 		interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
568 
569 		if (interrupt & flags)
570 			break;
571 
572 		if (state != FL_READING && state != FL_PREPARING_ERASE)
573 			cond_resched();
574 	}
575 	/* To get correct interrupt status in timeout case */
576 	interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
577 
578 	ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
579 
580 	/*
581 	 * In the Spec. it checks the controller status first
582 	 * However if you get the correct information in case of
583 	 * power off recovery (POR) test, it should read ECC status first
584 	 */
585 	if (interrupt & ONENAND_INT_READ) {
586 		int ecc = onenand_read_ecc(this);
587 		if (ecc) {
588 			if (ecc & ONENAND_ECC_2BIT_ALL) {
589 				printk(KERN_ERR "%s: ECC error = 0x%04x\n",
590 					__func__, ecc);
591 				mtd->ecc_stats.failed++;
592 				return -EBADMSG;
593 			} else if (ecc & ONENAND_ECC_1BIT_ALL) {
594 				printk(KERN_DEBUG "%s: correctable ECC error = 0x%04x\n",
595 					__func__, ecc);
596 				mtd->ecc_stats.corrected++;
597 			}
598 		}
599 	} else if (state == FL_READING) {
600 		printk(KERN_ERR "%s: read timeout! ctrl=0x%04x intr=0x%04x\n",
601 			__func__, ctrl, interrupt);
602 		return -EIO;
603 	}
604 
605 	if (state == FL_PREPARING_ERASE && !(interrupt & ONENAND_INT_ERASE)) {
606 		printk(KERN_ERR "%s: mb erase timeout! ctrl=0x%04x intr=0x%04x\n",
607 		       __func__, ctrl, interrupt);
608 		return -EIO;
609 	}
610 
611 	if (!(interrupt & ONENAND_INT_MASTER)) {
612 		printk(KERN_ERR "%s: timeout! ctrl=0x%04x intr=0x%04x\n",
613 		       __func__, ctrl, interrupt);
614 		return -EIO;
615 	}
616 
617 	/* If there's controller error, it's a real error */
618 	if (ctrl & ONENAND_CTRL_ERROR) {
619 		printk(KERN_ERR "%s: controller error = 0x%04x\n",
620 			__func__, ctrl);
621 		if (ctrl & ONENAND_CTRL_LOCK)
622 			printk(KERN_ERR "%s: it's locked error.\n", __func__);
623 		return -EIO;
624 	}
625 
626 	return 0;
627 }
628 
629 /*
630  * onenand_interrupt - [DEFAULT] onenand interrupt handler
631  * @param irq		onenand interrupt number
632  * @param dev_id	interrupt data
633  *
634  * complete the work
635  */
636 static irqreturn_t onenand_interrupt(int irq, void *data)
637 {
638 	struct onenand_chip *this = data;
639 
640 	/* To handle shared interrupt */
641 	if (!this->complete.done)
642 		complete(&this->complete);
643 
644 	return IRQ_HANDLED;
645 }
646 
647 /*
648  * onenand_interrupt_wait - [DEFAULT] wait until the command is done
649  * @param mtd		MTD device structure
650  * @param state		state to select the max. timeout value
651  *
652  * Wait for command done.
653  */
654 static int onenand_interrupt_wait(struct mtd_info *mtd, int state)
655 {
656 	struct onenand_chip *this = mtd->priv;
657 
658 	wait_for_completion(&this->complete);
659 
660 	return onenand_wait(mtd, state);
661 }
662 
663 /*
664  * onenand_try_interrupt_wait - [DEFAULT] try interrupt wait
665  * @param mtd		MTD device structure
666  * @param state		state to select the max. timeout value
667  *
668  * Try interrupt based wait (It is used one-time)
669  */
670 static int onenand_try_interrupt_wait(struct mtd_info *mtd, int state)
671 {
672 	struct onenand_chip *this = mtd->priv;
673 	unsigned long remain, timeout;
674 
675 	/* We use interrupt wait first */
676 	this->wait = onenand_interrupt_wait;
677 
678 	timeout = msecs_to_jiffies(100);
679 	remain = wait_for_completion_timeout(&this->complete, timeout);
680 	if (!remain) {
681 		printk(KERN_INFO "OneNAND: There's no interrupt. "
682 				"We use the normal wait\n");
683 
684 		/* Release the irq */
685 		free_irq(this->irq, this);
686 
687 		this->wait = onenand_wait;
688 	}
689 
690 	return onenand_wait(mtd, state);
691 }
692 
693 /*
694  * onenand_setup_wait - [OneNAND Interface] setup onenand wait method
695  * @param mtd		MTD device structure
696  *
697  * There's two method to wait onenand work
698  * 1. polling - read interrupt status register
699  * 2. interrupt - use the kernel interrupt method
700  */
701 static void onenand_setup_wait(struct mtd_info *mtd)
702 {
703 	struct onenand_chip *this = mtd->priv;
704 	int syscfg;
705 
706 	init_completion(&this->complete);
707 
708 	if (this->irq <= 0) {
709 		this->wait = onenand_wait;
710 		return;
711 	}
712 
713 	if (request_irq(this->irq, &onenand_interrupt,
714 				IRQF_SHARED, "onenand", this)) {
715 		/* If we can't get irq, use the normal wait */
716 		this->wait = onenand_wait;
717 		return;
718 	}
719 
720 	/* Enable interrupt */
721 	syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
722 	syscfg |= ONENAND_SYS_CFG1_IOBE;
723 	this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
724 
725 	this->wait = onenand_try_interrupt_wait;
726 }
727 
728 /**
729  * onenand_bufferram_offset - [DEFAULT] BufferRAM offset
730  * @param mtd		MTD data structure
731  * @param area		BufferRAM area
732  * @return		offset given area
733  *
734  * Return BufferRAM offset given area
735  */
736 static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area)
737 {
738 	struct onenand_chip *this = mtd->priv;
739 
740 	if (ONENAND_CURRENT_BUFFERRAM(this)) {
741 		/* Note: the 'this->writesize' is a real page size */
742 		if (area == ONENAND_DATARAM)
743 			return this->writesize;
744 		if (area == ONENAND_SPARERAM)
745 			return mtd->oobsize;
746 	}
747 
748 	return 0;
749 }
750 
751 /**
752  * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area
753  * @param mtd		MTD data structure
754  * @param area		BufferRAM area
755  * @param buffer	the databuffer to put/get data
756  * @param offset	offset to read from or write to
757  * @param count		number of bytes to read/write
758  *
759  * Read the BufferRAM area
760  */
761 static int onenand_read_bufferram(struct mtd_info *mtd, int area,
762 		unsigned char *buffer, int offset, size_t count)
763 {
764 	struct onenand_chip *this = mtd->priv;
765 	void __iomem *bufferram;
766 
767 	bufferram = this->base + area;
768 
769 	bufferram += onenand_bufferram_offset(mtd, area);
770 
771 	if (ONENAND_CHECK_BYTE_ACCESS(count)) {
772 		unsigned short word;
773 
774 		/* Align with word(16-bit) size */
775 		count--;
776 
777 		/* Read word and save byte */
778 		word = this->read_word(bufferram + offset + count);
779 		buffer[count] = (word & 0xff);
780 	}
781 
782 	memcpy(buffer, bufferram + offset, count);
783 
784 	return 0;
785 }
786 
787 /**
788  * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode
789  * @param mtd		MTD data structure
790  * @param area		BufferRAM area
791  * @param buffer	the databuffer to put/get data
792  * @param offset	offset to read from or write to
793  * @param count		number of bytes to read/write
794  *
795  * Read the BufferRAM area with Sync. Burst Mode
796  */
797 static int onenand_sync_read_bufferram(struct mtd_info *mtd, int area,
798 		unsigned char *buffer, int offset, size_t count)
799 {
800 	struct onenand_chip *this = mtd->priv;
801 	void __iomem *bufferram;
802 
803 	bufferram = this->base + area;
804 
805 	bufferram += onenand_bufferram_offset(mtd, area);
806 
807 	this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ);
808 
809 	if (ONENAND_CHECK_BYTE_ACCESS(count)) {
810 		unsigned short word;
811 
812 		/* Align with word(16-bit) size */
813 		count--;
814 
815 		/* Read word and save byte */
816 		word = this->read_word(bufferram + offset + count);
817 		buffer[count] = (word & 0xff);
818 	}
819 
820 	memcpy(buffer, bufferram + offset, count);
821 
822 	this->mmcontrol(mtd, 0);
823 
824 	return 0;
825 }
826 
827 /**
828  * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area
829  * @param mtd		MTD data structure
830  * @param area		BufferRAM area
831  * @param buffer	the databuffer to put/get data
832  * @param offset	offset to read from or write to
833  * @param count		number of bytes to read/write
834  *
835  * Write the BufferRAM area
836  */
837 static int onenand_write_bufferram(struct mtd_info *mtd, int area,
838 		const unsigned char *buffer, int offset, size_t count)
839 {
840 	struct onenand_chip *this = mtd->priv;
841 	void __iomem *bufferram;
842 
843 	bufferram = this->base + area;
844 
845 	bufferram += onenand_bufferram_offset(mtd, area);
846 
847 	if (ONENAND_CHECK_BYTE_ACCESS(count)) {
848 		unsigned short word;
849 		int byte_offset;
850 
851 		/* Align with word(16-bit) size */
852 		count--;
853 
854 		/* Calculate byte access offset */
855 		byte_offset = offset + count;
856 
857 		/* Read word and save byte */
858 		word = this->read_word(bufferram + byte_offset);
859 		word = (word & ~0xff) | buffer[count];
860 		this->write_word(word, bufferram + byte_offset);
861 	}
862 
863 	memcpy(bufferram + offset, buffer, count);
864 
865 	return 0;
866 }
867 
868 /**
869  * onenand_get_2x_blockpage - [GENERIC] Get blockpage at 2x program mode
870  * @param mtd		MTD data structure
871  * @param addr		address to check
872  * @return		blockpage address
873  *
874  * Get blockpage address at 2x program mode
875  */
876 static int onenand_get_2x_blockpage(struct mtd_info *mtd, loff_t addr)
877 {
878 	struct onenand_chip *this = mtd->priv;
879 	int blockpage, block, page;
880 
881 	/* Calculate the even block number */
882 	block = (int) (addr >> this->erase_shift) & ~1;
883 	/* Is it the odd plane? */
884 	if (addr & this->writesize)
885 		block++;
886 	page = (int) (addr >> (this->page_shift + 1)) & this->page_mask;
887 	blockpage = (block << 7) | page;
888 
889 	return blockpage;
890 }
891 
892 /**
893  * onenand_check_bufferram - [GENERIC] Check BufferRAM information
894  * @param mtd		MTD data structure
895  * @param addr		address to check
896  * @return		1 if there are valid data, otherwise 0
897  *
898  * Check bufferram if there is data we required
899  */
900 static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr)
901 {
902 	struct onenand_chip *this = mtd->priv;
903 	int blockpage, found = 0;
904 	unsigned int i;
905 
906 	if (ONENAND_IS_2PLANE(this))
907 		blockpage = onenand_get_2x_blockpage(mtd, addr);
908 	else
909 		blockpage = (int) (addr >> this->page_shift);
910 
911 	/* Is there valid data? */
912 	i = ONENAND_CURRENT_BUFFERRAM(this);
913 	if (this->bufferram[i].blockpage == blockpage)
914 		found = 1;
915 	else {
916 		/* Check another BufferRAM */
917 		i = ONENAND_NEXT_BUFFERRAM(this);
918 		if (this->bufferram[i].blockpage == blockpage) {
919 			ONENAND_SET_NEXT_BUFFERRAM(this);
920 			found = 1;
921 		}
922 	}
923 
924 	if (found && ONENAND_IS_DDP(this)) {
925 		/* Select DataRAM for DDP */
926 		int block = onenand_block(this, addr);
927 		int value = onenand_bufferram_address(this, block);
928 		this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
929 	}
930 
931 	return found;
932 }
933 
934 /**
935  * onenand_update_bufferram - [GENERIC] Update BufferRAM information
936  * @param mtd		MTD data structure
937  * @param addr		address to update
938  * @param valid		valid flag
939  *
940  * Update BufferRAM information
941  */
942 static void onenand_update_bufferram(struct mtd_info *mtd, loff_t addr,
943 		int valid)
944 {
945 	struct onenand_chip *this = mtd->priv;
946 	int blockpage;
947 	unsigned int i;
948 
949 	if (ONENAND_IS_2PLANE(this))
950 		blockpage = onenand_get_2x_blockpage(mtd, addr);
951 	else
952 		blockpage = (int) (addr >> this->page_shift);
953 
954 	/* Invalidate another BufferRAM */
955 	i = ONENAND_NEXT_BUFFERRAM(this);
956 	if (this->bufferram[i].blockpage == blockpage)
957 		this->bufferram[i].blockpage = -1;
958 
959 	/* Update BufferRAM */
960 	i = ONENAND_CURRENT_BUFFERRAM(this);
961 	if (valid)
962 		this->bufferram[i].blockpage = blockpage;
963 	else
964 		this->bufferram[i].blockpage = -1;
965 }
966 
967 /**
968  * onenand_invalidate_bufferram - [GENERIC] Invalidate BufferRAM information
969  * @param mtd		MTD data structure
970  * @param addr		start address to invalidate
971  * @param len		length to invalidate
972  *
973  * Invalidate BufferRAM information
974  */
975 static void onenand_invalidate_bufferram(struct mtd_info *mtd, loff_t addr,
976 		unsigned int len)
977 {
978 	struct onenand_chip *this = mtd->priv;
979 	int i;
980 	loff_t end_addr = addr + len;
981 
982 	/* Invalidate BufferRAM */
983 	for (i = 0; i < MAX_BUFFERRAM; i++) {
984 		loff_t buf_addr = this->bufferram[i].blockpage << this->page_shift;
985 		if (buf_addr >= addr && buf_addr < end_addr)
986 			this->bufferram[i].blockpage = -1;
987 	}
988 }
989 
990 /**
991  * onenand_get_device - [GENERIC] Get chip for selected access
992  * @param mtd		MTD device structure
993  * @param new_state	the state which is requested
994  *
995  * Get the device and lock it for exclusive access
996  */
997 static int onenand_get_device(struct mtd_info *mtd, int new_state)
998 {
999 	struct onenand_chip *this = mtd->priv;
1000 	DECLARE_WAITQUEUE(wait, current);
1001 
1002 	/*
1003 	 * Grab the lock and see if the device is available
1004 	 */
1005 	while (1) {
1006 		spin_lock(&this->chip_lock);
1007 		if (this->state == FL_READY) {
1008 			this->state = new_state;
1009 			spin_unlock(&this->chip_lock);
1010 			if (new_state != FL_PM_SUSPENDED && this->enable)
1011 				this->enable(mtd);
1012 			break;
1013 		}
1014 		if (new_state == FL_PM_SUSPENDED) {
1015 			spin_unlock(&this->chip_lock);
1016 			return (this->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN;
1017 		}
1018 		set_current_state(TASK_UNINTERRUPTIBLE);
1019 		add_wait_queue(&this->wq, &wait);
1020 		spin_unlock(&this->chip_lock);
1021 		schedule();
1022 		remove_wait_queue(&this->wq, &wait);
1023 	}
1024 
1025 	return 0;
1026 }
1027 
1028 /**
1029  * onenand_release_device - [GENERIC] release chip
1030  * @param mtd		MTD device structure
1031  *
1032  * Deselect, release chip lock and wake up anyone waiting on the device
1033  */
1034 static void onenand_release_device(struct mtd_info *mtd)
1035 {
1036 	struct onenand_chip *this = mtd->priv;
1037 
1038 	if (this->state != FL_PM_SUSPENDED && this->disable)
1039 		this->disable(mtd);
1040 	/* Release the chip */
1041 	spin_lock(&this->chip_lock);
1042 	this->state = FL_READY;
1043 	wake_up(&this->wq);
1044 	spin_unlock(&this->chip_lock);
1045 }
1046 
1047 /**
1048  * onenand_transfer_auto_oob - [INTERN] oob auto-placement transfer
1049  * @param mtd		MTD device structure
1050  * @param buf		destination address
1051  * @param column	oob offset to read from
1052  * @param thislen	oob length to read
1053  */
1054 static int onenand_transfer_auto_oob(struct mtd_info *mtd, uint8_t *buf, int column,
1055 				int thislen)
1056 {
1057 	struct onenand_chip *this = mtd->priv;
1058 	int ret;
1059 
1060 	this->read_bufferram(mtd, ONENAND_SPARERAM, this->oob_buf, 0,
1061 			     mtd->oobsize);
1062 	ret = mtd_ooblayout_get_databytes(mtd, buf, this->oob_buf,
1063 					  column, thislen);
1064 	if (ret)
1065 		return ret;
1066 
1067 	return 0;
1068 }
1069 
1070 /**
1071  * onenand_recover_lsb - [Flex-OneNAND] Recover LSB page data
1072  * @param mtd		MTD device structure
1073  * @param addr		address to recover
1074  * @param status	return value from onenand_wait / onenand_bbt_wait
1075  *
1076  * MLC NAND Flash cell has paired pages - LSB page and MSB page. LSB page has
1077  * lower page address and MSB page has higher page address in paired pages.
1078  * If power off occurs during MSB page program, the paired LSB page data can
1079  * become corrupt. LSB page recovery read is a way to read LSB page though page
1080  * data are corrupted. When uncorrectable error occurs as a result of LSB page
1081  * read after power up, issue LSB page recovery read.
1082  */
1083 static int onenand_recover_lsb(struct mtd_info *mtd, loff_t addr, int status)
1084 {
1085 	struct onenand_chip *this = mtd->priv;
1086 	int i;
1087 
1088 	/* Recovery is only for Flex-OneNAND */
1089 	if (!FLEXONENAND(this))
1090 		return status;
1091 
1092 	/* check if we failed due to uncorrectable error */
1093 	if (!mtd_is_eccerr(status) && status != ONENAND_BBT_READ_ECC_ERROR)
1094 		return status;
1095 
1096 	/* check if address lies in MLC region */
1097 	i = flexonenand_region(mtd, addr);
1098 	if (mtd->eraseregions[i].erasesize < (1 << this->erase_shift))
1099 		return status;
1100 
1101 	/* We are attempting to reread, so decrement stats.failed
1102 	 * which was incremented by onenand_wait due to read failure
1103 	 */
1104 	printk(KERN_INFO "%s: Attempting to recover from uncorrectable read\n",
1105 		__func__);
1106 	mtd->ecc_stats.failed--;
1107 
1108 	/* Issue the LSB page recovery command */
1109 	this->command(mtd, FLEXONENAND_CMD_RECOVER_LSB, addr, this->writesize);
1110 	return this->wait(mtd, FL_READING);
1111 }
1112 
1113 /**
1114  * onenand_mlc_read_ops_nolock - MLC OneNAND read main and/or out-of-band
1115  * @param mtd		MTD device structure
1116  * @param from		offset to read from
1117  * @param ops:		oob operation description structure
1118  *
1119  * MLC OneNAND / Flex-OneNAND has 4KB page size and 4KB dataram.
1120  * So, read-while-load is not present.
1121  */
1122 static int onenand_mlc_read_ops_nolock(struct mtd_info *mtd, loff_t from,
1123 				struct mtd_oob_ops *ops)
1124 {
1125 	struct onenand_chip *this = mtd->priv;
1126 	struct mtd_ecc_stats stats;
1127 	size_t len = ops->len;
1128 	size_t ooblen = ops->ooblen;
1129 	u_char *buf = ops->datbuf;
1130 	u_char *oobbuf = ops->oobbuf;
1131 	int read = 0, column, thislen;
1132 	int oobread = 0, oobcolumn, thisooblen, oobsize;
1133 	int ret = 0;
1134 	int writesize = this->writesize;
1135 
1136 	pr_debug("%s: from = 0x%08x, len = %i\n", __func__, (unsigned int)from,
1137 			(int)len);
1138 
1139 	oobsize = mtd_oobavail(mtd, ops);
1140 	oobcolumn = from & (mtd->oobsize - 1);
1141 
1142 	/* Do not allow reads past end of device */
1143 	if (from + len > mtd->size) {
1144 		printk(KERN_ERR "%s: Attempt read beyond end of device\n",
1145 			__func__);
1146 		ops->retlen = 0;
1147 		ops->oobretlen = 0;
1148 		return -EINVAL;
1149 	}
1150 
1151 	stats = mtd->ecc_stats;
1152 
1153 	while (read < len) {
1154 		cond_resched();
1155 
1156 		thislen = min_t(int, writesize, len - read);
1157 
1158 		column = from & (writesize - 1);
1159 		if (column + thislen > writesize)
1160 			thislen = writesize - column;
1161 
1162 		if (!onenand_check_bufferram(mtd, from)) {
1163 			this->command(mtd, ONENAND_CMD_READ, from, writesize);
1164 
1165 			ret = this->wait(mtd, FL_READING);
1166 			if (unlikely(ret))
1167 				ret = onenand_recover_lsb(mtd, from, ret);
1168 			onenand_update_bufferram(mtd, from, !ret);
1169 			if (mtd_is_eccerr(ret))
1170 				ret = 0;
1171 			if (ret)
1172 				break;
1173 		}
1174 
1175 		this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen);
1176 		if (oobbuf) {
1177 			thisooblen = oobsize - oobcolumn;
1178 			thisooblen = min_t(int, thisooblen, ooblen - oobread);
1179 
1180 			if (ops->mode == MTD_OPS_AUTO_OOB)
1181 				onenand_transfer_auto_oob(mtd, oobbuf, oobcolumn, thisooblen);
1182 			else
1183 				this->read_bufferram(mtd, ONENAND_SPARERAM, oobbuf, oobcolumn, thisooblen);
1184 			oobread += thisooblen;
1185 			oobbuf += thisooblen;
1186 			oobcolumn = 0;
1187 		}
1188 
1189 		read += thislen;
1190 		if (read == len)
1191 			break;
1192 
1193 		from += thislen;
1194 		buf += thislen;
1195 	}
1196 
1197 	/*
1198 	 * Return success, if no ECC failures, else -EBADMSG
1199 	 * fs driver will take care of that, because
1200 	 * retlen == desired len and result == -EBADMSG
1201 	 */
1202 	ops->retlen = read;
1203 	ops->oobretlen = oobread;
1204 
1205 	if (ret)
1206 		return ret;
1207 
1208 	if (mtd->ecc_stats.failed - stats.failed)
1209 		return -EBADMSG;
1210 
1211 	/* return max bitflips per ecc step; ONENANDs correct 1 bit only */
1212 	return mtd->ecc_stats.corrected != stats.corrected ? 1 : 0;
1213 }
1214 
1215 /**
1216  * onenand_read_ops_nolock - [OneNAND Interface] OneNAND read main and/or out-of-band
1217  * @param mtd		MTD device structure
1218  * @param from		offset to read from
1219  * @param ops:		oob operation description structure
1220  *
1221  * OneNAND read main and/or out-of-band data
1222  */
1223 static int onenand_read_ops_nolock(struct mtd_info *mtd, loff_t from,
1224 				struct mtd_oob_ops *ops)
1225 {
1226 	struct onenand_chip *this = mtd->priv;
1227 	struct mtd_ecc_stats stats;
1228 	size_t len = ops->len;
1229 	size_t ooblen = ops->ooblen;
1230 	u_char *buf = ops->datbuf;
1231 	u_char *oobbuf = ops->oobbuf;
1232 	int read = 0, column, thislen;
1233 	int oobread = 0, oobcolumn, thisooblen, oobsize;
1234 	int ret = 0, boundary = 0;
1235 	int writesize = this->writesize;
1236 
1237 	pr_debug("%s: from = 0x%08x, len = %i\n", __func__, (unsigned int)from,
1238 			(int)len);
1239 
1240 	oobsize = mtd_oobavail(mtd, ops);
1241 	oobcolumn = from & (mtd->oobsize - 1);
1242 
1243 	/* Do not allow reads past end of device */
1244 	if ((from + len) > mtd->size) {
1245 		printk(KERN_ERR "%s: Attempt read beyond end of device\n",
1246 			__func__);
1247 		ops->retlen = 0;
1248 		ops->oobretlen = 0;
1249 		return -EINVAL;
1250 	}
1251 
1252 	stats = mtd->ecc_stats;
1253 
1254  	/* Read-while-load method */
1255 
1256  	/* Do first load to bufferRAM */
1257  	if (read < len) {
1258  		if (!onenand_check_bufferram(mtd, from)) {
1259 			this->command(mtd, ONENAND_CMD_READ, from, writesize);
1260  			ret = this->wait(mtd, FL_READING);
1261  			onenand_update_bufferram(mtd, from, !ret);
1262 			if (mtd_is_eccerr(ret))
1263 				ret = 0;
1264  		}
1265  	}
1266 
1267 	thislen = min_t(int, writesize, len - read);
1268 	column = from & (writesize - 1);
1269 	if (column + thislen > writesize)
1270 		thislen = writesize - column;
1271 
1272  	while (!ret) {
1273  		/* If there is more to load then start next load */
1274  		from += thislen;
1275  		if (read + thislen < len) {
1276 			this->command(mtd, ONENAND_CMD_READ, from, writesize);
1277  			/*
1278  			 * Chip boundary handling in DDP
1279  			 * Now we issued chip 1 read and pointed chip 1
1280 			 * bufferram so we have to point chip 0 bufferram.
1281  			 */
1282  			if (ONENAND_IS_DDP(this) &&
1283  			    unlikely(from == (this->chipsize >> 1))) {
1284  				this->write_word(ONENAND_DDP_CHIP0, this->base + ONENAND_REG_START_ADDRESS2);
1285  				boundary = 1;
1286  			} else
1287  				boundary = 0;
1288  			ONENAND_SET_PREV_BUFFERRAM(this);
1289  		}
1290  		/* While load is going, read from last bufferRAM */
1291  		this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen);
1292 
1293 		/* Read oob area if needed */
1294 		if (oobbuf) {
1295 			thisooblen = oobsize - oobcolumn;
1296 			thisooblen = min_t(int, thisooblen, ooblen - oobread);
1297 
1298 			if (ops->mode == MTD_OPS_AUTO_OOB)
1299 				onenand_transfer_auto_oob(mtd, oobbuf, oobcolumn, thisooblen);
1300 			else
1301 				this->read_bufferram(mtd, ONENAND_SPARERAM, oobbuf, oobcolumn, thisooblen);
1302 			oobread += thisooblen;
1303 			oobbuf += thisooblen;
1304 			oobcolumn = 0;
1305 		}
1306 
1307  		/* See if we are done */
1308  		read += thislen;
1309  		if (read == len)
1310  			break;
1311  		/* Set up for next read from bufferRAM */
1312  		if (unlikely(boundary))
1313  			this->write_word(ONENAND_DDP_CHIP1, this->base + ONENAND_REG_START_ADDRESS2);
1314  		ONENAND_SET_NEXT_BUFFERRAM(this);
1315  		buf += thislen;
1316 		thislen = min_t(int, writesize, len - read);
1317  		column = 0;
1318  		cond_resched();
1319  		/* Now wait for load */
1320  		ret = this->wait(mtd, FL_READING);
1321  		onenand_update_bufferram(mtd, from, !ret);
1322 		if (mtd_is_eccerr(ret))
1323 			ret = 0;
1324  	}
1325 
1326 	/*
1327 	 * Return success, if no ECC failures, else -EBADMSG
1328 	 * fs driver will take care of that, because
1329 	 * retlen == desired len and result == -EBADMSG
1330 	 */
1331 	ops->retlen = read;
1332 	ops->oobretlen = oobread;
1333 
1334 	if (ret)
1335 		return ret;
1336 
1337 	if (mtd->ecc_stats.failed - stats.failed)
1338 		return -EBADMSG;
1339 
1340 	/* return max bitflips per ecc step; ONENANDs correct 1 bit only */
1341 	return mtd->ecc_stats.corrected != stats.corrected ? 1 : 0;
1342 }
1343 
1344 /**
1345  * onenand_read_oob_nolock - [MTD Interface] OneNAND read out-of-band
1346  * @param mtd		MTD device structure
1347  * @param from		offset to read from
1348  * @param ops:		oob operation description structure
1349  *
1350  * OneNAND read out-of-band data from the spare area
1351  */
1352 static int onenand_read_oob_nolock(struct mtd_info *mtd, loff_t from,
1353 			struct mtd_oob_ops *ops)
1354 {
1355 	struct onenand_chip *this = mtd->priv;
1356 	struct mtd_ecc_stats stats;
1357 	int read = 0, thislen, column, oobsize;
1358 	size_t len = ops->ooblen;
1359 	unsigned int mode = ops->mode;
1360 	u_char *buf = ops->oobbuf;
1361 	int ret = 0, readcmd;
1362 
1363 	from += ops->ooboffs;
1364 
1365 	pr_debug("%s: from = 0x%08x, len = %i\n", __func__, (unsigned int)from,
1366 			(int)len);
1367 
1368 	/* Initialize return length value */
1369 	ops->oobretlen = 0;
1370 
1371 	if (mode == MTD_OPS_AUTO_OOB)
1372 		oobsize = mtd->oobavail;
1373 	else
1374 		oobsize = mtd->oobsize;
1375 
1376 	column = from & (mtd->oobsize - 1);
1377 
1378 	if (unlikely(column >= oobsize)) {
1379 		printk(KERN_ERR "%s: Attempted to start read outside oob\n",
1380 			__func__);
1381 		return -EINVAL;
1382 	}
1383 
1384 	stats = mtd->ecc_stats;
1385 
1386 	readcmd = ONENAND_IS_4KB_PAGE(this) ? ONENAND_CMD_READ : ONENAND_CMD_READOOB;
1387 
1388 	while (read < len) {
1389 		cond_resched();
1390 
1391 		thislen = oobsize - column;
1392 		thislen = min_t(int, thislen, len);
1393 
1394 		this->command(mtd, readcmd, from, mtd->oobsize);
1395 
1396 		onenand_update_bufferram(mtd, from, 0);
1397 
1398 		ret = this->wait(mtd, FL_READING);
1399 		if (unlikely(ret))
1400 			ret = onenand_recover_lsb(mtd, from, ret);
1401 
1402 		if (ret && !mtd_is_eccerr(ret)) {
1403 			printk(KERN_ERR "%s: read failed = 0x%x\n",
1404 				__func__, ret);
1405 			break;
1406 		}
1407 
1408 		if (mode == MTD_OPS_AUTO_OOB)
1409 			onenand_transfer_auto_oob(mtd, buf, column, thislen);
1410 		else
1411 			this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
1412 
1413 		read += thislen;
1414 
1415 		if (read == len)
1416 			break;
1417 
1418 		buf += thislen;
1419 
1420 		/* Read more? */
1421 		if (read < len) {
1422 			/* Page size */
1423 			from += mtd->writesize;
1424 			column = 0;
1425 		}
1426 	}
1427 
1428 	ops->oobretlen = read;
1429 
1430 	if (ret)
1431 		return ret;
1432 
1433 	if (mtd->ecc_stats.failed - stats.failed)
1434 		return -EBADMSG;
1435 
1436 	return 0;
1437 }
1438 
1439 /**
1440  * onenand_read_oob - [MTD Interface] Read main and/or out-of-band
1441  * @param mtd:		MTD device structure
1442  * @param from:		offset to read from
1443  * @param ops:		oob operation description structure
1444 
1445  * Read main and/or out-of-band
1446  */
1447 static int onenand_read_oob(struct mtd_info *mtd, loff_t from,
1448 			    struct mtd_oob_ops *ops)
1449 {
1450 	struct onenand_chip *this = mtd->priv;
1451 	int ret;
1452 
1453 	switch (ops->mode) {
1454 	case MTD_OPS_PLACE_OOB:
1455 	case MTD_OPS_AUTO_OOB:
1456 		break;
1457 	case MTD_OPS_RAW:
1458 		/* Not implemented yet */
1459 	default:
1460 		return -EINVAL;
1461 	}
1462 
1463 	onenand_get_device(mtd, FL_READING);
1464 	if (ops->datbuf)
1465 		ret = ONENAND_IS_4KB_PAGE(this) ?
1466 			onenand_mlc_read_ops_nolock(mtd, from, ops) :
1467 			onenand_read_ops_nolock(mtd, from, ops);
1468 	else
1469 		ret = onenand_read_oob_nolock(mtd, from, ops);
1470 	onenand_release_device(mtd);
1471 
1472 	return ret;
1473 }
1474 
1475 /**
1476  * onenand_bbt_wait - [DEFAULT] wait until the command is done
1477  * @param mtd		MTD device structure
1478  * @param state		state to select the max. timeout value
1479  *
1480  * Wait for command done.
1481  */
1482 static int onenand_bbt_wait(struct mtd_info *mtd, int state)
1483 {
1484 	struct onenand_chip *this = mtd->priv;
1485 	unsigned long timeout;
1486 	unsigned int interrupt, ctrl, ecc, addr1, addr8;
1487 
1488 	/* The 20 msec is enough */
1489 	timeout = jiffies + msecs_to_jiffies(20);
1490 	while (time_before(jiffies, timeout)) {
1491 		interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
1492 		if (interrupt & ONENAND_INT_MASTER)
1493 			break;
1494 	}
1495 	/* To get correct interrupt status in timeout case */
1496 	interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
1497 	ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
1498 	addr1 = this->read_word(this->base + ONENAND_REG_START_ADDRESS1);
1499 	addr8 = this->read_word(this->base + ONENAND_REG_START_ADDRESS8);
1500 
1501 	if (interrupt & ONENAND_INT_READ) {
1502 		ecc = onenand_read_ecc(this);
1503 		if (ecc & ONENAND_ECC_2BIT_ALL) {
1504 			printk(KERN_DEBUG "%s: ecc 0x%04x ctrl 0x%04x "
1505 			       "intr 0x%04x addr1 %#x addr8 %#x\n",
1506 			       __func__, ecc, ctrl, interrupt, addr1, addr8);
1507 			return ONENAND_BBT_READ_ECC_ERROR;
1508 		}
1509 	} else {
1510 		printk(KERN_ERR "%s: read timeout! ctrl 0x%04x "
1511 		       "intr 0x%04x addr1 %#x addr8 %#x\n",
1512 		       __func__, ctrl, interrupt, addr1, addr8);
1513 		return ONENAND_BBT_READ_FATAL_ERROR;
1514 	}
1515 
1516 	/* Initial bad block case: 0x2400 or 0x0400 */
1517 	if (ctrl & ONENAND_CTRL_ERROR) {
1518 		printk(KERN_DEBUG "%s: ctrl 0x%04x intr 0x%04x addr1 %#x "
1519 		       "addr8 %#x\n", __func__, ctrl, interrupt, addr1, addr8);
1520 		return ONENAND_BBT_READ_ERROR;
1521 	}
1522 
1523 	return 0;
1524 }
1525 
1526 /**
1527  * onenand_bbt_read_oob - [MTD Interface] OneNAND read out-of-band for bbt scan
1528  * @param mtd		MTD device structure
1529  * @param from		offset to read from
1530  * @param ops		oob operation description structure
1531  *
1532  * OneNAND read out-of-band data from the spare area for bbt scan
1533  */
1534 int onenand_bbt_read_oob(struct mtd_info *mtd, loff_t from,
1535 			    struct mtd_oob_ops *ops)
1536 {
1537 	struct onenand_chip *this = mtd->priv;
1538 	int read = 0, thislen, column;
1539 	int ret = 0, readcmd;
1540 	size_t len = ops->ooblen;
1541 	u_char *buf = ops->oobbuf;
1542 
1543 	pr_debug("%s: from = 0x%08x, len = %zi\n", __func__, (unsigned int)from,
1544 			len);
1545 
1546 	/* Initialize return value */
1547 	ops->oobretlen = 0;
1548 
1549 	/* Do not allow reads past end of device */
1550 	if (unlikely((from + len) > mtd->size)) {
1551 		printk(KERN_ERR "%s: Attempt read beyond end of device\n",
1552 			__func__);
1553 		return ONENAND_BBT_READ_FATAL_ERROR;
1554 	}
1555 
1556 	/* Grab the lock and see if the device is available */
1557 	onenand_get_device(mtd, FL_READING);
1558 
1559 	column = from & (mtd->oobsize - 1);
1560 
1561 	readcmd = ONENAND_IS_4KB_PAGE(this) ? ONENAND_CMD_READ : ONENAND_CMD_READOOB;
1562 
1563 	while (read < len) {
1564 		cond_resched();
1565 
1566 		thislen = mtd->oobsize - column;
1567 		thislen = min_t(int, thislen, len);
1568 
1569 		this->command(mtd, readcmd, from, mtd->oobsize);
1570 
1571 		onenand_update_bufferram(mtd, from, 0);
1572 
1573 		ret = this->bbt_wait(mtd, FL_READING);
1574 		if (unlikely(ret))
1575 			ret = onenand_recover_lsb(mtd, from, ret);
1576 
1577 		if (ret)
1578 			break;
1579 
1580 		this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
1581 		read += thislen;
1582 		if (read == len)
1583 			break;
1584 
1585 		buf += thislen;
1586 
1587 		/* Read more? */
1588 		if (read < len) {
1589 			/* Update Page size */
1590 			from += this->writesize;
1591 			column = 0;
1592 		}
1593 	}
1594 
1595 	/* Deselect and wake up anyone waiting on the device */
1596 	onenand_release_device(mtd);
1597 
1598 	ops->oobretlen = read;
1599 	return ret;
1600 }
1601 
1602 #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
1603 /**
1604  * onenand_verify_oob - [GENERIC] verify the oob contents after a write
1605  * @param mtd		MTD device structure
1606  * @param buf		the databuffer to verify
1607  * @param to		offset to read from
1608  */
1609 static int onenand_verify_oob(struct mtd_info *mtd, const u_char *buf, loff_t to)
1610 {
1611 	struct onenand_chip *this = mtd->priv;
1612 	u_char *oob_buf = this->oob_buf;
1613 	int status, i, readcmd;
1614 
1615 	readcmd = ONENAND_IS_4KB_PAGE(this) ? ONENAND_CMD_READ : ONENAND_CMD_READOOB;
1616 
1617 	this->command(mtd, readcmd, to, mtd->oobsize);
1618 	onenand_update_bufferram(mtd, to, 0);
1619 	status = this->wait(mtd, FL_READING);
1620 	if (status)
1621 		return status;
1622 
1623 	this->read_bufferram(mtd, ONENAND_SPARERAM, oob_buf, 0, mtd->oobsize);
1624 	for (i = 0; i < mtd->oobsize; i++)
1625 		if (buf[i] != 0xFF && buf[i] != oob_buf[i])
1626 			return -EBADMSG;
1627 
1628 	return 0;
1629 }
1630 
1631 /**
1632  * onenand_verify - [GENERIC] verify the chip contents after a write
1633  * @param mtd          MTD device structure
1634  * @param buf          the databuffer to verify
1635  * @param addr         offset to read from
1636  * @param len          number of bytes to read and compare
1637  */
1638 static int onenand_verify(struct mtd_info *mtd, const u_char *buf, loff_t addr, size_t len)
1639 {
1640 	struct onenand_chip *this = mtd->priv;
1641 	int ret = 0;
1642 	int thislen, column;
1643 
1644 	column = addr & (this->writesize - 1);
1645 
1646 	while (len != 0) {
1647 		thislen = min_t(int, this->writesize - column, len);
1648 
1649 		this->command(mtd, ONENAND_CMD_READ, addr, this->writesize);
1650 
1651 		onenand_update_bufferram(mtd, addr, 0);
1652 
1653 		ret = this->wait(mtd, FL_READING);
1654 		if (ret)
1655 			return ret;
1656 
1657 		onenand_update_bufferram(mtd, addr, 1);
1658 
1659 		this->read_bufferram(mtd, ONENAND_DATARAM, this->verify_buf, 0, mtd->writesize);
1660 
1661 		if (memcmp(buf, this->verify_buf + column, thislen))
1662 			return -EBADMSG;
1663 
1664 		len -= thislen;
1665 		buf += thislen;
1666 		addr += thislen;
1667 		column = 0;
1668 	}
1669 
1670 	return 0;
1671 }
1672 #else
1673 #define onenand_verify(...)		(0)
1674 #define onenand_verify_oob(...)		(0)
1675 #endif
1676 
1677 #define NOTALIGNED(x)	((x & (this->subpagesize - 1)) != 0)
1678 
1679 static void onenand_panic_wait(struct mtd_info *mtd)
1680 {
1681 	struct onenand_chip *this = mtd->priv;
1682 	unsigned int interrupt;
1683 	int i;
1684 
1685 	for (i = 0; i < 2000; i++) {
1686 		interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
1687 		if (interrupt & ONENAND_INT_MASTER)
1688 			break;
1689 		udelay(10);
1690 	}
1691 }
1692 
1693 /**
1694  * onenand_panic_write - [MTD Interface] write buffer to FLASH in a panic context
1695  * @param mtd		MTD device structure
1696  * @param to		offset to write to
1697  * @param len		number of bytes to write
1698  * @param retlen	pointer to variable to store the number of written bytes
1699  * @param buf		the data to write
1700  *
1701  * Write with ECC
1702  */
1703 static int onenand_panic_write(struct mtd_info *mtd, loff_t to, size_t len,
1704 			 size_t *retlen, const u_char *buf)
1705 {
1706 	struct onenand_chip *this = mtd->priv;
1707 	int column, subpage;
1708 	int written = 0;
1709 
1710 	if (this->state == FL_PM_SUSPENDED)
1711 		return -EBUSY;
1712 
1713 	/* Wait for any existing operation to clear */
1714 	onenand_panic_wait(mtd);
1715 
1716 	pr_debug("%s: to = 0x%08x, len = %i\n", __func__, (unsigned int)to,
1717 			(int)len);
1718 
1719 	/* Reject writes, which are not page aligned */
1720         if (unlikely(NOTALIGNED(to) || NOTALIGNED(len))) {
1721 		printk(KERN_ERR "%s: Attempt to write not page aligned data\n",
1722 			__func__);
1723                 return -EINVAL;
1724         }
1725 
1726 	column = to & (mtd->writesize - 1);
1727 
1728 	/* Loop until all data write */
1729 	while (written < len) {
1730 		int thislen = min_t(int, mtd->writesize - column, len - written);
1731 		u_char *wbuf = (u_char *) buf;
1732 
1733 		this->command(mtd, ONENAND_CMD_BUFFERRAM, to, thislen);
1734 
1735 		/* Partial page write */
1736 		subpage = thislen < mtd->writesize;
1737 		if (subpage) {
1738 			memset(this->page_buf, 0xff, mtd->writesize);
1739 			memcpy(this->page_buf + column, buf, thislen);
1740 			wbuf = this->page_buf;
1741 		}
1742 
1743 		this->write_bufferram(mtd, ONENAND_DATARAM, wbuf, 0, mtd->writesize);
1744 		this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, mtd->oobsize);
1745 
1746 		this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize);
1747 
1748 		onenand_panic_wait(mtd);
1749 
1750 		/* In partial page write we don't update bufferram */
1751 		onenand_update_bufferram(mtd, to, !subpage);
1752 		if (ONENAND_IS_2PLANE(this)) {
1753 			ONENAND_SET_BUFFERRAM1(this);
1754 			onenand_update_bufferram(mtd, to + this->writesize, !subpage);
1755 		}
1756 
1757 		written += thislen;
1758 
1759 		if (written == len)
1760 			break;
1761 
1762 		column = 0;
1763 		to += thislen;
1764 		buf += thislen;
1765 	}
1766 
1767 	*retlen = written;
1768 	return 0;
1769 }
1770 
1771 /**
1772  * onenand_fill_auto_oob - [INTERN] oob auto-placement transfer
1773  * @param mtd		MTD device structure
1774  * @param oob_buf	oob buffer
1775  * @param buf		source address
1776  * @param column	oob offset to write to
1777  * @param thislen	oob length to write
1778  */
1779 static int onenand_fill_auto_oob(struct mtd_info *mtd, u_char *oob_buf,
1780 				  const u_char *buf, int column, int thislen)
1781 {
1782 	return mtd_ooblayout_set_databytes(mtd, buf, oob_buf, column, thislen);
1783 }
1784 
1785 /**
1786  * onenand_write_ops_nolock - [OneNAND Interface] write main and/or out-of-band
1787  * @param mtd		MTD device structure
1788  * @param to		offset to write to
1789  * @param ops		oob operation description structure
1790  *
1791  * Write main and/or oob with ECC
1792  */
1793 static int onenand_write_ops_nolock(struct mtd_info *mtd, loff_t to,
1794 				struct mtd_oob_ops *ops)
1795 {
1796 	struct onenand_chip *this = mtd->priv;
1797 	int written = 0, column, thislen = 0, subpage = 0;
1798 	int prev = 0, prevlen = 0, prev_subpage = 0, first = 1;
1799 	int oobwritten = 0, oobcolumn, thisooblen, oobsize;
1800 	size_t len = ops->len;
1801 	size_t ooblen = ops->ooblen;
1802 	const u_char *buf = ops->datbuf;
1803 	const u_char *oob = ops->oobbuf;
1804 	u_char *oobbuf;
1805 	int ret = 0, cmd;
1806 
1807 	pr_debug("%s: to = 0x%08x, len = %i\n", __func__, (unsigned int)to,
1808 			(int)len);
1809 
1810 	/* Initialize retlen, in case of early exit */
1811 	ops->retlen = 0;
1812 	ops->oobretlen = 0;
1813 
1814 	/* Reject writes, which are not page aligned */
1815         if (unlikely(NOTALIGNED(to) || NOTALIGNED(len))) {
1816 		printk(KERN_ERR "%s: Attempt to write not page aligned data\n",
1817 			__func__);
1818                 return -EINVAL;
1819         }
1820 
1821 	/* Check zero length */
1822 	if (!len)
1823 		return 0;
1824 	oobsize = mtd_oobavail(mtd, ops);
1825 	oobcolumn = to & (mtd->oobsize - 1);
1826 
1827 	column = to & (mtd->writesize - 1);
1828 
1829 	/* Loop until all data write */
1830 	while (1) {
1831 		if (written < len) {
1832 			u_char *wbuf = (u_char *) buf;
1833 
1834 			thislen = min_t(int, mtd->writesize - column, len - written);
1835 			thisooblen = min_t(int, oobsize - oobcolumn, ooblen - oobwritten);
1836 
1837 			cond_resched();
1838 
1839 			this->command(mtd, ONENAND_CMD_BUFFERRAM, to, thislen);
1840 
1841 			/* Partial page write */
1842 			subpage = thislen < mtd->writesize;
1843 			if (subpage) {
1844 				memset(this->page_buf, 0xff, mtd->writesize);
1845 				memcpy(this->page_buf + column, buf, thislen);
1846 				wbuf = this->page_buf;
1847 			}
1848 
1849 			this->write_bufferram(mtd, ONENAND_DATARAM, wbuf, 0, mtd->writesize);
1850 
1851 			if (oob) {
1852 				oobbuf = this->oob_buf;
1853 
1854 				/* We send data to spare ram with oobsize
1855 				 * to prevent byte access */
1856 				memset(oobbuf, 0xff, mtd->oobsize);
1857 				if (ops->mode == MTD_OPS_AUTO_OOB)
1858 					onenand_fill_auto_oob(mtd, oobbuf, oob, oobcolumn, thisooblen);
1859 				else
1860 					memcpy(oobbuf + oobcolumn, oob, thisooblen);
1861 
1862 				oobwritten += thisooblen;
1863 				oob += thisooblen;
1864 				oobcolumn = 0;
1865 			} else
1866 				oobbuf = (u_char *) ffchars;
1867 
1868 			this->write_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize);
1869 		} else
1870 			ONENAND_SET_NEXT_BUFFERRAM(this);
1871 
1872 		/*
1873 		 * 2 PLANE, MLC, and Flex-OneNAND do not support
1874 		 * write-while-program feature.
1875 		 */
1876 		if (!ONENAND_IS_2PLANE(this) && !ONENAND_IS_4KB_PAGE(this) && !first) {
1877 			ONENAND_SET_PREV_BUFFERRAM(this);
1878 
1879 			ret = this->wait(mtd, FL_WRITING);
1880 
1881 			/* In partial page write we don't update bufferram */
1882 			onenand_update_bufferram(mtd, prev, !ret && !prev_subpage);
1883 			if (ret) {
1884 				written -= prevlen;
1885 				printk(KERN_ERR "%s: write failed %d\n",
1886 					__func__, ret);
1887 				break;
1888 			}
1889 
1890 			if (written == len) {
1891 				/* Only check verify write turn on */
1892 				ret = onenand_verify(mtd, buf - len, to - len, len);
1893 				if (ret)
1894 					printk(KERN_ERR "%s: verify failed %d\n",
1895 						__func__, ret);
1896 				break;
1897 			}
1898 
1899 			ONENAND_SET_NEXT_BUFFERRAM(this);
1900 		}
1901 
1902 		this->ongoing = 0;
1903 		cmd = ONENAND_CMD_PROG;
1904 
1905 		/* Exclude 1st OTP and OTP blocks for cache program feature */
1906 		if (ONENAND_IS_CACHE_PROGRAM(this) &&
1907 		    likely(onenand_block(this, to) != 0) &&
1908 		    ONENAND_IS_4KB_PAGE(this) &&
1909 		    ((written + thislen) < len)) {
1910 			cmd = ONENAND_CMD_2X_CACHE_PROG;
1911 			this->ongoing = 1;
1912 		}
1913 
1914 		this->command(mtd, cmd, to, mtd->writesize);
1915 
1916 		/*
1917 		 * 2 PLANE, MLC, and Flex-OneNAND wait here
1918 		 */
1919 		if (ONENAND_IS_2PLANE(this) || ONENAND_IS_4KB_PAGE(this)) {
1920 			ret = this->wait(mtd, FL_WRITING);
1921 
1922 			/* In partial page write we don't update bufferram */
1923 			onenand_update_bufferram(mtd, to, !ret && !subpage);
1924 			if (ret) {
1925 				printk(KERN_ERR "%s: write failed %d\n",
1926 					__func__, ret);
1927 				break;
1928 			}
1929 
1930 			/* Only check verify write turn on */
1931 			ret = onenand_verify(mtd, buf, to, thislen);
1932 			if (ret) {
1933 				printk(KERN_ERR "%s: verify failed %d\n",
1934 					__func__, ret);
1935 				break;
1936 			}
1937 
1938 			written += thislen;
1939 
1940 			if (written == len)
1941 				break;
1942 
1943 		} else
1944 			written += thislen;
1945 
1946 		column = 0;
1947 		prev_subpage = subpage;
1948 		prev = to;
1949 		prevlen = thislen;
1950 		to += thislen;
1951 		buf += thislen;
1952 		first = 0;
1953 	}
1954 
1955 	/* In error case, clear all bufferrams */
1956 	if (written != len)
1957 		onenand_invalidate_bufferram(mtd, 0, -1);
1958 
1959 	ops->retlen = written;
1960 	ops->oobretlen = oobwritten;
1961 
1962 	return ret;
1963 }
1964 
1965 
1966 /**
1967  * onenand_write_oob_nolock - [INTERN] OneNAND write out-of-band
1968  * @param mtd		MTD device structure
1969  * @param to		offset to write to
1970  * @param len		number of bytes to write
1971  * @param retlen	pointer to variable to store the number of written bytes
1972  * @param buf		the data to write
1973  * @param mode		operation mode
1974  *
1975  * OneNAND write out-of-band
1976  */
1977 static int onenand_write_oob_nolock(struct mtd_info *mtd, loff_t to,
1978 				    struct mtd_oob_ops *ops)
1979 {
1980 	struct onenand_chip *this = mtd->priv;
1981 	int column, ret = 0, oobsize;
1982 	int written = 0, oobcmd;
1983 	u_char *oobbuf;
1984 	size_t len = ops->ooblen;
1985 	const u_char *buf = ops->oobbuf;
1986 	unsigned int mode = ops->mode;
1987 
1988 	to += ops->ooboffs;
1989 
1990 	pr_debug("%s: to = 0x%08x, len = %i\n", __func__, (unsigned int)to,
1991 			(int)len);
1992 
1993 	/* Initialize retlen, in case of early exit */
1994 	ops->oobretlen = 0;
1995 
1996 	if (mode == MTD_OPS_AUTO_OOB)
1997 		oobsize = mtd->oobavail;
1998 	else
1999 		oobsize = mtd->oobsize;
2000 
2001 	column = to & (mtd->oobsize - 1);
2002 
2003 	if (unlikely(column >= oobsize)) {
2004 		printk(KERN_ERR "%s: Attempted to start write outside oob\n",
2005 			__func__);
2006 		return -EINVAL;
2007 	}
2008 
2009 	/* For compatibility with NAND: Do not allow write past end of page */
2010 	if (unlikely(column + len > oobsize)) {
2011 		printk(KERN_ERR "%s: Attempt to write past end of page\n",
2012 			__func__);
2013 		return -EINVAL;
2014 	}
2015 
2016 	oobbuf = this->oob_buf;
2017 
2018 	oobcmd = ONENAND_IS_4KB_PAGE(this) ? ONENAND_CMD_PROG : ONENAND_CMD_PROGOOB;
2019 
2020 	/* Loop until all data write */
2021 	while (written < len) {
2022 		int thislen = min_t(int, oobsize, len - written);
2023 
2024 		cond_resched();
2025 
2026 		this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize);
2027 
2028 		/* We send data to spare ram with oobsize
2029 		 * to prevent byte access */
2030 		memset(oobbuf, 0xff, mtd->oobsize);
2031 		if (mode == MTD_OPS_AUTO_OOB)
2032 			onenand_fill_auto_oob(mtd, oobbuf, buf, column, thislen);
2033 		else
2034 			memcpy(oobbuf + column, buf, thislen);
2035 		this->write_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize);
2036 
2037 		if (ONENAND_IS_4KB_PAGE(this)) {
2038 			/* Set main area of DataRAM to 0xff*/
2039 			memset(this->page_buf, 0xff, mtd->writesize);
2040 			this->write_bufferram(mtd, ONENAND_DATARAM,
2041 					 this->page_buf, 0, mtd->writesize);
2042 		}
2043 
2044 		this->command(mtd, oobcmd, to, mtd->oobsize);
2045 
2046 		onenand_update_bufferram(mtd, to, 0);
2047 		if (ONENAND_IS_2PLANE(this)) {
2048 			ONENAND_SET_BUFFERRAM1(this);
2049 			onenand_update_bufferram(mtd, to + this->writesize, 0);
2050 		}
2051 
2052 		ret = this->wait(mtd, FL_WRITING);
2053 		if (ret) {
2054 			printk(KERN_ERR "%s: write failed %d\n", __func__, ret);
2055 			break;
2056 		}
2057 
2058 		ret = onenand_verify_oob(mtd, oobbuf, to);
2059 		if (ret) {
2060 			printk(KERN_ERR "%s: verify failed %d\n",
2061 				__func__, ret);
2062 			break;
2063 		}
2064 
2065 		written += thislen;
2066 		if (written == len)
2067 			break;
2068 
2069 		to += mtd->writesize;
2070 		buf += thislen;
2071 		column = 0;
2072 	}
2073 
2074 	ops->oobretlen = written;
2075 
2076 	return ret;
2077 }
2078 
2079 /**
2080  * onenand_write_oob - [MTD Interface] NAND write data and/or out-of-band
2081  * @param mtd:		MTD device structure
2082  * @param to:		offset to write
2083  * @param ops:		oob operation description structure
2084  */
2085 static int onenand_write_oob(struct mtd_info *mtd, loff_t to,
2086 			     struct mtd_oob_ops *ops)
2087 {
2088 	int ret;
2089 
2090 	switch (ops->mode) {
2091 	case MTD_OPS_PLACE_OOB:
2092 	case MTD_OPS_AUTO_OOB:
2093 		break;
2094 	case MTD_OPS_RAW:
2095 		/* Not implemented yet */
2096 	default:
2097 		return -EINVAL;
2098 	}
2099 
2100 	onenand_get_device(mtd, FL_WRITING);
2101 	if (ops->datbuf)
2102 		ret = onenand_write_ops_nolock(mtd, to, ops);
2103 	else
2104 		ret = onenand_write_oob_nolock(mtd, to, ops);
2105 	onenand_release_device(mtd);
2106 
2107 	return ret;
2108 }
2109 
2110 /**
2111  * onenand_block_isbad_nolock - [GENERIC] Check if a block is marked bad
2112  * @param mtd		MTD device structure
2113  * @param ofs		offset from device start
2114  * @param allowbbt	1, if its allowed to access the bbt area
2115  *
2116  * Check, if the block is bad. Either by reading the bad block table or
2117  * calling of the scan function.
2118  */
2119 static int onenand_block_isbad_nolock(struct mtd_info *mtd, loff_t ofs, int allowbbt)
2120 {
2121 	struct onenand_chip *this = mtd->priv;
2122 	struct bbm_info *bbm = this->bbm;
2123 
2124 	/* Return info from the table */
2125 	return bbm->isbad_bbt(mtd, ofs, allowbbt);
2126 }
2127 
2128 
2129 static int onenand_multiblock_erase_verify(struct mtd_info *mtd,
2130 					   struct erase_info *instr)
2131 {
2132 	struct onenand_chip *this = mtd->priv;
2133 	loff_t addr = instr->addr;
2134 	int len = instr->len;
2135 	unsigned int block_size = (1 << this->erase_shift);
2136 	int ret = 0;
2137 
2138 	while (len) {
2139 		this->command(mtd, ONENAND_CMD_ERASE_VERIFY, addr, block_size);
2140 		ret = this->wait(mtd, FL_VERIFYING_ERASE);
2141 		if (ret) {
2142 			printk(KERN_ERR "%s: Failed verify, block %d\n",
2143 			       __func__, onenand_block(this, addr));
2144 			instr->fail_addr = addr;
2145 			return -1;
2146 		}
2147 		len -= block_size;
2148 		addr += block_size;
2149 	}
2150 	return 0;
2151 }
2152 
2153 /**
2154  * onenand_multiblock_erase - [INTERN] erase block(s) using multiblock erase
2155  * @param mtd		MTD device structure
2156  * @param instr		erase instruction
2157  * @param region	erase region
2158  *
2159  * Erase one or more blocks up to 64 block at a time
2160  */
2161 static int onenand_multiblock_erase(struct mtd_info *mtd,
2162 				    struct erase_info *instr,
2163 				    unsigned int block_size)
2164 {
2165 	struct onenand_chip *this = mtd->priv;
2166 	loff_t addr = instr->addr;
2167 	int len = instr->len;
2168 	int eb_count = 0;
2169 	int ret = 0;
2170 	int bdry_block = 0;
2171 
2172 	if (ONENAND_IS_DDP(this)) {
2173 		loff_t bdry_addr = this->chipsize >> 1;
2174 		if (addr < bdry_addr && (addr + len) > bdry_addr)
2175 			bdry_block = bdry_addr >> this->erase_shift;
2176 	}
2177 
2178 	/* Pre-check bbs */
2179 	while (len) {
2180 		/* Check if we have a bad block, we do not erase bad blocks */
2181 		if (onenand_block_isbad_nolock(mtd, addr, 0)) {
2182 			printk(KERN_WARNING "%s: attempt to erase a bad block "
2183 			       "at addr 0x%012llx\n",
2184 			       __func__, (unsigned long long) addr);
2185 			return -EIO;
2186 		}
2187 		len -= block_size;
2188 		addr += block_size;
2189 	}
2190 
2191 	len = instr->len;
2192 	addr = instr->addr;
2193 
2194 	/* loop over 64 eb batches */
2195 	while (len) {
2196 		struct erase_info verify_instr = *instr;
2197 		int max_eb_count = MB_ERASE_MAX_BLK_COUNT;
2198 
2199 		verify_instr.addr = addr;
2200 		verify_instr.len = 0;
2201 
2202 		/* do not cross chip boundary */
2203 		if (bdry_block) {
2204 			int this_block = (addr >> this->erase_shift);
2205 
2206 			if (this_block < bdry_block) {
2207 				max_eb_count = min(max_eb_count,
2208 						   (bdry_block - this_block));
2209 			}
2210 		}
2211 
2212 		eb_count = 0;
2213 
2214 		while (len > block_size && eb_count < (max_eb_count - 1)) {
2215 			this->command(mtd, ONENAND_CMD_MULTIBLOCK_ERASE,
2216 				      addr, block_size);
2217 			onenand_invalidate_bufferram(mtd, addr, block_size);
2218 
2219 			ret = this->wait(mtd, FL_PREPARING_ERASE);
2220 			if (ret) {
2221 				printk(KERN_ERR "%s: Failed multiblock erase, "
2222 				       "block %d\n", __func__,
2223 				       onenand_block(this, addr));
2224 				instr->fail_addr = MTD_FAIL_ADDR_UNKNOWN;
2225 				return -EIO;
2226 			}
2227 
2228 			len -= block_size;
2229 			addr += block_size;
2230 			eb_count++;
2231 		}
2232 
2233 		/* last block of 64-eb series */
2234 		cond_resched();
2235 		this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
2236 		onenand_invalidate_bufferram(mtd, addr, block_size);
2237 
2238 		ret = this->wait(mtd, FL_ERASING);
2239 		/* Check if it is write protected */
2240 		if (ret) {
2241 			printk(KERN_ERR "%s: Failed erase, block %d\n",
2242 			       __func__, onenand_block(this, addr));
2243 			instr->fail_addr = MTD_FAIL_ADDR_UNKNOWN;
2244 			return -EIO;
2245 		}
2246 
2247 		len -= block_size;
2248 		addr += block_size;
2249 		eb_count++;
2250 
2251 		/* verify */
2252 		verify_instr.len = eb_count * block_size;
2253 		if (onenand_multiblock_erase_verify(mtd, &verify_instr)) {
2254 			instr->fail_addr = verify_instr.fail_addr;
2255 			return -EIO;
2256 		}
2257 
2258 	}
2259 	return 0;
2260 }
2261 
2262 
2263 /**
2264  * onenand_block_by_block_erase - [INTERN] erase block(s) using regular erase
2265  * @param mtd		MTD device structure
2266  * @param instr		erase instruction
2267  * @param region	erase region
2268  * @param block_size	erase block size
2269  *
2270  * Erase one or more blocks one block at a time
2271  */
2272 static int onenand_block_by_block_erase(struct mtd_info *mtd,
2273 					struct erase_info *instr,
2274 					struct mtd_erase_region_info *region,
2275 					unsigned int block_size)
2276 {
2277 	struct onenand_chip *this = mtd->priv;
2278 	loff_t addr = instr->addr;
2279 	int len = instr->len;
2280 	loff_t region_end = 0;
2281 	int ret = 0;
2282 
2283 	if (region) {
2284 		/* region is set for Flex-OneNAND */
2285 		region_end = region->offset + region->erasesize * region->numblocks;
2286 	}
2287 
2288 	/* Loop through the blocks */
2289 	while (len) {
2290 		cond_resched();
2291 
2292 		/* Check if we have a bad block, we do not erase bad blocks */
2293 		if (onenand_block_isbad_nolock(mtd, addr, 0)) {
2294 			printk(KERN_WARNING "%s: attempt to erase a bad block "
2295 					"at addr 0x%012llx\n",
2296 					__func__, (unsigned long long) addr);
2297 			return -EIO;
2298 		}
2299 
2300 		this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
2301 
2302 		onenand_invalidate_bufferram(mtd, addr, block_size);
2303 
2304 		ret = this->wait(mtd, FL_ERASING);
2305 		/* Check, if it is write protected */
2306 		if (ret) {
2307 			printk(KERN_ERR "%s: Failed erase, block %d\n",
2308 				__func__, onenand_block(this, addr));
2309 			instr->fail_addr = addr;
2310 			return -EIO;
2311 		}
2312 
2313 		len -= block_size;
2314 		addr += block_size;
2315 
2316 		if (region && addr == region_end) {
2317 			if (!len)
2318 				break;
2319 			region++;
2320 
2321 			block_size = region->erasesize;
2322 			region_end = region->offset + region->erasesize * region->numblocks;
2323 
2324 			if (len & (block_size - 1)) {
2325 				/* FIXME: This should be handled at MTD partitioning level. */
2326 				printk(KERN_ERR "%s: Unaligned address\n",
2327 					__func__);
2328 				return -EIO;
2329 			}
2330 		}
2331 	}
2332 	return 0;
2333 }
2334 
2335 /**
2336  * onenand_erase - [MTD Interface] erase block(s)
2337  * @param mtd		MTD device structure
2338  * @param instr		erase instruction
2339  *
2340  * Erase one or more blocks
2341  */
2342 static int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
2343 {
2344 	struct onenand_chip *this = mtd->priv;
2345 	unsigned int block_size;
2346 	loff_t addr = instr->addr;
2347 	loff_t len = instr->len;
2348 	int ret = 0;
2349 	struct mtd_erase_region_info *region = NULL;
2350 	loff_t region_offset = 0;
2351 
2352 	pr_debug("%s: start=0x%012llx, len=%llu\n", __func__,
2353 			(unsigned long long)instr->addr,
2354 			(unsigned long long)instr->len);
2355 
2356 	if (FLEXONENAND(this)) {
2357 		/* Find the eraseregion of this address */
2358 		int i = flexonenand_region(mtd, addr);
2359 
2360 		region = &mtd->eraseregions[i];
2361 		block_size = region->erasesize;
2362 
2363 		/* Start address within region must align on block boundary.
2364 		 * Erase region's start offset is always block start address.
2365 		 */
2366 		region_offset = region->offset;
2367 	} else
2368 		block_size = 1 << this->erase_shift;
2369 
2370 	/* Start address must align on block boundary */
2371 	if (unlikely((addr - region_offset) & (block_size - 1))) {
2372 		printk(KERN_ERR "%s: Unaligned address\n", __func__);
2373 		return -EINVAL;
2374 	}
2375 
2376 	/* Length must align on block boundary */
2377 	if (unlikely(len & (block_size - 1))) {
2378 		printk(KERN_ERR "%s: Length not block aligned\n", __func__);
2379 		return -EINVAL;
2380 	}
2381 
2382 	/* Grab the lock and see if the device is available */
2383 	onenand_get_device(mtd, FL_ERASING);
2384 
2385 	if (ONENAND_IS_4KB_PAGE(this) || region ||
2386 	    instr->len < MB_ERASE_MIN_BLK_COUNT * block_size) {
2387 		/* region is set for Flex-OneNAND (no mb erase) */
2388 		ret = onenand_block_by_block_erase(mtd, instr,
2389 						   region, block_size);
2390 	} else {
2391 		ret = onenand_multiblock_erase(mtd, instr, block_size);
2392 	}
2393 
2394 	/* Deselect and wake up anyone waiting on the device */
2395 	onenand_release_device(mtd);
2396 
2397 	return ret;
2398 }
2399 
2400 /**
2401  * onenand_sync - [MTD Interface] sync
2402  * @param mtd		MTD device structure
2403  *
2404  * Sync is actually a wait for chip ready function
2405  */
2406 static void onenand_sync(struct mtd_info *mtd)
2407 {
2408 	pr_debug("%s: called\n", __func__);
2409 
2410 	/* Grab the lock and see if the device is available */
2411 	onenand_get_device(mtd, FL_SYNCING);
2412 
2413 	/* Release it and go back */
2414 	onenand_release_device(mtd);
2415 }
2416 
2417 /**
2418  * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad
2419  * @param mtd		MTD device structure
2420  * @param ofs		offset relative to mtd start
2421  *
2422  * Check whether the block is bad
2423  */
2424 static int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs)
2425 {
2426 	int ret;
2427 
2428 	onenand_get_device(mtd, FL_READING);
2429 	ret = onenand_block_isbad_nolock(mtd, ofs, 0);
2430 	onenand_release_device(mtd);
2431 	return ret;
2432 }
2433 
2434 /**
2435  * onenand_default_block_markbad - [DEFAULT] mark a block bad
2436  * @param mtd		MTD device structure
2437  * @param ofs		offset from device start
2438  *
2439  * This is the default implementation, which can be overridden by
2440  * a hardware specific driver.
2441  */
2442 static int onenand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
2443 {
2444 	struct onenand_chip *this = mtd->priv;
2445 	struct bbm_info *bbm = this->bbm;
2446 	u_char buf[2] = {0, 0};
2447 	struct mtd_oob_ops ops = {
2448 		.mode = MTD_OPS_PLACE_OOB,
2449 		.ooblen = 2,
2450 		.oobbuf = buf,
2451 		.ooboffs = 0,
2452 	};
2453 	int block;
2454 
2455 	/* Get block number */
2456 	block = onenand_block(this, ofs);
2457         if (bbm->bbt)
2458                 bbm->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
2459 
2460         /* We write two bytes, so we don't have to mess with 16-bit access */
2461         ofs += mtd->oobsize + (bbm->badblockpos & ~0x01);
2462 	/* FIXME : What to do when marking SLC block in partition
2463 	 * 	   with MLC erasesize? For now, it is not advisable to
2464 	 *	   create partitions containing both SLC and MLC regions.
2465 	 */
2466 	return onenand_write_oob_nolock(mtd, ofs, &ops);
2467 }
2468 
2469 /**
2470  * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad
2471  * @param mtd		MTD device structure
2472  * @param ofs		offset relative to mtd start
2473  *
2474  * Mark the block as bad
2475  */
2476 static int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs)
2477 {
2478 	struct onenand_chip *this = mtd->priv;
2479 	int ret;
2480 
2481 	ret = onenand_block_isbad(mtd, ofs);
2482 	if (ret) {
2483 		/* If it was bad already, return success and do nothing */
2484 		if (ret > 0)
2485 			return 0;
2486 		return ret;
2487 	}
2488 
2489 	onenand_get_device(mtd, FL_WRITING);
2490 	ret = this->block_markbad(mtd, ofs);
2491 	onenand_release_device(mtd);
2492 	return ret;
2493 }
2494 
2495 /**
2496  * onenand_do_lock_cmd - [OneNAND Interface] Lock or unlock block(s)
2497  * @param mtd		MTD device structure
2498  * @param ofs		offset relative to mtd start
2499  * @param len		number of bytes to lock or unlock
2500  * @param cmd		lock or unlock command
2501  *
2502  * Lock or unlock one or more blocks
2503  */
2504 static int onenand_do_lock_cmd(struct mtd_info *mtd, loff_t ofs, size_t len, int cmd)
2505 {
2506 	struct onenand_chip *this = mtd->priv;
2507 	int start, end, block, value, status;
2508 	int wp_status_mask;
2509 
2510 	start = onenand_block(this, ofs);
2511 	end = onenand_block(this, ofs + len) - 1;
2512 
2513 	if (cmd == ONENAND_CMD_LOCK)
2514 		wp_status_mask = ONENAND_WP_LS;
2515 	else
2516 		wp_status_mask = ONENAND_WP_US;
2517 
2518 	/* Continuous lock scheme */
2519 	if (this->options & ONENAND_HAS_CONT_LOCK) {
2520 		/* Set start block address */
2521 		this->write_word(start, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
2522 		/* Set end block address */
2523 		this->write_word(end, this->base +  ONENAND_REG_END_BLOCK_ADDRESS);
2524 		/* Write lock command */
2525 		this->command(mtd, cmd, 0, 0);
2526 
2527 		/* There's no return value */
2528 		this->wait(mtd, FL_LOCKING);
2529 
2530 		/* Sanity check */
2531 		while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
2532 		    & ONENAND_CTRL_ONGO)
2533 			continue;
2534 
2535 		/* Check lock status */
2536 		status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
2537 		if (!(status & wp_status_mask))
2538 			printk(KERN_ERR "%s: wp status = 0x%x\n",
2539 				__func__, status);
2540 
2541 		return 0;
2542 	}
2543 
2544 	/* Block lock scheme */
2545 	for (block = start; block < end + 1; block++) {
2546 		/* Set block address */
2547 		value = onenand_block_address(this, block);
2548 		this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
2549 		/* Select DataRAM for DDP */
2550 		value = onenand_bufferram_address(this, block);
2551 		this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
2552 		/* Set start block address */
2553 		this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
2554 		/* Write lock command */
2555 		this->command(mtd, cmd, 0, 0);
2556 
2557 		/* There's no return value */
2558 		this->wait(mtd, FL_LOCKING);
2559 
2560 		/* Sanity check */
2561 		while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
2562 		    & ONENAND_CTRL_ONGO)
2563 			continue;
2564 
2565 		/* Check lock status */
2566 		status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
2567 		if (!(status & wp_status_mask))
2568 			printk(KERN_ERR "%s: block = %d, wp status = 0x%x\n",
2569 				__func__, block, status);
2570 	}
2571 
2572 	return 0;
2573 }
2574 
2575 /**
2576  * onenand_lock - [MTD Interface] Lock block(s)
2577  * @param mtd		MTD device structure
2578  * @param ofs		offset relative to mtd start
2579  * @param len		number of bytes to unlock
2580  *
2581  * Lock one or more blocks
2582  */
2583 static int onenand_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
2584 {
2585 	int ret;
2586 
2587 	onenand_get_device(mtd, FL_LOCKING);
2588 	ret = onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_LOCK);
2589 	onenand_release_device(mtd);
2590 	return ret;
2591 }
2592 
2593 /**
2594  * onenand_unlock - [MTD Interface] Unlock block(s)
2595  * @param mtd		MTD device structure
2596  * @param ofs		offset relative to mtd start
2597  * @param len		number of bytes to unlock
2598  *
2599  * Unlock one or more blocks
2600  */
2601 static int onenand_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
2602 {
2603 	int ret;
2604 
2605 	onenand_get_device(mtd, FL_LOCKING);
2606 	ret = onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK);
2607 	onenand_release_device(mtd);
2608 	return ret;
2609 }
2610 
2611 /**
2612  * onenand_check_lock_status - [OneNAND Interface] Check lock status
2613  * @param this		onenand chip data structure
2614  *
2615  * Check lock status
2616  */
2617 static int onenand_check_lock_status(struct onenand_chip *this)
2618 {
2619 	unsigned int value, block, status;
2620 	unsigned int end;
2621 
2622 	end = this->chipsize >> this->erase_shift;
2623 	for (block = 0; block < end; block++) {
2624 		/* Set block address */
2625 		value = onenand_block_address(this, block);
2626 		this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
2627 		/* Select DataRAM for DDP */
2628 		value = onenand_bufferram_address(this, block);
2629 		this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
2630 		/* Set start block address */
2631 		this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
2632 
2633 		/* Check lock status */
2634 		status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
2635 		if (!(status & ONENAND_WP_US)) {
2636 			printk(KERN_ERR "%s: block = %d, wp status = 0x%x\n",
2637 				__func__, block, status);
2638 			return 0;
2639 		}
2640 	}
2641 
2642 	return 1;
2643 }
2644 
2645 /**
2646  * onenand_unlock_all - [OneNAND Interface] unlock all blocks
2647  * @param mtd		MTD device structure
2648  *
2649  * Unlock all blocks
2650  */
2651 static void onenand_unlock_all(struct mtd_info *mtd)
2652 {
2653 	struct onenand_chip *this = mtd->priv;
2654 	loff_t ofs = 0;
2655 	loff_t len = mtd->size;
2656 
2657 	if (this->options & ONENAND_HAS_UNLOCK_ALL) {
2658 		/* Set start block address */
2659 		this->write_word(0, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
2660 		/* Write unlock command */
2661 		this->command(mtd, ONENAND_CMD_UNLOCK_ALL, 0, 0);
2662 
2663 		/* There's no return value */
2664 		this->wait(mtd, FL_LOCKING);
2665 
2666 		/* Sanity check */
2667 		while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
2668 		    & ONENAND_CTRL_ONGO)
2669 			continue;
2670 
2671 		/* Don't check lock status */
2672 		if (this->options & ONENAND_SKIP_UNLOCK_CHECK)
2673 			return;
2674 
2675 		/* Check lock status */
2676 		if (onenand_check_lock_status(this))
2677 			return;
2678 
2679 		/* Workaround for all block unlock in DDP */
2680 		if (ONENAND_IS_DDP(this) && !FLEXONENAND(this)) {
2681 			/* All blocks on another chip */
2682 			ofs = this->chipsize >> 1;
2683 			len = this->chipsize >> 1;
2684 		}
2685 	}
2686 
2687 	onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK);
2688 }
2689 
2690 #ifdef CONFIG_MTD_ONENAND_OTP
2691 
2692 /**
2693  * onenand_otp_command - Send OTP specific command to OneNAND device
2694  * @param mtd	 MTD device structure
2695  * @param cmd	 the command to be sent
2696  * @param addr	 offset to read from or write to
2697  * @param len	 number of bytes to read or write
2698  */
2699 static int onenand_otp_command(struct mtd_info *mtd, int cmd, loff_t addr,
2700 				size_t len)
2701 {
2702 	struct onenand_chip *this = mtd->priv;
2703 	int value, block, page;
2704 
2705 	/* Address translation */
2706 	switch (cmd) {
2707 	case ONENAND_CMD_OTP_ACCESS:
2708 		block = (int) (addr >> this->erase_shift);
2709 		page = -1;
2710 		break;
2711 
2712 	default:
2713 		block = (int) (addr >> this->erase_shift);
2714 		page = (int) (addr >> this->page_shift);
2715 
2716 		if (ONENAND_IS_2PLANE(this)) {
2717 			/* Make the even block number */
2718 			block &= ~1;
2719 			/* Is it the odd plane? */
2720 			if (addr & this->writesize)
2721 				block++;
2722 			page >>= 1;
2723 		}
2724 		page &= this->page_mask;
2725 		break;
2726 	}
2727 
2728 	if (block != -1) {
2729 		/* Write 'DFS, FBA' of Flash */
2730 		value = onenand_block_address(this, block);
2731 		this->write_word(value, this->base +
2732 				ONENAND_REG_START_ADDRESS1);
2733 	}
2734 
2735 	if (page != -1) {
2736 		/* Now we use page size operation */
2737 		int sectors = 4, count = 4;
2738 		int dataram;
2739 
2740 		switch (cmd) {
2741 		default:
2742 			if (ONENAND_IS_2PLANE(this) && cmd == ONENAND_CMD_PROG)
2743 				cmd = ONENAND_CMD_2X_PROG;
2744 			dataram = ONENAND_CURRENT_BUFFERRAM(this);
2745 			break;
2746 		}
2747 
2748 		/* Write 'FPA, FSA' of Flash */
2749 		value = onenand_page_address(page, sectors);
2750 		this->write_word(value, this->base +
2751 				ONENAND_REG_START_ADDRESS8);
2752 
2753 		/* Write 'BSA, BSC' of DataRAM */
2754 		value = onenand_buffer_address(dataram, sectors, count);
2755 		this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
2756 	}
2757 
2758 	/* Interrupt clear */
2759 	this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
2760 
2761 	/* Write command */
2762 	this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
2763 
2764 	return 0;
2765 }
2766 
2767 /**
2768  * onenand_otp_write_oob_nolock - [INTERN] OneNAND write out-of-band, specific to OTP
2769  * @param mtd		MTD device structure
2770  * @param to		offset to write to
2771  * @param len		number of bytes to write
2772  * @param retlen	pointer to variable to store the number of written bytes
2773  * @param buf		the data to write
2774  *
2775  * OneNAND write out-of-band only for OTP
2776  */
2777 static int onenand_otp_write_oob_nolock(struct mtd_info *mtd, loff_t to,
2778 				    struct mtd_oob_ops *ops)
2779 {
2780 	struct onenand_chip *this = mtd->priv;
2781 	int column, ret = 0, oobsize;
2782 	int written = 0;
2783 	u_char *oobbuf;
2784 	size_t len = ops->ooblen;
2785 	const u_char *buf = ops->oobbuf;
2786 	int block, value, status;
2787 
2788 	to += ops->ooboffs;
2789 
2790 	/* Initialize retlen, in case of early exit */
2791 	ops->oobretlen = 0;
2792 
2793 	oobsize = mtd->oobsize;
2794 
2795 	column = to & (mtd->oobsize - 1);
2796 
2797 	oobbuf = this->oob_buf;
2798 
2799 	/* Loop until all data write */
2800 	while (written < len) {
2801 		int thislen = min_t(int, oobsize, len - written);
2802 
2803 		cond_resched();
2804 
2805 		block = (int) (to >> this->erase_shift);
2806 		/*
2807 		 * Write 'DFS, FBA' of Flash
2808 		 * Add: F100h DQ=DFS, FBA
2809 		 */
2810 
2811 		value = onenand_block_address(this, block);
2812 		this->write_word(value, this->base +
2813 				ONENAND_REG_START_ADDRESS1);
2814 
2815 		/*
2816 		 * Select DataRAM for DDP
2817 		 * Add: F101h DQ=DBS
2818 		 */
2819 
2820 		value = onenand_bufferram_address(this, block);
2821 		this->write_word(value, this->base +
2822 				ONENAND_REG_START_ADDRESS2);
2823 		ONENAND_SET_NEXT_BUFFERRAM(this);
2824 
2825 		/*
2826 		 * Enter OTP access mode
2827 		 */
2828 		this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
2829 		this->wait(mtd, FL_OTPING);
2830 
2831 		/* We send data to spare ram with oobsize
2832 		 * to prevent byte access */
2833 		memcpy(oobbuf + column, buf, thislen);
2834 
2835 		/*
2836 		 * Write Data into DataRAM
2837 		 * Add: 8th Word
2838 		 * in sector0/spare/page0
2839 		 * DQ=XXFCh
2840 		 */
2841 		this->write_bufferram(mtd, ONENAND_SPARERAM,
2842 					oobbuf, 0, mtd->oobsize);
2843 
2844 		onenand_otp_command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize);
2845 		onenand_update_bufferram(mtd, to, 0);
2846 		if (ONENAND_IS_2PLANE(this)) {
2847 			ONENAND_SET_BUFFERRAM1(this);
2848 			onenand_update_bufferram(mtd, to + this->writesize, 0);
2849 		}
2850 
2851 		ret = this->wait(mtd, FL_WRITING);
2852 		if (ret) {
2853 			printk(KERN_ERR "%s: write failed %d\n", __func__, ret);
2854 			break;
2855 		}
2856 
2857 		/* Exit OTP access mode */
2858 		this->command(mtd, ONENAND_CMD_RESET, 0, 0);
2859 		this->wait(mtd, FL_RESETING);
2860 
2861 		status = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
2862 		status &= 0x60;
2863 
2864 		if (status == 0x60) {
2865 			printk(KERN_DEBUG "\nBLOCK\tSTATUS\n");
2866 			printk(KERN_DEBUG "1st Block\tLOCKED\n");
2867 			printk(KERN_DEBUG "OTP Block\tLOCKED\n");
2868 		} else if (status == 0x20) {
2869 			printk(KERN_DEBUG "\nBLOCK\tSTATUS\n");
2870 			printk(KERN_DEBUG "1st Block\tLOCKED\n");
2871 			printk(KERN_DEBUG "OTP Block\tUN-LOCKED\n");
2872 		} else if (status == 0x40) {
2873 			printk(KERN_DEBUG "\nBLOCK\tSTATUS\n");
2874 			printk(KERN_DEBUG "1st Block\tUN-LOCKED\n");
2875 			printk(KERN_DEBUG "OTP Block\tLOCKED\n");
2876 		} else {
2877 			printk(KERN_DEBUG "Reboot to check\n");
2878 		}
2879 
2880 		written += thislen;
2881 		if (written == len)
2882 			break;
2883 
2884 		to += mtd->writesize;
2885 		buf += thislen;
2886 		column = 0;
2887 	}
2888 
2889 	ops->oobretlen = written;
2890 
2891 	return ret;
2892 }
2893 
2894 /* Internal OTP operation */
2895 typedef int (*otp_op_t)(struct mtd_info *mtd, loff_t form, size_t len,
2896 		size_t *retlen, u_char *buf);
2897 
2898 /**
2899  * do_otp_read - [DEFAULT] Read OTP block area
2900  * @param mtd		MTD device structure
2901  * @param from		The offset to read
2902  * @param len		number of bytes to read
2903  * @param retlen	pointer to variable to store the number of readbytes
2904  * @param buf		the databuffer to put/get data
2905  *
2906  * Read OTP block area.
2907  */
2908 static int do_otp_read(struct mtd_info *mtd, loff_t from, size_t len,
2909 		size_t *retlen, u_char *buf)
2910 {
2911 	struct onenand_chip *this = mtd->priv;
2912 	struct mtd_oob_ops ops = {
2913 		.len	= len,
2914 		.ooblen	= 0,
2915 		.datbuf	= buf,
2916 		.oobbuf	= NULL,
2917 	};
2918 	int ret;
2919 
2920 	/* Enter OTP access mode */
2921 	this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
2922 	this->wait(mtd, FL_OTPING);
2923 
2924 	ret = ONENAND_IS_4KB_PAGE(this) ?
2925 		onenand_mlc_read_ops_nolock(mtd, from, &ops) :
2926 		onenand_read_ops_nolock(mtd, from, &ops);
2927 
2928 	/* Exit OTP access mode */
2929 	this->command(mtd, ONENAND_CMD_RESET, 0, 0);
2930 	this->wait(mtd, FL_RESETING);
2931 
2932 	return ret;
2933 }
2934 
2935 /**
2936  * do_otp_write - [DEFAULT] Write OTP block area
2937  * @param mtd		MTD device structure
2938  * @param to		The offset to write
2939  * @param len		number of bytes to write
2940  * @param retlen	pointer to variable to store the number of write bytes
2941  * @param buf		the databuffer to put/get data
2942  *
2943  * Write OTP block area.
2944  */
2945 static int do_otp_write(struct mtd_info *mtd, loff_t to, size_t len,
2946 		size_t *retlen, u_char *buf)
2947 {
2948 	struct onenand_chip *this = mtd->priv;
2949 	unsigned char *pbuf = buf;
2950 	int ret;
2951 	struct mtd_oob_ops ops;
2952 
2953 	/* Force buffer page aligned */
2954 	if (len < mtd->writesize) {
2955 		memcpy(this->page_buf, buf, len);
2956 		memset(this->page_buf + len, 0xff, mtd->writesize - len);
2957 		pbuf = this->page_buf;
2958 		len = mtd->writesize;
2959 	}
2960 
2961 	/* Enter OTP access mode */
2962 	this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
2963 	this->wait(mtd, FL_OTPING);
2964 
2965 	ops.len = len;
2966 	ops.ooblen = 0;
2967 	ops.datbuf = pbuf;
2968 	ops.oobbuf = NULL;
2969 	ret = onenand_write_ops_nolock(mtd, to, &ops);
2970 	*retlen = ops.retlen;
2971 
2972 	/* Exit OTP access mode */
2973 	this->command(mtd, ONENAND_CMD_RESET, 0, 0);
2974 	this->wait(mtd, FL_RESETING);
2975 
2976 	return ret;
2977 }
2978 
2979 /**
2980  * do_otp_lock - [DEFAULT] Lock OTP block area
2981  * @param mtd		MTD device structure
2982  * @param from		The offset to lock
2983  * @param len		number of bytes to lock
2984  * @param retlen	pointer to variable to store the number of lock bytes
2985  * @param buf		the databuffer to put/get data
2986  *
2987  * Lock OTP block area.
2988  */
2989 static int do_otp_lock(struct mtd_info *mtd, loff_t from, size_t len,
2990 		size_t *retlen, u_char *buf)
2991 {
2992 	struct onenand_chip *this = mtd->priv;
2993 	struct mtd_oob_ops ops;
2994 	int ret;
2995 
2996 	if (FLEXONENAND(this)) {
2997 
2998 		/* Enter OTP access mode */
2999 		this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
3000 		this->wait(mtd, FL_OTPING);
3001 		/*
3002 		 * For Flex-OneNAND, we write lock mark to 1st word of sector 4 of
3003 		 * main area of page 49.
3004 		 */
3005 		ops.len = mtd->writesize;
3006 		ops.ooblen = 0;
3007 		ops.datbuf = buf;
3008 		ops.oobbuf = NULL;
3009 		ret = onenand_write_ops_nolock(mtd, mtd->writesize * 49, &ops);
3010 		*retlen = ops.retlen;
3011 
3012 		/* Exit OTP access mode */
3013 		this->command(mtd, ONENAND_CMD_RESET, 0, 0);
3014 		this->wait(mtd, FL_RESETING);
3015 	} else {
3016 		ops.mode = MTD_OPS_PLACE_OOB;
3017 		ops.ooblen = len;
3018 		ops.oobbuf = buf;
3019 		ops.ooboffs = 0;
3020 		ret = onenand_otp_write_oob_nolock(mtd, from, &ops);
3021 		*retlen = ops.oobretlen;
3022 	}
3023 
3024 	return ret;
3025 }
3026 
3027 /**
3028  * onenand_otp_walk - [DEFAULT] Handle OTP operation
3029  * @param mtd		MTD device structure
3030  * @param from		The offset to read/write
3031  * @param len		number of bytes to read/write
3032  * @param retlen	pointer to variable to store the number of read bytes
3033  * @param buf		the databuffer to put/get data
3034  * @param action	do given action
3035  * @param mode		specify user and factory
3036  *
3037  * Handle OTP operation.
3038  */
3039 static int onenand_otp_walk(struct mtd_info *mtd, loff_t from, size_t len,
3040 			size_t *retlen, u_char *buf,
3041 			otp_op_t action, int mode)
3042 {
3043 	struct onenand_chip *this = mtd->priv;
3044 	int otp_pages;
3045 	int density;
3046 	int ret = 0;
3047 
3048 	*retlen = 0;
3049 
3050 	density = onenand_get_density(this->device_id);
3051 	if (density < ONENAND_DEVICE_DENSITY_512Mb)
3052 		otp_pages = 20;
3053 	else
3054 		otp_pages = 50;
3055 
3056 	if (mode == MTD_OTP_FACTORY) {
3057 		from += mtd->writesize * otp_pages;
3058 		otp_pages = ONENAND_PAGES_PER_BLOCK - otp_pages;
3059 	}
3060 
3061 	/* Check User/Factory boundary */
3062 	if (mode == MTD_OTP_USER) {
3063 		if (mtd->writesize * otp_pages < from + len)
3064 			return 0;
3065 	} else {
3066 		if (mtd->writesize * otp_pages <  len)
3067 			return 0;
3068 	}
3069 
3070 	onenand_get_device(mtd, FL_OTPING);
3071 	while (len > 0 && otp_pages > 0) {
3072 		if (!action) {	/* OTP Info functions */
3073 			struct otp_info *otpinfo;
3074 
3075 			len -= sizeof(struct otp_info);
3076 			if (len <= 0) {
3077 				ret = -ENOSPC;
3078 				break;
3079 			}
3080 
3081 			otpinfo = (struct otp_info *) buf;
3082 			otpinfo->start = from;
3083 			otpinfo->length = mtd->writesize;
3084 			otpinfo->locked = 0;
3085 
3086 			from += mtd->writesize;
3087 			buf += sizeof(struct otp_info);
3088 			*retlen += sizeof(struct otp_info);
3089 		} else {
3090 			size_t tmp_retlen;
3091 
3092 			ret = action(mtd, from, len, &tmp_retlen, buf);
3093 			if (ret)
3094 				break;
3095 
3096 			buf += tmp_retlen;
3097 			len -= tmp_retlen;
3098 			*retlen += tmp_retlen;
3099 
3100 		}
3101 		otp_pages--;
3102 	}
3103 	onenand_release_device(mtd);
3104 
3105 	return ret;
3106 }
3107 
3108 /**
3109  * onenand_get_fact_prot_info - [MTD Interface] Read factory OTP info
3110  * @param mtd		MTD device structure
3111  * @param len		number of bytes to read
3112  * @param retlen	pointer to variable to store the number of read bytes
3113  * @param buf		the databuffer to put/get data
3114  *
3115  * Read factory OTP info.
3116  */
3117 static int onenand_get_fact_prot_info(struct mtd_info *mtd, size_t len,
3118 				      size_t *retlen, struct otp_info *buf)
3119 {
3120 	return onenand_otp_walk(mtd, 0, len, retlen, (u_char *) buf, NULL,
3121 				MTD_OTP_FACTORY);
3122 }
3123 
3124 /**
3125  * onenand_read_fact_prot_reg - [MTD Interface] Read factory OTP area
3126  * @param mtd		MTD device structure
3127  * @param from		The offset to read
3128  * @param len		number of bytes to read
3129  * @param retlen	pointer to variable to store the number of read bytes
3130  * @param buf		the databuffer to put/get data
3131  *
3132  * Read factory OTP area.
3133  */
3134 static int onenand_read_fact_prot_reg(struct mtd_info *mtd, loff_t from,
3135 			size_t len, size_t *retlen, u_char *buf)
3136 {
3137 	return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_FACTORY);
3138 }
3139 
3140 /**
3141  * onenand_get_user_prot_info - [MTD Interface] Read user OTP info
3142  * @param mtd		MTD device structure
3143  * @param retlen	pointer to variable to store the number of read bytes
3144  * @param len		number of bytes to read
3145  * @param buf		the databuffer to put/get data
3146  *
3147  * Read user OTP info.
3148  */
3149 static int onenand_get_user_prot_info(struct mtd_info *mtd, size_t len,
3150 				      size_t *retlen, struct otp_info *buf)
3151 {
3152 	return onenand_otp_walk(mtd, 0, len, retlen, (u_char *) buf, NULL,
3153 				MTD_OTP_USER);
3154 }
3155 
3156 /**
3157  * onenand_read_user_prot_reg - [MTD Interface] Read user OTP area
3158  * @param mtd		MTD device structure
3159  * @param from		The offset to read
3160  * @param len		number of bytes to read
3161  * @param retlen	pointer to variable to store the number of read bytes
3162  * @param buf		the databuffer to put/get data
3163  *
3164  * Read user OTP area.
3165  */
3166 static int onenand_read_user_prot_reg(struct mtd_info *mtd, loff_t from,
3167 			size_t len, size_t *retlen, u_char *buf)
3168 {
3169 	return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_USER);
3170 }
3171 
3172 /**
3173  * onenand_write_user_prot_reg - [MTD Interface] Write user OTP area
3174  * @param mtd		MTD device structure
3175  * @param from		The offset to write
3176  * @param len		number of bytes to write
3177  * @param retlen	pointer to variable to store the number of write bytes
3178  * @param buf		the databuffer to put/get data
3179  *
3180  * Write user OTP area.
3181  */
3182 static int onenand_write_user_prot_reg(struct mtd_info *mtd, loff_t from,
3183 			size_t len, size_t *retlen, u_char *buf)
3184 {
3185 	return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_write, MTD_OTP_USER);
3186 }
3187 
3188 /**
3189  * onenand_lock_user_prot_reg - [MTD Interface] Lock user OTP area
3190  * @param mtd		MTD device structure
3191  * @param from		The offset to lock
3192  * @param len		number of bytes to unlock
3193  *
3194  * Write lock mark on spare area in page 0 in OTP block
3195  */
3196 static int onenand_lock_user_prot_reg(struct mtd_info *mtd, loff_t from,
3197 			size_t len)
3198 {
3199 	struct onenand_chip *this = mtd->priv;
3200 	u_char *buf = FLEXONENAND(this) ? this->page_buf : this->oob_buf;
3201 	size_t retlen;
3202 	int ret;
3203 	unsigned int otp_lock_offset = ONENAND_OTP_LOCK_OFFSET;
3204 
3205 	memset(buf, 0xff, FLEXONENAND(this) ? this->writesize
3206 						 : mtd->oobsize);
3207 	/*
3208 	 * Write lock mark to 8th word of sector0 of page0 of the spare0.
3209 	 * We write 16 bytes spare area instead of 2 bytes.
3210 	 * For Flex-OneNAND, we write lock mark to 1st word of sector 4 of
3211 	 * main area of page 49.
3212 	 */
3213 
3214 	from = 0;
3215 	len = FLEXONENAND(this) ? mtd->writesize : 16;
3216 
3217 	/*
3218 	 * Note: OTP lock operation
3219 	 *       OTP block : 0xXXFC			XX 1111 1100
3220 	 *       1st block : 0xXXF3 (If chip support)	XX 1111 0011
3221 	 *       Both      : 0xXXF0 (If chip support)	XX 1111 0000
3222 	 */
3223 	if (FLEXONENAND(this))
3224 		otp_lock_offset = FLEXONENAND_OTP_LOCK_OFFSET;
3225 
3226 	/* ONENAND_OTP_AREA | ONENAND_OTP_BLOCK0 | ONENAND_OTP_AREA_BLOCK0 */
3227 	if (otp == 1)
3228 		buf[otp_lock_offset] = 0xFC;
3229 	else if (otp == 2)
3230 		buf[otp_lock_offset] = 0xF3;
3231 	else if (otp == 3)
3232 		buf[otp_lock_offset] = 0xF0;
3233 	else if (otp != 0)
3234 		printk(KERN_DEBUG "[OneNAND] Invalid option selected for OTP\n");
3235 
3236 	ret = onenand_otp_walk(mtd, from, len, &retlen, buf, do_otp_lock, MTD_OTP_USER);
3237 
3238 	return ret ? : retlen;
3239 }
3240 
3241 #endif	/* CONFIG_MTD_ONENAND_OTP */
3242 
3243 /**
3244  * onenand_check_features - Check and set OneNAND features
3245  * @param mtd		MTD data structure
3246  *
3247  * Check and set OneNAND features
3248  * - lock scheme
3249  * - two plane
3250  */
3251 static void onenand_check_features(struct mtd_info *mtd)
3252 {
3253 	struct onenand_chip *this = mtd->priv;
3254 	unsigned int density, process, numbufs;
3255 
3256 	/* Lock scheme depends on density and process */
3257 	density = onenand_get_density(this->device_id);
3258 	process = this->version_id >> ONENAND_VERSION_PROCESS_SHIFT;
3259 	numbufs = this->read_word(this->base + ONENAND_REG_NUM_BUFFERS) >> 8;
3260 
3261 	/* Lock scheme */
3262 	switch (density) {
3263 	case ONENAND_DEVICE_DENSITY_4Gb:
3264 		if (ONENAND_IS_DDP(this))
3265 			this->options |= ONENAND_HAS_2PLANE;
3266 		else if (numbufs == 1) {
3267 			this->options |= ONENAND_HAS_4KB_PAGE;
3268 			this->options |= ONENAND_HAS_CACHE_PROGRAM;
3269 			/*
3270 			 * There are two different 4KiB pagesize chips
3271 			 * and no way to detect it by H/W config values.
3272 			 *
3273 			 * To detect the correct NOP for each chips,
3274 			 * It should check the version ID as workaround.
3275 			 *
3276 			 * Now it has as following
3277 			 * KFM4G16Q4M has NOP 4 with version ID 0x0131
3278 			 * KFM4G16Q5M has NOP 1 with versoin ID 0x013e
3279 			 */
3280 			if ((this->version_id & 0xf) == 0xe)
3281 				this->options |= ONENAND_HAS_NOP_1;
3282 		}
3283 
3284 	case ONENAND_DEVICE_DENSITY_2Gb:
3285 		/* 2Gb DDP does not have 2 plane */
3286 		if (!ONENAND_IS_DDP(this))
3287 			this->options |= ONENAND_HAS_2PLANE;
3288 		this->options |= ONENAND_HAS_UNLOCK_ALL;
3289 
3290 	case ONENAND_DEVICE_DENSITY_1Gb:
3291 		/* A-Die has all block unlock */
3292 		if (process)
3293 			this->options |= ONENAND_HAS_UNLOCK_ALL;
3294 		break;
3295 
3296 	default:
3297 		/* Some OneNAND has continuous lock scheme */
3298 		if (!process)
3299 			this->options |= ONENAND_HAS_CONT_LOCK;
3300 		break;
3301 	}
3302 
3303 	/* The MLC has 4KiB pagesize. */
3304 	if (ONENAND_IS_MLC(this))
3305 		this->options |= ONENAND_HAS_4KB_PAGE;
3306 
3307 	if (ONENAND_IS_4KB_PAGE(this))
3308 		this->options &= ~ONENAND_HAS_2PLANE;
3309 
3310 	if (FLEXONENAND(this)) {
3311 		this->options &= ~ONENAND_HAS_CONT_LOCK;
3312 		this->options |= ONENAND_HAS_UNLOCK_ALL;
3313 	}
3314 
3315 	if (this->options & ONENAND_HAS_CONT_LOCK)
3316 		printk(KERN_DEBUG "Lock scheme is Continuous Lock\n");
3317 	if (this->options & ONENAND_HAS_UNLOCK_ALL)
3318 		printk(KERN_DEBUG "Chip support all block unlock\n");
3319 	if (this->options & ONENAND_HAS_2PLANE)
3320 		printk(KERN_DEBUG "Chip has 2 plane\n");
3321 	if (this->options & ONENAND_HAS_4KB_PAGE)
3322 		printk(KERN_DEBUG "Chip has 4KiB pagesize\n");
3323 	if (this->options & ONENAND_HAS_CACHE_PROGRAM)
3324 		printk(KERN_DEBUG "Chip has cache program feature\n");
3325 }
3326 
3327 /**
3328  * onenand_print_device_info - Print device & version ID
3329  * @param device        device ID
3330  * @param version	version ID
3331  *
3332  * Print device & version ID
3333  */
3334 static void onenand_print_device_info(int device, int version)
3335 {
3336 	int vcc, demuxed, ddp, density, flexonenand;
3337 
3338         vcc = device & ONENAND_DEVICE_VCC_MASK;
3339         demuxed = device & ONENAND_DEVICE_IS_DEMUX;
3340         ddp = device & ONENAND_DEVICE_IS_DDP;
3341         density = onenand_get_density(device);
3342 	flexonenand = device & DEVICE_IS_FLEXONENAND;
3343 	printk(KERN_INFO "%s%sOneNAND%s %dMB %sV 16-bit (0x%02x)\n",
3344 		demuxed ? "" : "Muxed ",
3345 		flexonenand ? "Flex-" : "",
3346                 ddp ? "(DDP)" : "",
3347                 (16 << density),
3348                 vcc ? "2.65/3.3" : "1.8",
3349                 device);
3350 	printk(KERN_INFO "OneNAND version = 0x%04x\n", version);
3351 }
3352 
3353 static const struct onenand_manufacturers onenand_manuf_ids[] = {
3354         {ONENAND_MFR_SAMSUNG, "Samsung"},
3355 	{ONENAND_MFR_NUMONYX, "Numonyx"},
3356 };
3357 
3358 /**
3359  * onenand_check_maf - Check manufacturer ID
3360  * @param manuf         manufacturer ID
3361  *
3362  * Check manufacturer ID
3363  */
3364 static int onenand_check_maf(int manuf)
3365 {
3366 	int size = ARRAY_SIZE(onenand_manuf_ids);
3367 	char *name;
3368         int i;
3369 
3370 	for (i = 0; i < size; i++)
3371                 if (manuf == onenand_manuf_ids[i].id)
3372                         break;
3373 
3374 	if (i < size)
3375 		name = onenand_manuf_ids[i].name;
3376 	else
3377 		name = "Unknown";
3378 
3379 	printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n", name, manuf);
3380 
3381 	return (i == size);
3382 }
3383 
3384 /**
3385 * flexonenand_get_boundary	- Reads the SLC boundary
3386 * @param onenand_info		- onenand info structure
3387 **/
3388 static int flexonenand_get_boundary(struct mtd_info *mtd)
3389 {
3390 	struct onenand_chip *this = mtd->priv;
3391 	unsigned die, bdry;
3392 	int syscfg, locked;
3393 
3394 	/* Disable ECC */
3395 	syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
3396 	this->write_word((syscfg | 0x0100), this->base + ONENAND_REG_SYS_CFG1);
3397 
3398 	for (die = 0; die < this->dies; die++) {
3399 		this->command(mtd, FLEXONENAND_CMD_PI_ACCESS, die, 0);
3400 		this->wait(mtd, FL_SYNCING);
3401 
3402 		this->command(mtd, FLEXONENAND_CMD_READ_PI, die, 0);
3403 		this->wait(mtd, FL_READING);
3404 
3405 		bdry = this->read_word(this->base + ONENAND_DATARAM);
3406 		if ((bdry >> FLEXONENAND_PI_UNLOCK_SHIFT) == 3)
3407 			locked = 0;
3408 		else
3409 			locked = 1;
3410 		this->boundary[die] = bdry & FLEXONENAND_PI_MASK;
3411 
3412 		this->command(mtd, ONENAND_CMD_RESET, 0, 0);
3413 		this->wait(mtd, FL_RESETING);
3414 
3415 		printk(KERN_INFO "Die %d boundary: %d%s\n", die,
3416 		       this->boundary[die], locked ? "(Locked)" : "(Unlocked)");
3417 	}
3418 
3419 	/* Enable ECC */
3420 	this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
3421 	return 0;
3422 }
3423 
3424 /**
3425  * flexonenand_get_size - Fill up fields in onenand_chip and mtd_info
3426  * 			  boundary[], diesize[], mtd->size, mtd->erasesize
3427  * @param mtd		- MTD device structure
3428  */
3429 static void flexonenand_get_size(struct mtd_info *mtd)
3430 {
3431 	struct onenand_chip *this = mtd->priv;
3432 	int die, i, eraseshift, density;
3433 	int blksperdie, maxbdry;
3434 	loff_t ofs;
3435 
3436 	density = onenand_get_density(this->device_id);
3437 	blksperdie = ((loff_t)(16 << density) << 20) >> (this->erase_shift);
3438 	blksperdie >>= ONENAND_IS_DDP(this) ? 1 : 0;
3439 	maxbdry = blksperdie - 1;
3440 	eraseshift = this->erase_shift - 1;
3441 
3442 	mtd->numeraseregions = this->dies << 1;
3443 
3444 	/* This fills up the device boundary */
3445 	flexonenand_get_boundary(mtd);
3446 	die = ofs = 0;
3447 	i = -1;
3448 	for (; die < this->dies; die++) {
3449 		if (!die || this->boundary[die-1] != maxbdry) {
3450 			i++;
3451 			mtd->eraseregions[i].offset = ofs;
3452 			mtd->eraseregions[i].erasesize = 1 << eraseshift;
3453 			mtd->eraseregions[i].numblocks =
3454 							this->boundary[die] + 1;
3455 			ofs += mtd->eraseregions[i].numblocks << eraseshift;
3456 			eraseshift++;
3457 		} else {
3458 			mtd->numeraseregions -= 1;
3459 			mtd->eraseregions[i].numblocks +=
3460 							this->boundary[die] + 1;
3461 			ofs += (this->boundary[die] + 1) << (eraseshift - 1);
3462 		}
3463 		if (this->boundary[die] != maxbdry) {
3464 			i++;
3465 			mtd->eraseregions[i].offset = ofs;
3466 			mtd->eraseregions[i].erasesize = 1 << eraseshift;
3467 			mtd->eraseregions[i].numblocks = maxbdry ^
3468 							 this->boundary[die];
3469 			ofs += mtd->eraseregions[i].numblocks << eraseshift;
3470 			eraseshift--;
3471 		} else
3472 			mtd->numeraseregions -= 1;
3473 	}
3474 
3475 	/* Expose MLC erase size except when all blocks are SLC */
3476 	mtd->erasesize = 1 << this->erase_shift;
3477 	if (mtd->numeraseregions == 1)
3478 		mtd->erasesize >>= 1;
3479 
3480 	printk(KERN_INFO "Device has %d eraseregions\n", mtd->numeraseregions);
3481 	for (i = 0; i < mtd->numeraseregions; i++)
3482 		printk(KERN_INFO "[offset: 0x%08x, erasesize: 0x%05x,"
3483 			" numblocks: %04u]\n",
3484 			(unsigned int) mtd->eraseregions[i].offset,
3485 			mtd->eraseregions[i].erasesize,
3486 			mtd->eraseregions[i].numblocks);
3487 
3488 	for (die = 0, mtd->size = 0; die < this->dies; die++) {
3489 		this->diesize[die] = (loff_t)blksperdie << this->erase_shift;
3490 		this->diesize[die] -= (loff_t)(this->boundary[die] + 1)
3491 						 << (this->erase_shift - 1);
3492 		mtd->size += this->diesize[die];
3493 	}
3494 }
3495 
3496 /**
3497  * flexonenand_check_blocks_erased - Check if blocks are erased
3498  * @param mtd_info	- mtd info structure
3499  * @param start		- first erase block to check
3500  * @param end		- last erase block to check
3501  *
3502  * Converting an unerased block from MLC to SLC
3503  * causes byte values to change. Since both data and its ECC
3504  * have changed, reads on the block give uncorrectable error.
3505  * This might lead to the block being detected as bad.
3506  *
3507  * Avoid this by ensuring that the block to be converted is
3508  * erased.
3509  */
3510 static int flexonenand_check_blocks_erased(struct mtd_info *mtd, int start, int end)
3511 {
3512 	struct onenand_chip *this = mtd->priv;
3513 	int i, ret;
3514 	int block;
3515 	struct mtd_oob_ops ops = {
3516 		.mode = MTD_OPS_PLACE_OOB,
3517 		.ooboffs = 0,
3518 		.ooblen	= mtd->oobsize,
3519 		.datbuf	= NULL,
3520 		.oobbuf	= this->oob_buf,
3521 	};
3522 	loff_t addr;
3523 
3524 	printk(KERN_DEBUG "Check blocks from %d to %d\n", start, end);
3525 
3526 	for (block = start; block <= end; block++) {
3527 		addr = flexonenand_addr(this, block);
3528 		if (onenand_block_isbad_nolock(mtd, addr, 0))
3529 			continue;
3530 
3531 		/*
3532 		 * Since main area write results in ECC write to spare,
3533 		 * it is sufficient to check only ECC bytes for change.
3534 		 */
3535 		ret = onenand_read_oob_nolock(mtd, addr, &ops);
3536 		if (ret)
3537 			return ret;
3538 
3539 		for (i = 0; i < mtd->oobsize; i++)
3540 			if (this->oob_buf[i] != 0xff)
3541 				break;
3542 
3543 		if (i != mtd->oobsize) {
3544 			printk(KERN_WARNING "%s: Block %d not erased.\n",
3545 				__func__, block);
3546 			return 1;
3547 		}
3548 	}
3549 
3550 	return 0;
3551 }
3552 
3553 /**
3554  * flexonenand_set_boundary	- Writes the SLC boundary
3555  * @param mtd			- mtd info structure
3556  */
3557 static int flexonenand_set_boundary(struct mtd_info *mtd, int die,
3558 				    int boundary, int lock)
3559 {
3560 	struct onenand_chip *this = mtd->priv;
3561 	int ret, density, blksperdie, old, new, thisboundary;
3562 	loff_t addr;
3563 
3564 	/* Change only once for SDP Flex-OneNAND */
3565 	if (die && (!ONENAND_IS_DDP(this)))
3566 		return 0;
3567 
3568 	/* boundary value of -1 indicates no required change */
3569 	if (boundary < 0 || boundary == this->boundary[die])
3570 		return 0;
3571 
3572 	density = onenand_get_density(this->device_id);
3573 	blksperdie = ((16 << density) << 20) >> this->erase_shift;
3574 	blksperdie >>= ONENAND_IS_DDP(this) ? 1 : 0;
3575 
3576 	if (boundary >= blksperdie) {
3577 		printk(KERN_ERR "%s: Invalid boundary value. "
3578 				"Boundary not changed.\n", __func__);
3579 		return -EINVAL;
3580 	}
3581 
3582 	/* Check if converting blocks are erased */
3583 	old = this->boundary[die] + (die * this->density_mask);
3584 	new = boundary + (die * this->density_mask);
3585 	ret = flexonenand_check_blocks_erased(mtd, min(old, new) + 1, max(old, new));
3586 	if (ret) {
3587 		printk(KERN_ERR "%s: Please erase blocks "
3588 				"before boundary change\n", __func__);
3589 		return ret;
3590 	}
3591 
3592 	this->command(mtd, FLEXONENAND_CMD_PI_ACCESS, die, 0);
3593 	this->wait(mtd, FL_SYNCING);
3594 
3595 	/* Check is boundary is locked */
3596 	this->command(mtd, FLEXONENAND_CMD_READ_PI, die, 0);
3597 	this->wait(mtd, FL_READING);
3598 
3599 	thisboundary = this->read_word(this->base + ONENAND_DATARAM);
3600 	if ((thisboundary >> FLEXONENAND_PI_UNLOCK_SHIFT) != 3) {
3601 		printk(KERN_ERR "%s: boundary locked\n", __func__);
3602 		ret = 1;
3603 		goto out;
3604 	}
3605 
3606 	printk(KERN_INFO "Changing die %d boundary: %d%s\n",
3607 			die, boundary, lock ? "(Locked)" : "(Unlocked)");
3608 
3609 	addr = die ? this->diesize[0] : 0;
3610 
3611 	boundary &= FLEXONENAND_PI_MASK;
3612 	boundary |= lock ? 0 : (3 << FLEXONENAND_PI_UNLOCK_SHIFT);
3613 
3614 	this->command(mtd, ONENAND_CMD_ERASE, addr, 0);
3615 	ret = this->wait(mtd, FL_ERASING);
3616 	if (ret) {
3617 		printk(KERN_ERR "%s: Failed PI erase for Die %d\n",
3618 		       __func__, die);
3619 		goto out;
3620 	}
3621 
3622 	this->write_word(boundary, this->base + ONENAND_DATARAM);
3623 	this->command(mtd, ONENAND_CMD_PROG, addr, 0);
3624 	ret = this->wait(mtd, FL_WRITING);
3625 	if (ret) {
3626 		printk(KERN_ERR "%s: Failed PI write for Die %d\n",
3627 			__func__, die);
3628 		goto out;
3629 	}
3630 
3631 	this->command(mtd, FLEXONENAND_CMD_PI_UPDATE, die, 0);
3632 	ret = this->wait(mtd, FL_WRITING);
3633 out:
3634 	this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_REG_COMMAND);
3635 	this->wait(mtd, FL_RESETING);
3636 	if (!ret)
3637 		/* Recalculate device size on boundary change*/
3638 		flexonenand_get_size(mtd);
3639 
3640 	return ret;
3641 }
3642 
3643 /**
3644  * onenand_chip_probe - [OneNAND Interface] The generic chip probe
3645  * @param mtd		MTD device structure
3646  *
3647  * OneNAND detection method:
3648  *   Compare the values from command with ones from register
3649  */
3650 static int onenand_chip_probe(struct mtd_info *mtd)
3651 {
3652 	struct onenand_chip *this = mtd->priv;
3653 	int bram_maf_id, bram_dev_id, maf_id, dev_id;
3654 	int syscfg;
3655 
3656 	/* Save system configuration 1 */
3657 	syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
3658 	/* Clear Sync. Burst Read mode to read BootRAM */
3659 	this->write_word((syscfg & ~ONENAND_SYS_CFG1_SYNC_READ & ~ONENAND_SYS_CFG1_SYNC_WRITE), this->base + ONENAND_REG_SYS_CFG1);
3660 
3661 	/* Send the command for reading device ID from BootRAM */
3662 	this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM);
3663 
3664 	/* Read manufacturer and device IDs from BootRAM */
3665 	bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0);
3666 	bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2);
3667 
3668 	/* Reset OneNAND to read default register values */
3669 	this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM);
3670 	/* Wait reset */
3671 	this->wait(mtd, FL_RESETING);
3672 
3673 	/* Restore system configuration 1 */
3674 	this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
3675 
3676 	/* Check manufacturer ID */
3677 	if (onenand_check_maf(bram_maf_id))
3678 		return -ENXIO;
3679 
3680 	/* Read manufacturer and device IDs from Register */
3681 	maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID);
3682 	dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID);
3683 
3684 	/* Check OneNAND device */
3685 	if (maf_id != bram_maf_id || dev_id != bram_dev_id)
3686 		return -ENXIO;
3687 
3688 	return 0;
3689 }
3690 
3691 /**
3692  * onenand_probe - [OneNAND Interface] Probe the OneNAND device
3693  * @param mtd		MTD device structure
3694  */
3695 static int onenand_probe(struct mtd_info *mtd)
3696 {
3697 	struct onenand_chip *this = mtd->priv;
3698 	int dev_id, ver_id;
3699 	int density;
3700 	int ret;
3701 
3702 	ret = this->chip_probe(mtd);
3703 	if (ret)
3704 		return ret;
3705 
3706 	/* Device and version IDs from Register */
3707 	dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID);
3708 	ver_id = this->read_word(this->base + ONENAND_REG_VERSION_ID);
3709 	this->technology = this->read_word(this->base + ONENAND_REG_TECHNOLOGY);
3710 
3711 	/* Flash device information */
3712 	onenand_print_device_info(dev_id, ver_id);
3713 	this->device_id = dev_id;
3714 	this->version_id = ver_id;
3715 
3716 	/* Check OneNAND features */
3717 	onenand_check_features(mtd);
3718 
3719 	density = onenand_get_density(dev_id);
3720 	if (FLEXONENAND(this)) {
3721 		this->dies = ONENAND_IS_DDP(this) ? 2 : 1;
3722 		/* Maximum possible erase regions */
3723 		mtd->numeraseregions = this->dies << 1;
3724 		mtd->eraseregions =
3725 			kcalloc(this->dies << 1,
3726 				sizeof(struct mtd_erase_region_info),
3727 				GFP_KERNEL);
3728 		if (!mtd->eraseregions)
3729 			return -ENOMEM;
3730 	}
3731 
3732 	/*
3733 	 * For Flex-OneNAND, chipsize represents maximum possible device size.
3734 	 * mtd->size represents the actual device size.
3735 	 */
3736 	this->chipsize = (16 << density) << 20;
3737 
3738 	/* OneNAND page size & block size */
3739 	/* The data buffer size is equal to page size */
3740 	mtd->writesize = this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE);
3741 	/* We use the full BufferRAM */
3742 	if (ONENAND_IS_4KB_PAGE(this))
3743 		mtd->writesize <<= 1;
3744 
3745 	mtd->oobsize = mtd->writesize >> 5;
3746 	/* Pages per a block are always 64 in OneNAND */
3747 	mtd->erasesize = mtd->writesize << 6;
3748 	/*
3749 	 * Flex-OneNAND SLC area has 64 pages per block.
3750 	 * Flex-OneNAND MLC area has 128 pages per block.
3751 	 * Expose MLC erase size to find erase_shift and page_mask.
3752 	 */
3753 	if (FLEXONENAND(this))
3754 		mtd->erasesize <<= 1;
3755 
3756 	this->erase_shift = ffs(mtd->erasesize) - 1;
3757 	this->page_shift = ffs(mtd->writesize) - 1;
3758 	this->page_mask = (1 << (this->erase_shift - this->page_shift)) - 1;
3759 	/* Set density mask. it is used for DDP */
3760 	if (ONENAND_IS_DDP(this))
3761 		this->density_mask = this->chipsize >> (this->erase_shift + 1);
3762 	/* It's real page size */
3763 	this->writesize = mtd->writesize;
3764 
3765 	/* REVISIT: Multichip handling */
3766 
3767 	if (FLEXONENAND(this))
3768 		flexonenand_get_size(mtd);
3769 	else
3770 		mtd->size = this->chipsize;
3771 
3772 	/*
3773 	 * We emulate the 4KiB page and 256KiB erase block size
3774 	 * But oobsize is still 64 bytes.
3775 	 * It is only valid if you turn on 2X program support,
3776 	 * Otherwise it will be ignored by compiler.
3777 	 */
3778 	if (ONENAND_IS_2PLANE(this)) {
3779 		mtd->writesize <<= 1;
3780 		mtd->erasesize <<= 1;
3781 	}
3782 
3783 	return 0;
3784 }
3785 
3786 /**
3787  * onenand_suspend - [MTD Interface] Suspend the OneNAND flash
3788  * @param mtd		MTD device structure
3789  */
3790 static int onenand_suspend(struct mtd_info *mtd)
3791 {
3792 	return onenand_get_device(mtd, FL_PM_SUSPENDED);
3793 }
3794 
3795 /**
3796  * onenand_resume - [MTD Interface] Resume the OneNAND flash
3797  * @param mtd		MTD device structure
3798  */
3799 static void onenand_resume(struct mtd_info *mtd)
3800 {
3801 	struct onenand_chip *this = mtd->priv;
3802 
3803 	if (this->state == FL_PM_SUSPENDED)
3804 		onenand_release_device(mtd);
3805 	else
3806 		printk(KERN_ERR "%s: resume() called for the chip which is not "
3807 				"in suspended state\n", __func__);
3808 }
3809 
3810 /**
3811  * onenand_scan - [OneNAND Interface] Scan for the OneNAND device
3812  * @param mtd		MTD device structure
3813  * @param maxchips	Number of chips to scan for
3814  *
3815  * This fills out all the not initialized function pointers
3816  * with the defaults.
3817  * The flash ID is read and the mtd/chip structures are
3818  * filled with the appropriate values.
3819  */
3820 int onenand_scan(struct mtd_info *mtd, int maxchips)
3821 {
3822 	int i, ret;
3823 	struct onenand_chip *this = mtd->priv;
3824 
3825 	if (!this->read_word)
3826 		this->read_word = onenand_readw;
3827 	if (!this->write_word)
3828 		this->write_word = onenand_writew;
3829 
3830 	if (!this->command)
3831 		this->command = onenand_command;
3832 	if (!this->wait)
3833 		onenand_setup_wait(mtd);
3834 	if (!this->bbt_wait)
3835 		this->bbt_wait = onenand_bbt_wait;
3836 	if (!this->unlock_all)
3837 		this->unlock_all = onenand_unlock_all;
3838 
3839 	if (!this->chip_probe)
3840 		this->chip_probe = onenand_chip_probe;
3841 
3842 	if (!this->read_bufferram)
3843 		this->read_bufferram = onenand_read_bufferram;
3844 	if (!this->write_bufferram)
3845 		this->write_bufferram = onenand_write_bufferram;
3846 
3847 	if (!this->block_markbad)
3848 		this->block_markbad = onenand_default_block_markbad;
3849 	if (!this->scan_bbt)
3850 		this->scan_bbt = onenand_default_bbt;
3851 
3852 	if (onenand_probe(mtd))
3853 		return -ENXIO;
3854 
3855 	/* Set Sync. Burst Read after probing */
3856 	if (this->mmcontrol) {
3857 		printk(KERN_INFO "OneNAND Sync. Burst Read support\n");
3858 		this->read_bufferram = onenand_sync_read_bufferram;
3859 	}
3860 
3861 	/* Allocate buffers, if necessary */
3862 	if (!this->page_buf) {
3863 		this->page_buf = kzalloc(mtd->writesize, GFP_KERNEL);
3864 		if (!this->page_buf)
3865 			return -ENOMEM;
3866 #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
3867 		this->verify_buf = kzalloc(mtd->writesize, GFP_KERNEL);
3868 		if (!this->verify_buf) {
3869 			kfree(this->page_buf);
3870 			return -ENOMEM;
3871 		}
3872 #endif
3873 		this->options |= ONENAND_PAGEBUF_ALLOC;
3874 	}
3875 	if (!this->oob_buf) {
3876 		this->oob_buf = kzalloc(mtd->oobsize, GFP_KERNEL);
3877 		if (!this->oob_buf) {
3878 			if (this->options & ONENAND_PAGEBUF_ALLOC) {
3879 				this->options &= ~ONENAND_PAGEBUF_ALLOC;
3880 				kfree(this->page_buf);
3881 			}
3882 			return -ENOMEM;
3883 		}
3884 		this->options |= ONENAND_OOBBUF_ALLOC;
3885 	}
3886 
3887 	this->state = FL_READY;
3888 	init_waitqueue_head(&this->wq);
3889 	spin_lock_init(&this->chip_lock);
3890 
3891 	/*
3892 	 * Allow subpage writes up to oobsize.
3893 	 */
3894 	switch (mtd->oobsize) {
3895 	case 128:
3896 		if (FLEXONENAND(this)) {
3897 			mtd_set_ooblayout(mtd, &flexonenand_ooblayout_ops);
3898 			mtd->subpage_sft = 0;
3899 		} else {
3900 			mtd_set_ooblayout(mtd, &onenand_oob_128_ooblayout_ops);
3901 			mtd->subpage_sft = 2;
3902 		}
3903 		if (ONENAND_IS_NOP_1(this))
3904 			mtd->subpage_sft = 0;
3905 		break;
3906 	case 64:
3907 		mtd_set_ooblayout(mtd, &onenand_oob_32_64_ooblayout_ops);
3908 		mtd->subpage_sft = 2;
3909 		break;
3910 
3911 	case 32:
3912 		mtd_set_ooblayout(mtd, &onenand_oob_32_64_ooblayout_ops);
3913 		mtd->subpage_sft = 1;
3914 		break;
3915 
3916 	default:
3917 		printk(KERN_WARNING "%s: No OOB scheme defined for oobsize %d\n",
3918 			__func__, mtd->oobsize);
3919 		mtd->subpage_sft = 0;
3920 		/* To prevent kernel oops */
3921 		mtd_set_ooblayout(mtd, &onenand_oob_32_64_ooblayout_ops);
3922 		break;
3923 	}
3924 
3925 	this->subpagesize = mtd->writesize >> mtd->subpage_sft;
3926 
3927 	/*
3928 	 * The number of bytes available for a client to place data into
3929 	 * the out of band area
3930 	 */
3931 	ret = mtd_ooblayout_count_freebytes(mtd);
3932 	if (ret < 0)
3933 		ret = 0;
3934 
3935 	mtd->oobavail = ret;
3936 
3937 	mtd->ecc_strength = 1;
3938 
3939 	/* Fill in remaining MTD driver data */
3940 	mtd->type = ONENAND_IS_MLC(this) ? MTD_MLCNANDFLASH : MTD_NANDFLASH;
3941 	mtd->flags = MTD_CAP_NANDFLASH;
3942 	mtd->_erase = onenand_erase;
3943 	mtd->_point = NULL;
3944 	mtd->_unpoint = NULL;
3945 	mtd->_read_oob = onenand_read_oob;
3946 	mtd->_write_oob = onenand_write_oob;
3947 	mtd->_panic_write = onenand_panic_write;
3948 #ifdef CONFIG_MTD_ONENAND_OTP
3949 	mtd->_get_fact_prot_info = onenand_get_fact_prot_info;
3950 	mtd->_read_fact_prot_reg = onenand_read_fact_prot_reg;
3951 	mtd->_get_user_prot_info = onenand_get_user_prot_info;
3952 	mtd->_read_user_prot_reg = onenand_read_user_prot_reg;
3953 	mtd->_write_user_prot_reg = onenand_write_user_prot_reg;
3954 	mtd->_lock_user_prot_reg = onenand_lock_user_prot_reg;
3955 #endif
3956 	mtd->_sync = onenand_sync;
3957 	mtd->_lock = onenand_lock;
3958 	mtd->_unlock = onenand_unlock;
3959 	mtd->_suspend = onenand_suspend;
3960 	mtd->_resume = onenand_resume;
3961 	mtd->_block_isbad = onenand_block_isbad;
3962 	mtd->_block_markbad = onenand_block_markbad;
3963 	mtd->owner = THIS_MODULE;
3964 	mtd->writebufsize = mtd->writesize;
3965 
3966 	/* Unlock whole block */
3967 	if (!(this->options & ONENAND_SKIP_INITIAL_UNLOCKING))
3968 		this->unlock_all(mtd);
3969 
3970 	ret = this->scan_bbt(mtd);
3971 	if ((!FLEXONENAND(this)) || ret)
3972 		return ret;
3973 
3974 	/* Change Flex-OneNAND boundaries if required */
3975 	for (i = 0; i < MAX_DIES; i++)
3976 		flexonenand_set_boundary(mtd, i, flex_bdry[2 * i],
3977 						 flex_bdry[(2 * i) + 1]);
3978 
3979 	return 0;
3980 }
3981 
3982 /**
3983  * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device
3984  * @param mtd		MTD device structure
3985  */
3986 void onenand_release(struct mtd_info *mtd)
3987 {
3988 	struct onenand_chip *this = mtd->priv;
3989 
3990 	/* Deregister partitions */
3991 	mtd_device_unregister(mtd);
3992 
3993 	/* Free bad block table memory, if allocated */
3994 	if (this->bbm) {
3995 		struct bbm_info *bbm = this->bbm;
3996 		kfree(bbm->bbt);
3997 		kfree(this->bbm);
3998 	}
3999 	/* Buffers allocated by onenand_scan */
4000 	if (this->options & ONENAND_PAGEBUF_ALLOC) {
4001 		kfree(this->page_buf);
4002 #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
4003 		kfree(this->verify_buf);
4004 #endif
4005 	}
4006 	if (this->options & ONENAND_OOBBUF_ALLOC)
4007 		kfree(this->oob_buf);
4008 	kfree(mtd->eraseregions);
4009 }
4010 
4011 EXPORT_SYMBOL_GPL(onenand_scan);
4012 EXPORT_SYMBOL_GPL(onenand_release);
4013 
4014 MODULE_LICENSE("GPL");
4015 MODULE_AUTHOR("Kyungmin Park <kyungmin.park@samsung.com>");
4016 MODULE_DESCRIPTION("Generic OneNAND flash driver code");
4017