1menuconfig MTD_ONENAND 2 tristate "OneNAND Device Support" 3 depends on MTD 4 depends on HAS_IOMEM 5 help 6 This enables support for accessing all type of OneNAND flash 7 devices. 8 9if MTD_ONENAND 10 11config MTD_ONENAND_VERIFY_WRITE 12 bool "Verify OneNAND page writes" 13 help 14 This adds an extra check when data is written to the flash. The 15 OneNAND flash device internally checks only bits transitioning 16 from 1 to 0. There is a rare possibility that even though the 17 device thinks the write was successful, a bit could have been 18 flipped accidentally due to device wear or something else. 19 20config MTD_ONENAND_GENERIC 21 tristate "OneNAND Flash device via platform device driver" 22 help 23 Support for OneNAND flash via platform device driver. 24 25config MTD_ONENAND_OMAP2 26 tristate "OneNAND on OMAP2/OMAP3 support" 27 depends on ARCH_OMAP2 || ARCH_OMAP3 28 depends on OF || COMPILE_TEST 29 help 30 Support for a OneNAND flash device connected to an OMAP2/OMAP3 SoC 31 via the GPMC memory controller. 32 Enable dmaengine and gpiolib for better performance. 33 34config MTD_ONENAND_SAMSUNG 35 tristate "OneNAND on Samsung SOC controller support" 36 depends on ARCH_S3C64XX || ARCH_S5PV210 || ARCH_EXYNOS4 37 help 38 Support for a OneNAND flash device connected to an Samsung SOC. 39 S3C64XX uses command mapping method. 40 S5PC110/S5PC210 use generic OneNAND method. 41 42config MTD_ONENAND_OTP 43 bool "OneNAND OTP Support" 44 help 45 One Block of the NAND Flash Array memory is reserved as 46 a One-Time Programmable Block memory area. 47 Also, 1st Block of NAND Flash Array can be used as OTP. 48 49 The OTP block can be read, programmed and locked using the same 50 operations as any other NAND Flash Array memory block. 51 OTP block cannot be erased. 52 53 OTP block is fully-guaranteed to be a valid block. 54 55config MTD_ONENAND_2X_PROGRAM 56 bool "OneNAND 2X program support" 57 help 58 The 2X Program is an extension of Program Operation. 59 Since the device is equipped with two DataRAMs, and two-plane NAND 60 Flash memory array, these two component enables simultaneous program 61 of 4KiB. Plane1 has only even blocks such as block0, block2, block4 62 while Plane2 has only odd blocks such as block1, block3, block5. 63 So MTD regards it as 4KiB page size and 256KiB block size 64 65 Now the following chips support it. (KFXXX16Q2M) 66 Demux: KFG2G16Q2M, KFH4G16Q2M, KFW8G16Q2M, 67 Mux: KFM2G16Q2M, KFN4G16Q2M, 68 69 And more recent chips 70 71endif # MTD_ONENAND 72