xref: /openbmc/linux/drivers/mtd/maps/ichxrom.c (revision 9be08a27)
1 /*
2  * ichxrom.c
3  *
4  * Normal mappings of chips in physical memory
5  */
6 
7 #include <linux/module.h>
8 #include <linux/types.h>
9 #include <linux/kernel.h>
10 #include <linux/init.h>
11 #include <linux/slab.h>
12 #include <asm/io.h>
13 #include <linux/mtd/mtd.h>
14 #include <linux/mtd/map.h>
15 #include <linux/mtd/cfi.h>
16 #include <linux/mtd/flashchip.h>
17 #include <linux/pci.h>
18 #include <linux/pci_ids.h>
19 #include <linux/list.h>
20 
21 #define xstr(s) str(s)
22 #define str(s) #s
23 #define MOD_NAME xstr(KBUILD_BASENAME)
24 
25 #define ADDRESS_NAME_LEN 18
26 
27 #define ROM_PROBE_STEP_SIZE (64*1024) /* 64KiB */
28 
29 #define BIOS_CNTL	0x4e
30 #define FWH_DEC_EN1	0xE3
31 #define FWH_DEC_EN2	0xF0
32 #define FWH_SEL1	0xE8
33 #define FWH_SEL2	0xEE
34 
35 struct ichxrom_window {
36 	void __iomem* virt;
37 	unsigned long phys;
38 	unsigned long size;
39 	struct list_head maps;
40 	struct resource rsrc;
41 	struct pci_dev *pdev;
42 };
43 
44 struct ichxrom_map_info {
45 	struct list_head list;
46 	struct map_info map;
47 	struct mtd_info *mtd;
48 	struct resource rsrc;
49 	char map_name[sizeof(MOD_NAME) + 2 + ADDRESS_NAME_LEN];
50 };
51 
52 static struct ichxrom_window ichxrom_window = {
53 	.maps = LIST_HEAD_INIT(ichxrom_window.maps),
54 };
55 
56 static void ichxrom_cleanup(struct ichxrom_window *window)
57 {
58 	struct ichxrom_map_info *map, *scratch;
59 	u16 word;
60 	int ret;
61 
62 	/* Disable writes through the rom window */
63 	ret = pci_read_config_word(window->pdev, BIOS_CNTL, &word);
64 	if (!ret)
65 		pci_write_config_word(window->pdev, BIOS_CNTL, word & ~1);
66 	pci_dev_put(window->pdev);
67 
68 	/* Free all of the mtd devices */
69 	list_for_each_entry_safe(map, scratch, &window->maps, list) {
70 		if (map->rsrc.parent)
71 			release_resource(&map->rsrc);
72 		mtd_device_unregister(map->mtd);
73 		map_destroy(map->mtd);
74 		list_del(&map->list);
75 		kfree(map);
76 	}
77 	if (window->rsrc.parent)
78 		release_resource(&window->rsrc);
79 	if (window->virt) {
80 		iounmap(window->virt);
81 		window->virt = NULL;
82 		window->phys = 0;
83 		window->size = 0;
84 		window->pdev = NULL;
85 	}
86 }
87 
88 
89 static int __init ichxrom_init_one(struct pci_dev *pdev,
90 				   const struct pci_device_id *ent)
91 {
92 	static char *rom_probe_types[] = { "cfi_probe", "jedec_probe", NULL };
93 	struct ichxrom_window *window = &ichxrom_window;
94 	struct ichxrom_map_info *map = NULL;
95 	unsigned long map_top;
96 	u8 byte;
97 	u16 word;
98 
99 	/* For now I just handle the ichx and I assume there
100 	 * are not a lot of resources up at the top of the address
101 	 * space.  It is possible to handle other devices in the
102 	 * top 16MB but it is very painful.  Also since
103 	 * you can only really attach a FWH to an ICHX there
104 	 * a number of simplifications you can make.
105 	 *
106 	 * Also you can page firmware hubs if an 8MB window isn't enough
107 	 * but don't currently handle that case either.
108 	 */
109 	window->pdev = pdev;
110 
111 	/* Find a region continuous to the end of the ROM window  */
112 	window->phys = 0;
113 	pci_read_config_byte(pdev, FWH_DEC_EN1, &byte);
114 	if (byte == 0xff) {
115 		window->phys = 0xffc00000;
116 		pci_read_config_byte(pdev, FWH_DEC_EN2, &byte);
117 		if ((byte & 0x0f) == 0x0f) {
118 			window->phys = 0xff400000;
119 		}
120 		else if ((byte & 0x0e) == 0x0e) {
121 			window->phys = 0xff500000;
122 		}
123 		else if ((byte & 0x0c) == 0x0c) {
124 			window->phys = 0xff600000;
125 		}
126 		else if ((byte & 0x08) == 0x08) {
127 			window->phys = 0xff700000;
128 		}
129 	}
130 	else if ((byte & 0xfe) == 0xfe) {
131 		window->phys = 0xffc80000;
132 	}
133 	else if ((byte & 0xfc) == 0xfc) {
134 		window->phys = 0xffd00000;
135 	}
136 	else if ((byte & 0xf8) == 0xf8) {
137 		window->phys = 0xffd80000;
138 	}
139 	else if ((byte & 0xf0) == 0xf0) {
140 		window->phys = 0xffe00000;
141 	}
142 	else if ((byte & 0xe0) == 0xe0) {
143 		window->phys = 0xffe80000;
144 	}
145 	else if ((byte & 0xc0) == 0xc0) {
146 		window->phys = 0xfff00000;
147 	}
148 	else if ((byte & 0x80) == 0x80) {
149 		window->phys = 0xfff80000;
150 	}
151 
152 	if (window->phys == 0) {
153 		printk(KERN_ERR MOD_NAME ": Rom window is closed\n");
154 		goto out;
155 	}
156 	window->phys -= 0x400000UL;
157 	window->size = (0xffffffffUL - window->phys) + 1UL;
158 
159 	/* Enable writes through the rom window */
160 	pci_read_config_word(pdev, BIOS_CNTL, &word);
161 	if (!(word & 1)  && (word & (1<<1))) {
162 		/* The BIOS will generate an error if I enable
163 		 * this device, so don't even try.
164 		 */
165 		printk(KERN_ERR MOD_NAME ": firmware access control, I can't enable writes\n");
166 		goto out;
167 	}
168 	pci_write_config_word(pdev, BIOS_CNTL, word | 1);
169 
170 	/*
171 	 * Try to reserve the window mem region.  If this fails then
172 	 * it is likely due to the window being "reserved" by the BIOS.
173 	 */
174 	window->rsrc.name = MOD_NAME;
175 	window->rsrc.start = window->phys;
176 	window->rsrc.end   = window->phys + window->size - 1;
177 	window->rsrc.flags = IORESOURCE_MEM | IORESOURCE_BUSY;
178 	if (request_resource(&iomem_resource, &window->rsrc)) {
179 		window->rsrc.parent = NULL;
180 		printk(KERN_DEBUG MOD_NAME ": "
181 		       "%s(): Unable to register resource %pR - kernel bug?\n",
182 		       __func__, &window->rsrc);
183 	}
184 
185 	/* Map the firmware hub into my address space. */
186 	window->virt = ioremap_nocache(window->phys, window->size);
187 	if (!window->virt) {
188 		printk(KERN_ERR MOD_NAME ": ioremap(%08lx, %08lx) failed\n",
189 			window->phys, window->size);
190 		goto out;
191 	}
192 
193 	/* Get the first address to look for an rom chip at */
194 	map_top = window->phys;
195 	if ((window->phys & 0x3fffff) != 0) {
196 		map_top = window->phys + 0x400000;
197 	}
198 #if 1
199 	/* The probe sequence run over the firmware hub lock
200 	 * registers sets them to 0x7 (no access).
201 	 * Probe at most the last 4M of the address space.
202 	 */
203 	if (map_top < 0xffc00000) {
204 		map_top = 0xffc00000;
205 	}
206 #endif
207 	/* Loop through and look for rom chips */
208 	while((map_top - 1) < 0xffffffffUL) {
209 		struct cfi_private *cfi;
210 		unsigned long offset;
211 		int i;
212 
213 		if (!map) {
214 			map = kmalloc(sizeof(*map), GFP_KERNEL);
215 		}
216 		if (!map) {
217 			printk(KERN_ERR MOD_NAME ": kmalloc failed");
218 			goto out;
219 		}
220 		memset(map, 0, sizeof(*map));
221 		INIT_LIST_HEAD(&map->list);
222 		map->map.name = map->map_name;
223 		map->map.phys = map_top;
224 		offset = map_top - window->phys;
225 		map->map.virt = (void __iomem *)
226 			(((unsigned long)(window->virt)) + offset);
227 		map->map.size = 0xffffffffUL - map_top + 1UL;
228 		/* Set the name of the map to the address I am trying */
229 		sprintf(map->map_name, "%s @%08Lx",
230 			MOD_NAME, (unsigned long long)map->map.phys);
231 
232 		/* Firmware hubs only use vpp when being programmed
233 		 * in a factory setting.  So in-place programming
234 		 * needs to use a different method.
235 		 */
236 		for(map->map.bankwidth = 32; map->map.bankwidth;
237 			map->map.bankwidth >>= 1)
238 		{
239 			char **probe_type;
240 			/* Skip bankwidths that are not supported */
241 			if (!map_bankwidth_supported(map->map.bankwidth))
242 				continue;
243 
244 			/* Setup the map methods */
245 			simple_map_init(&map->map);
246 
247 			/* Try all of the probe methods */
248 			probe_type = rom_probe_types;
249 			for(; *probe_type; probe_type++) {
250 				map->mtd = do_map_probe(*probe_type, &map->map);
251 				if (map->mtd)
252 					goto found;
253 			}
254 		}
255 		map_top += ROM_PROBE_STEP_SIZE;
256 		continue;
257 	found:
258 		/* Trim the size if we are larger than the map */
259 		if (map->mtd->size > map->map.size) {
260 			printk(KERN_WARNING MOD_NAME
261 				" rom(%llu) larger than window(%lu). fixing...\n",
262 				(unsigned long long)map->mtd->size, map->map.size);
263 			map->mtd->size = map->map.size;
264 		}
265 		if (window->rsrc.parent) {
266 			/*
267 			 * Registering the MTD device in iomem may not be possible
268 			 * if there is a BIOS "reserved" and BUSY range.  If this
269 			 * fails then continue anyway.
270 			 */
271 			map->rsrc.name  = map->map_name;
272 			map->rsrc.start = map->map.phys;
273 			map->rsrc.end   = map->map.phys + map->mtd->size - 1;
274 			map->rsrc.flags = IORESOURCE_MEM | IORESOURCE_BUSY;
275 			if (request_resource(&window->rsrc, &map->rsrc)) {
276 				printk(KERN_ERR MOD_NAME
277 					": cannot reserve MTD resource\n");
278 				map->rsrc.parent = NULL;
279 			}
280 		}
281 
282 		/* Make the whole region visible in the map */
283 		map->map.virt = window->virt;
284 		map->map.phys = window->phys;
285 		cfi = map->map.fldrv_priv;
286 		for(i = 0; i < cfi->numchips; i++) {
287 			cfi->chips[i].start += offset;
288 		}
289 
290 		/* Now that the mtd devices is complete claim and export it */
291 		map->mtd->owner = THIS_MODULE;
292 		if (mtd_device_register(map->mtd, NULL, 0)) {
293 			map_destroy(map->mtd);
294 			map->mtd = NULL;
295 			goto out;
296 		}
297 
298 
299 		/* Calculate the new value of map_top */
300 		map_top += map->mtd->size;
301 
302 		/* File away the map structure */
303 		list_add(&map->list, &window->maps);
304 		map = NULL;
305 	}
306 
307  out:
308 	/* Free any left over map structures */
309 	kfree(map);
310 
311 	/* See if I have any map structures */
312 	if (list_empty(&window->maps)) {
313 		ichxrom_cleanup(window);
314 		return -ENODEV;
315 	}
316 	return 0;
317 }
318 
319 
320 static void ichxrom_remove_one(struct pci_dev *pdev)
321 {
322 	struct ichxrom_window *window = &ichxrom_window;
323 	ichxrom_cleanup(window);
324 }
325 
326 static const struct pci_device_id ichxrom_pci_tbl[] = {
327 	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801BA_0,
328 	  PCI_ANY_ID, PCI_ANY_ID, },
329 	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_0,
330 	  PCI_ANY_ID, PCI_ANY_ID, },
331 	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_0,
332 	  PCI_ANY_ID, PCI_ANY_ID, },
333 	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801EB_0,
334 	  PCI_ANY_ID, PCI_ANY_ID, },
335 	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB_1,
336 	  PCI_ANY_ID, PCI_ANY_ID, },
337 	{ 0, },
338 };
339 
340 #if 0
341 MODULE_DEVICE_TABLE(pci, ichxrom_pci_tbl);
342 
343 static struct pci_driver ichxrom_driver = {
344 	.name =		MOD_NAME,
345 	.id_table =	ichxrom_pci_tbl,
346 	.probe =	ichxrom_init_one,
347 	.remove =	ichxrom_remove_one,
348 };
349 #endif
350 
351 static int __init init_ichxrom(void)
352 {
353 	struct pci_dev *pdev;
354 	const struct pci_device_id *id;
355 
356 	pdev = NULL;
357 	for (id = ichxrom_pci_tbl; id->vendor; id++) {
358 		pdev = pci_get_device(id->vendor, id->device, NULL);
359 		if (pdev) {
360 			break;
361 		}
362 	}
363 	if (pdev) {
364 		return ichxrom_init_one(pdev, &ichxrom_pci_tbl[0]);
365 	}
366 	return -ENXIO;
367 #if 0
368 	return pci_register_driver(&ichxrom_driver);
369 #endif
370 }
371 
372 static void __exit cleanup_ichxrom(void)
373 {
374 	ichxrom_remove_one(ichxrom_window.pdev);
375 }
376 
377 module_init(init_ichxrom);
378 module_exit(cleanup_ichxrom);
379 
380 MODULE_LICENSE("GPL");
381 MODULE_AUTHOR("Eric Biederman <ebiederman@lnxi.com>");
382 MODULE_DESCRIPTION("MTD map driver for BIOS chips on the ICHX southbridge");
383