1 /* 2 * Atmel AT45xxx DataFlash MTD driver for lightweight SPI framework 3 * 4 * Largely derived from at91_dataflash.c: 5 * Copyright (C) 2003-2005 SAN People (Pty) Ltd 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License 9 * as published by the Free Software Foundation; either version 10 * 2 of the License, or (at your option) any later version. 11 */ 12 #include <linux/module.h> 13 #include <linux/slab.h> 14 #include <linux/delay.h> 15 #include <linux/device.h> 16 #include <linux/mutex.h> 17 #include <linux/err.h> 18 #include <linux/math64.h> 19 #include <linux/of.h> 20 #include <linux/of_device.h> 21 22 #include <linux/spi/spi.h> 23 #include <linux/spi/flash.h> 24 25 #include <linux/mtd/mtd.h> 26 #include <linux/mtd/partitions.h> 27 28 /* 29 * DataFlash is a kind of SPI flash. Most AT45 chips have two buffers in 30 * each chip, which may be used for double buffered I/O; but this driver 31 * doesn't (yet) use these for any kind of i/o overlap or prefetching. 32 * 33 * Sometimes DataFlash is packaged in MMC-format cards, although the 34 * MMC stack can't (yet?) distinguish between MMC and DataFlash 35 * protocols during enumeration. 36 */ 37 38 /* reads can bypass the buffers */ 39 #define OP_READ_CONTINUOUS 0xE8 40 #define OP_READ_PAGE 0xD2 41 42 /* group B requests can run even while status reports "busy" */ 43 #define OP_READ_STATUS 0xD7 /* group B */ 44 45 /* move data between host and buffer */ 46 #define OP_READ_BUFFER1 0xD4 /* group B */ 47 #define OP_READ_BUFFER2 0xD6 /* group B */ 48 #define OP_WRITE_BUFFER1 0x84 /* group B */ 49 #define OP_WRITE_BUFFER2 0x87 /* group B */ 50 51 /* erasing flash */ 52 #define OP_ERASE_PAGE 0x81 53 #define OP_ERASE_BLOCK 0x50 54 55 /* move data between buffer and flash */ 56 #define OP_TRANSFER_BUF1 0x53 57 #define OP_TRANSFER_BUF2 0x55 58 #define OP_MREAD_BUFFER1 0xD4 59 #define OP_MREAD_BUFFER2 0xD6 60 #define OP_MWERASE_BUFFER1 0x83 61 #define OP_MWERASE_BUFFER2 0x86 62 #define OP_MWRITE_BUFFER1 0x88 /* sector must be pre-erased */ 63 #define OP_MWRITE_BUFFER2 0x89 /* sector must be pre-erased */ 64 65 /* write to buffer, then write-erase to flash */ 66 #define OP_PROGRAM_VIA_BUF1 0x82 67 #define OP_PROGRAM_VIA_BUF2 0x85 68 69 /* compare buffer to flash */ 70 #define OP_COMPARE_BUF1 0x60 71 #define OP_COMPARE_BUF2 0x61 72 73 /* read flash to buffer, then write-erase to flash */ 74 #define OP_REWRITE_VIA_BUF1 0x58 75 #define OP_REWRITE_VIA_BUF2 0x59 76 77 /* newer chips report JEDEC manufacturer and device IDs; chip 78 * serial number and OTP bits; and per-sector writeprotect. 79 */ 80 #define OP_READ_ID 0x9F 81 #define OP_READ_SECURITY 0x77 82 #define OP_WRITE_SECURITY_REVC 0x9A 83 #define OP_WRITE_SECURITY 0x9B /* revision D */ 84 85 #define CFI_MFR_ATMEL 0x1F 86 87 #define DATAFLASH_SHIFT_EXTID 24 88 #define DATAFLASH_SHIFT_ID 40 89 90 struct dataflash { 91 u8 command[4]; 92 char name[24]; 93 94 unsigned short page_offset; /* offset in flash address */ 95 unsigned int page_size; /* of bytes per page */ 96 97 struct mutex lock; 98 struct spi_device *spi; 99 100 struct mtd_info mtd; 101 }; 102 103 #ifdef CONFIG_OF 104 static const struct of_device_id dataflash_dt_ids[] = { 105 { .compatible = "atmel,at45", }, 106 { .compatible = "atmel,dataflash", }, 107 { /* sentinel */ } 108 }; 109 MODULE_DEVICE_TABLE(of, dataflash_dt_ids); 110 #endif 111 112 /* ......................................................................... */ 113 114 /* 115 * Return the status of the DataFlash device. 116 */ 117 static inline int dataflash_status(struct spi_device *spi) 118 { 119 /* NOTE: at45db321c over 25 MHz wants to write 120 * a dummy byte after the opcode... 121 */ 122 return spi_w8r8(spi, OP_READ_STATUS); 123 } 124 125 /* 126 * Poll the DataFlash device until it is READY. 127 * This usually takes 5-20 msec or so; more for sector erase. 128 */ 129 static int dataflash_waitready(struct spi_device *spi) 130 { 131 int status; 132 133 for (;;) { 134 status = dataflash_status(spi); 135 if (status < 0) { 136 dev_dbg(&spi->dev, "status %d?\n", status); 137 status = 0; 138 } 139 140 if (status & (1 << 7)) /* RDY/nBSY */ 141 return status; 142 143 usleep_range(3000, 4000); 144 } 145 } 146 147 /* ......................................................................... */ 148 149 /* 150 * Erase pages of flash. 151 */ 152 static int dataflash_erase(struct mtd_info *mtd, struct erase_info *instr) 153 { 154 struct dataflash *priv = mtd->priv; 155 struct spi_device *spi = priv->spi; 156 struct spi_transfer x = { }; 157 struct spi_message msg; 158 unsigned blocksize = priv->page_size << 3; 159 u8 *command; 160 u32 rem; 161 162 dev_dbg(&spi->dev, "erase addr=0x%llx len 0x%llx\n", 163 (long long)instr->addr, (long long)instr->len); 164 165 div_u64_rem(instr->len, priv->page_size, &rem); 166 if (rem) 167 return -EINVAL; 168 div_u64_rem(instr->addr, priv->page_size, &rem); 169 if (rem) 170 return -EINVAL; 171 172 spi_message_init(&msg); 173 174 x.tx_buf = command = priv->command; 175 x.len = 4; 176 spi_message_add_tail(&x, &msg); 177 178 mutex_lock(&priv->lock); 179 while (instr->len > 0) { 180 unsigned int pageaddr; 181 int status; 182 int do_block; 183 184 /* Calculate flash page address; use block erase (for speed) if 185 * we're at a block boundary and need to erase the whole block. 186 */ 187 pageaddr = div_u64(instr->addr, priv->page_size); 188 do_block = (pageaddr & 0x7) == 0 && instr->len >= blocksize; 189 pageaddr = pageaddr << priv->page_offset; 190 191 command[0] = do_block ? OP_ERASE_BLOCK : OP_ERASE_PAGE; 192 command[1] = (u8)(pageaddr >> 16); 193 command[2] = (u8)(pageaddr >> 8); 194 command[3] = 0; 195 196 dev_dbg(&spi->dev, "ERASE %s: (%x) %x %x %x [%i]\n", 197 do_block ? "block" : "page", 198 command[0], command[1], command[2], command[3], 199 pageaddr); 200 201 status = spi_sync(spi, &msg); 202 (void) dataflash_waitready(spi); 203 204 if (status < 0) { 205 dev_err(&spi->dev, "erase %x, err %d\n", 206 pageaddr, status); 207 /* REVISIT: can retry instr->retries times; or 208 * giveup and instr->fail_addr = instr->addr; 209 */ 210 continue; 211 } 212 213 if (do_block) { 214 instr->addr += blocksize; 215 instr->len -= blocksize; 216 } else { 217 instr->addr += priv->page_size; 218 instr->len -= priv->page_size; 219 } 220 } 221 mutex_unlock(&priv->lock); 222 223 return 0; 224 } 225 226 /* 227 * Read from the DataFlash device. 228 * from : Start offset in flash device 229 * len : Amount to read 230 * retlen : About of data actually read 231 * buf : Buffer containing the data 232 */ 233 static int dataflash_read(struct mtd_info *mtd, loff_t from, size_t len, 234 size_t *retlen, u_char *buf) 235 { 236 struct dataflash *priv = mtd->priv; 237 struct spi_transfer x[2] = { }; 238 struct spi_message msg; 239 unsigned int addr; 240 u8 *command; 241 int status; 242 243 dev_dbg(&priv->spi->dev, "read 0x%x..0x%x\n", 244 (unsigned int)from, (unsigned int)(from + len)); 245 246 /* Calculate flash page/byte address */ 247 addr = (((unsigned)from / priv->page_size) << priv->page_offset) 248 + ((unsigned)from % priv->page_size); 249 250 command = priv->command; 251 252 dev_dbg(&priv->spi->dev, "READ: (%x) %x %x %x\n", 253 command[0], command[1], command[2], command[3]); 254 255 spi_message_init(&msg); 256 257 x[0].tx_buf = command; 258 x[0].len = 8; 259 spi_message_add_tail(&x[0], &msg); 260 261 x[1].rx_buf = buf; 262 x[1].len = len; 263 spi_message_add_tail(&x[1], &msg); 264 265 mutex_lock(&priv->lock); 266 267 /* Continuous read, max clock = f(car) which may be less than 268 * the peak rate available. Some chips support commands with 269 * fewer "don't care" bytes. Both buffers stay unchanged. 270 */ 271 command[0] = OP_READ_CONTINUOUS; 272 command[1] = (u8)(addr >> 16); 273 command[2] = (u8)(addr >> 8); 274 command[3] = (u8)(addr >> 0); 275 /* plus 4 "don't care" bytes */ 276 277 status = spi_sync(priv->spi, &msg); 278 mutex_unlock(&priv->lock); 279 280 if (status >= 0) { 281 *retlen = msg.actual_length - 8; 282 status = 0; 283 } else 284 dev_dbg(&priv->spi->dev, "read %x..%x --> %d\n", 285 (unsigned)from, (unsigned)(from + len), 286 status); 287 return status; 288 } 289 290 /* 291 * Write to the DataFlash device. 292 * to : Start offset in flash device 293 * len : Amount to write 294 * retlen : Amount of data actually written 295 * buf : Buffer containing the data 296 */ 297 static int dataflash_write(struct mtd_info *mtd, loff_t to, size_t len, 298 size_t * retlen, const u_char * buf) 299 { 300 struct dataflash *priv = mtd->priv; 301 struct spi_device *spi = priv->spi; 302 struct spi_transfer x[2] = { }; 303 struct spi_message msg; 304 unsigned int pageaddr, addr, offset, writelen; 305 size_t remaining = len; 306 u_char *writebuf = (u_char *) buf; 307 int status = -EINVAL; 308 u8 *command; 309 310 dev_dbg(&spi->dev, "write 0x%x..0x%x\n", 311 (unsigned int)to, (unsigned int)(to + len)); 312 313 spi_message_init(&msg); 314 315 x[0].tx_buf = command = priv->command; 316 x[0].len = 4; 317 spi_message_add_tail(&x[0], &msg); 318 319 pageaddr = ((unsigned)to / priv->page_size); 320 offset = ((unsigned)to % priv->page_size); 321 if (offset + len > priv->page_size) 322 writelen = priv->page_size - offset; 323 else 324 writelen = len; 325 326 mutex_lock(&priv->lock); 327 while (remaining > 0) { 328 dev_dbg(&spi->dev, "write @ %i:%i len=%i\n", 329 pageaddr, offset, writelen); 330 331 /* REVISIT: 332 * (a) each page in a sector must be rewritten at least 333 * once every 10K sibling erase/program operations. 334 * (b) for pages that are already erased, we could 335 * use WRITE+MWRITE not PROGRAM for ~30% speedup. 336 * (c) WRITE to buffer could be done while waiting for 337 * a previous MWRITE/MWERASE to complete ... 338 * (d) error handling here seems to be mostly missing. 339 * 340 * Two persistent bits per page, plus a per-sector counter, 341 * could support (a) and (b) ... we might consider using 342 * the second half of sector zero, which is just one block, 343 * to track that state. (On AT91, that sector should also 344 * support boot-from-DataFlash.) 345 */ 346 347 addr = pageaddr << priv->page_offset; 348 349 /* (1) Maybe transfer partial page to Buffer1 */ 350 if (writelen != priv->page_size) { 351 command[0] = OP_TRANSFER_BUF1; 352 command[1] = (addr & 0x00FF0000) >> 16; 353 command[2] = (addr & 0x0000FF00) >> 8; 354 command[3] = 0; 355 356 dev_dbg(&spi->dev, "TRANSFER: (%x) %x %x %x\n", 357 command[0], command[1], command[2], command[3]); 358 359 status = spi_sync(spi, &msg); 360 if (status < 0) 361 dev_dbg(&spi->dev, "xfer %u -> %d\n", 362 addr, status); 363 364 (void) dataflash_waitready(priv->spi); 365 } 366 367 /* (2) Program full page via Buffer1 */ 368 addr += offset; 369 command[0] = OP_PROGRAM_VIA_BUF1; 370 command[1] = (addr & 0x00FF0000) >> 16; 371 command[2] = (addr & 0x0000FF00) >> 8; 372 command[3] = (addr & 0x000000FF); 373 374 dev_dbg(&spi->dev, "PROGRAM: (%x) %x %x %x\n", 375 command[0], command[1], command[2], command[3]); 376 377 x[1].tx_buf = writebuf; 378 x[1].len = writelen; 379 spi_message_add_tail(x + 1, &msg); 380 status = spi_sync(spi, &msg); 381 spi_transfer_del(x + 1); 382 if (status < 0) 383 dev_dbg(&spi->dev, "pgm %u/%u -> %d\n", 384 addr, writelen, status); 385 386 (void) dataflash_waitready(priv->spi); 387 388 389 #ifdef CONFIG_MTD_DATAFLASH_WRITE_VERIFY 390 391 /* (3) Compare to Buffer1 */ 392 addr = pageaddr << priv->page_offset; 393 command[0] = OP_COMPARE_BUF1; 394 command[1] = (addr & 0x00FF0000) >> 16; 395 command[2] = (addr & 0x0000FF00) >> 8; 396 command[3] = 0; 397 398 dev_dbg(&spi->dev, "COMPARE: (%x) %x %x %x\n", 399 command[0], command[1], command[2], command[3]); 400 401 status = spi_sync(spi, &msg); 402 if (status < 0) 403 dev_dbg(&spi->dev, "compare %u -> %d\n", 404 addr, status); 405 406 status = dataflash_waitready(priv->spi); 407 408 /* Check result of the compare operation */ 409 if (status & (1 << 6)) { 410 dev_err(&spi->dev, "compare page %u, err %d\n", 411 pageaddr, status); 412 remaining = 0; 413 status = -EIO; 414 break; 415 } else 416 status = 0; 417 418 #endif /* CONFIG_MTD_DATAFLASH_WRITE_VERIFY */ 419 420 remaining = remaining - writelen; 421 pageaddr++; 422 offset = 0; 423 writebuf += writelen; 424 *retlen += writelen; 425 426 if (remaining > priv->page_size) 427 writelen = priv->page_size; 428 else 429 writelen = remaining; 430 } 431 mutex_unlock(&priv->lock); 432 433 return status; 434 } 435 436 /* ......................................................................... */ 437 438 #ifdef CONFIG_MTD_DATAFLASH_OTP 439 440 static int dataflash_get_otp_info(struct mtd_info *mtd, size_t len, 441 size_t *retlen, struct otp_info *info) 442 { 443 /* Report both blocks as identical: bytes 0..64, locked. 444 * Unless the user block changed from all-ones, we can't 445 * tell whether it's still writable; so we assume it isn't. 446 */ 447 info->start = 0; 448 info->length = 64; 449 info->locked = 1; 450 *retlen = sizeof(*info); 451 return 0; 452 } 453 454 static ssize_t otp_read(struct spi_device *spi, unsigned base, 455 u8 *buf, loff_t off, size_t len) 456 { 457 struct spi_message m; 458 size_t l; 459 u8 *scratch; 460 struct spi_transfer t; 461 int status; 462 463 if (off > 64) 464 return -EINVAL; 465 466 if ((off + len) > 64) 467 len = 64 - off; 468 469 spi_message_init(&m); 470 471 l = 4 + base + off + len; 472 scratch = kzalloc(l, GFP_KERNEL); 473 if (!scratch) 474 return -ENOMEM; 475 476 /* OUT: OP_READ_SECURITY, 3 don't-care bytes, zeroes 477 * IN: ignore 4 bytes, data bytes 0..N (max 127) 478 */ 479 scratch[0] = OP_READ_SECURITY; 480 481 memset(&t, 0, sizeof t); 482 t.tx_buf = scratch; 483 t.rx_buf = scratch; 484 t.len = l; 485 spi_message_add_tail(&t, &m); 486 487 dataflash_waitready(spi); 488 489 status = spi_sync(spi, &m); 490 if (status >= 0) { 491 memcpy(buf, scratch + 4 + base + off, len); 492 status = len; 493 } 494 495 kfree(scratch); 496 return status; 497 } 498 499 static int dataflash_read_fact_otp(struct mtd_info *mtd, 500 loff_t from, size_t len, size_t *retlen, u_char *buf) 501 { 502 struct dataflash *priv = mtd->priv; 503 int status; 504 505 /* 64 bytes, from 0..63 ... start at 64 on-chip */ 506 mutex_lock(&priv->lock); 507 status = otp_read(priv->spi, 64, buf, from, len); 508 mutex_unlock(&priv->lock); 509 510 if (status < 0) 511 return status; 512 *retlen = status; 513 return 0; 514 } 515 516 static int dataflash_read_user_otp(struct mtd_info *mtd, 517 loff_t from, size_t len, size_t *retlen, u_char *buf) 518 { 519 struct dataflash *priv = mtd->priv; 520 int status; 521 522 /* 64 bytes, from 0..63 ... start at 0 on-chip */ 523 mutex_lock(&priv->lock); 524 status = otp_read(priv->spi, 0, buf, from, len); 525 mutex_unlock(&priv->lock); 526 527 if (status < 0) 528 return status; 529 *retlen = status; 530 return 0; 531 } 532 533 static int dataflash_write_user_otp(struct mtd_info *mtd, 534 loff_t from, size_t len, size_t *retlen, u_char *buf) 535 { 536 struct spi_message m; 537 const size_t l = 4 + 64; 538 u8 *scratch; 539 struct spi_transfer t; 540 struct dataflash *priv = mtd->priv; 541 int status; 542 543 if (from >= 64) { 544 /* 545 * Attempting to write beyond the end of OTP memory, 546 * no data can be written. 547 */ 548 *retlen = 0; 549 return 0; 550 } 551 552 /* Truncate the write to fit into OTP memory. */ 553 if ((from + len) > 64) 554 len = 64 - from; 555 556 /* OUT: OP_WRITE_SECURITY, 3 zeroes, 64 data-or-zero bytes 557 * IN: ignore all 558 */ 559 scratch = kzalloc(l, GFP_KERNEL); 560 if (!scratch) 561 return -ENOMEM; 562 scratch[0] = OP_WRITE_SECURITY; 563 memcpy(scratch + 4 + from, buf, len); 564 565 spi_message_init(&m); 566 567 memset(&t, 0, sizeof t); 568 t.tx_buf = scratch; 569 t.len = l; 570 spi_message_add_tail(&t, &m); 571 572 /* Write the OTP bits, if they've not yet been written. 573 * This modifies SRAM buffer1. 574 */ 575 mutex_lock(&priv->lock); 576 dataflash_waitready(priv->spi); 577 status = spi_sync(priv->spi, &m); 578 mutex_unlock(&priv->lock); 579 580 kfree(scratch); 581 582 if (status >= 0) { 583 status = 0; 584 *retlen = len; 585 } 586 return status; 587 } 588 589 static char *otp_setup(struct mtd_info *device, char revision) 590 { 591 device->_get_fact_prot_info = dataflash_get_otp_info; 592 device->_read_fact_prot_reg = dataflash_read_fact_otp; 593 device->_get_user_prot_info = dataflash_get_otp_info; 594 device->_read_user_prot_reg = dataflash_read_user_otp; 595 596 /* rev c parts (at45db321c and at45db1281 only!) use a 597 * different write procedure; not (yet?) implemented. 598 */ 599 if (revision > 'c') 600 device->_write_user_prot_reg = dataflash_write_user_otp; 601 602 return ", OTP"; 603 } 604 605 #else 606 607 static char *otp_setup(struct mtd_info *device, char revision) 608 { 609 return " (OTP)"; 610 } 611 612 #endif 613 614 /* ......................................................................... */ 615 616 /* 617 * Register DataFlash device with MTD subsystem. 618 */ 619 static int add_dataflash_otp(struct spi_device *spi, char *name, int nr_pages, 620 int pagesize, int pageoffset, char revision) 621 { 622 struct dataflash *priv; 623 struct mtd_info *device; 624 struct flash_platform_data *pdata = dev_get_platdata(&spi->dev); 625 char *otp_tag = ""; 626 int err = 0; 627 628 priv = kzalloc(sizeof *priv, GFP_KERNEL); 629 if (!priv) 630 return -ENOMEM; 631 632 mutex_init(&priv->lock); 633 priv->spi = spi; 634 priv->page_size = pagesize; 635 priv->page_offset = pageoffset; 636 637 /* name must be usable with cmdlinepart */ 638 sprintf(priv->name, "spi%d.%d-%s", 639 spi->master->bus_num, spi->chip_select, 640 name); 641 642 device = &priv->mtd; 643 device->name = (pdata && pdata->name) ? pdata->name : priv->name; 644 device->size = nr_pages * pagesize; 645 device->erasesize = pagesize; 646 device->writesize = pagesize; 647 device->type = MTD_DATAFLASH; 648 device->flags = MTD_WRITEABLE; 649 device->_erase = dataflash_erase; 650 device->_read = dataflash_read; 651 device->_write = dataflash_write; 652 device->priv = priv; 653 654 device->dev.parent = &spi->dev; 655 mtd_set_of_node(device, spi->dev.of_node); 656 657 if (revision >= 'c') 658 otp_tag = otp_setup(device, revision); 659 660 dev_info(&spi->dev, "%s (%lld KBytes) pagesize %d bytes%s\n", 661 name, (long long)((device->size + 1023) >> 10), 662 pagesize, otp_tag); 663 spi_set_drvdata(spi, priv); 664 665 err = mtd_device_register(device, 666 pdata ? pdata->parts : NULL, 667 pdata ? pdata->nr_parts : 0); 668 669 if (!err) 670 return 0; 671 672 kfree(priv); 673 return err; 674 } 675 676 static inline int add_dataflash(struct spi_device *spi, char *name, 677 int nr_pages, int pagesize, int pageoffset) 678 { 679 return add_dataflash_otp(spi, name, nr_pages, pagesize, 680 pageoffset, 0); 681 } 682 683 struct flash_info { 684 char *name; 685 686 /* JEDEC id has a high byte of zero plus three data bytes: 687 * the manufacturer id, then a two byte device id. 688 */ 689 u64 jedec_id; 690 691 /* The size listed here is what works with OP_ERASE_PAGE. */ 692 unsigned nr_pages; 693 u16 pagesize; 694 u16 pageoffset; 695 696 u16 flags; 697 #define SUP_EXTID 0x0004 /* supports extended ID data */ 698 #define SUP_POW2PS 0x0002 /* supports 2^N byte pages */ 699 #define IS_POW2PS 0x0001 /* uses 2^N byte pages */ 700 }; 701 702 static struct flash_info dataflash_data[] = { 703 704 /* 705 * NOTE: chips with SUP_POW2PS (rev D and up) need two entries, 706 * one with IS_POW2PS and the other without. The entry with the 707 * non-2^N byte page size can't name exact chip revisions without 708 * losing backwards compatibility for cmdlinepart. 709 * 710 * These newer chips also support 128-byte security registers (with 711 * 64 bytes one-time-programmable) and software write-protection. 712 */ 713 { "AT45DB011B", 0x1f2200, 512, 264, 9, SUP_POW2PS}, 714 { "at45db011d", 0x1f2200, 512, 256, 8, SUP_POW2PS | IS_POW2PS}, 715 716 { "AT45DB021B", 0x1f2300, 1024, 264, 9, SUP_POW2PS}, 717 { "at45db021d", 0x1f2300, 1024, 256, 8, SUP_POW2PS | IS_POW2PS}, 718 719 { "AT45DB041x", 0x1f2400, 2048, 264, 9, SUP_POW2PS}, 720 { "at45db041d", 0x1f2400, 2048, 256, 8, SUP_POW2PS | IS_POW2PS}, 721 722 { "AT45DB081B", 0x1f2500, 4096, 264, 9, SUP_POW2PS}, 723 { "at45db081d", 0x1f2500, 4096, 256, 8, SUP_POW2PS | IS_POW2PS}, 724 725 { "AT45DB161x", 0x1f2600, 4096, 528, 10, SUP_POW2PS}, 726 { "at45db161d", 0x1f2600, 4096, 512, 9, SUP_POW2PS | IS_POW2PS}, 727 728 { "AT45DB321x", 0x1f2700, 8192, 528, 10, 0}, /* rev C */ 729 730 { "AT45DB321x", 0x1f2701, 8192, 528, 10, SUP_POW2PS}, 731 { "at45db321d", 0x1f2701, 8192, 512, 9, SUP_POW2PS | IS_POW2PS}, 732 733 { "AT45DB642x", 0x1f2800, 8192, 1056, 11, SUP_POW2PS}, 734 { "at45db642d", 0x1f2800, 8192, 1024, 10, SUP_POW2PS | IS_POW2PS}, 735 736 { "AT45DB641E", 0x1f28000100ULL, 32768, 264, 9, SUP_EXTID | SUP_POW2PS}, 737 { "at45db641e", 0x1f28000100ULL, 32768, 256, 8, SUP_EXTID | SUP_POW2PS | IS_POW2PS}, 738 }; 739 740 static struct flash_info *jedec_lookup(struct spi_device *spi, 741 u64 jedec, bool use_extid) 742 { 743 struct flash_info *info; 744 int status; 745 746 for (info = dataflash_data; 747 info < dataflash_data + ARRAY_SIZE(dataflash_data); 748 info++) { 749 if (use_extid && !(info->flags & SUP_EXTID)) 750 continue; 751 752 if (info->jedec_id == jedec) { 753 dev_dbg(&spi->dev, "OTP, sector protect%s\n", 754 (info->flags & SUP_POW2PS) ? 755 ", binary pagesize" : ""); 756 if (info->flags & SUP_POW2PS) { 757 status = dataflash_status(spi); 758 if (status < 0) { 759 dev_dbg(&spi->dev, "status error %d\n", 760 status); 761 return ERR_PTR(status); 762 } 763 if (status & 0x1) { 764 if (info->flags & IS_POW2PS) 765 return info; 766 } else { 767 if (!(info->flags & IS_POW2PS)) 768 return info; 769 } 770 } else 771 return info; 772 } 773 } 774 775 return ERR_PTR(-ENODEV); 776 } 777 778 static struct flash_info *jedec_probe(struct spi_device *spi) 779 { 780 int ret; 781 u8 code = OP_READ_ID; 782 u64 jedec; 783 u8 id[sizeof(jedec)] = {0}; 784 const unsigned int id_size = 5; 785 struct flash_info *info; 786 787 /* 788 * JEDEC also defines an optional "extended device information" 789 * string for after vendor-specific data, after the three bytes 790 * we use here. Supporting some chips might require using it. 791 * 792 * If the vendor ID isn't Atmel's (0x1f), assume this call failed. 793 * That's not an error; only rev C and newer chips handle it, and 794 * only Atmel sells these chips. 795 */ 796 ret = spi_write_then_read(spi, &code, 1, id, id_size); 797 if (ret < 0) { 798 dev_dbg(&spi->dev, "error %d reading JEDEC ID\n", ret); 799 return ERR_PTR(ret); 800 } 801 802 if (id[0] != CFI_MFR_ATMEL) 803 return NULL; 804 805 jedec = be64_to_cpup((__be64 *)id); 806 807 /* 808 * First, try to match device using extended device 809 * information 810 */ 811 info = jedec_lookup(spi, jedec >> DATAFLASH_SHIFT_EXTID, true); 812 if (!IS_ERR(info)) 813 return info; 814 /* 815 * If that fails, make another pass using regular ID 816 * information 817 */ 818 info = jedec_lookup(spi, jedec >> DATAFLASH_SHIFT_ID, false); 819 if (!IS_ERR(info)) 820 return info; 821 /* 822 * Treat other chips as errors ... we won't know the right page 823 * size (it might be binary) even when we can tell which density 824 * class is involved (legacy chip id scheme). 825 */ 826 dev_warn(&spi->dev, "JEDEC id %016llx not handled\n", jedec); 827 return ERR_PTR(-ENODEV); 828 } 829 830 /* 831 * Detect and initialize DataFlash device, using JEDEC IDs on newer chips 832 * or else the ID code embedded in the status bits: 833 * 834 * Device Density ID code #Pages PageSize Offset 835 * AT45DB011B 1Mbit (128K) xx0011xx (0x0c) 512 264 9 836 * AT45DB021B 2Mbit (256K) xx0101xx (0x14) 1024 264 9 837 * AT45DB041B 4Mbit (512K) xx0111xx (0x1c) 2048 264 9 838 * AT45DB081B 8Mbit (1M) xx1001xx (0x24) 4096 264 9 839 * AT45DB0161B 16Mbit (2M) xx1011xx (0x2c) 4096 528 10 840 * AT45DB0321B 32Mbit (4M) xx1101xx (0x34) 8192 528 10 841 * AT45DB0642 64Mbit (8M) xx111xxx (0x3c) 8192 1056 11 842 * AT45DB1282 128Mbit (16M) xx0100xx (0x10) 16384 1056 11 843 */ 844 static int dataflash_probe(struct spi_device *spi) 845 { 846 int status; 847 struct flash_info *info; 848 849 /* 850 * Try to detect dataflash by JEDEC ID. 851 * If it succeeds we know we have either a C or D part. 852 * D will support power of 2 pagesize option. 853 * Both support the security register, though with different 854 * write procedures. 855 */ 856 info = jedec_probe(spi); 857 if (IS_ERR(info)) 858 return PTR_ERR(info); 859 if (info != NULL) 860 return add_dataflash_otp(spi, info->name, info->nr_pages, 861 info->pagesize, info->pageoffset, 862 (info->flags & SUP_POW2PS) ? 'd' : 'c'); 863 864 /* 865 * Older chips support only legacy commands, identifing 866 * capacity using bits in the status byte. 867 */ 868 status = dataflash_status(spi); 869 if (status <= 0 || status == 0xff) { 870 dev_dbg(&spi->dev, "status error %d\n", status); 871 if (status == 0 || status == 0xff) 872 status = -ENODEV; 873 return status; 874 } 875 876 /* if there's a device there, assume it's dataflash. 877 * board setup should have set spi->max_speed_max to 878 * match f(car) for continuous reads, mode 0 or 3. 879 */ 880 switch (status & 0x3c) { 881 case 0x0c: /* 0 0 1 1 x x */ 882 status = add_dataflash(spi, "AT45DB011B", 512, 264, 9); 883 break; 884 case 0x14: /* 0 1 0 1 x x */ 885 status = add_dataflash(spi, "AT45DB021B", 1024, 264, 9); 886 break; 887 case 0x1c: /* 0 1 1 1 x x */ 888 status = add_dataflash(spi, "AT45DB041x", 2048, 264, 9); 889 break; 890 case 0x24: /* 1 0 0 1 x x */ 891 status = add_dataflash(spi, "AT45DB081B", 4096, 264, 9); 892 break; 893 case 0x2c: /* 1 0 1 1 x x */ 894 status = add_dataflash(spi, "AT45DB161x", 4096, 528, 10); 895 break; 896 case 0x34: /* 1 1 0 1 x x */ 897 status = add_dataflash(spi, "AT45DB321x", 8192, 528, 10); 898 break; 899 case 0x38: /* 1 1 1 x x x */ 900 case 0x3c: 901 status = add_dataflash(spi, "AT45DB642x", 8192, 1056, 11); 902 break; 903 /* obsolete AT45DB1282 not (yet?) supported */ 904 default: 905 dev_info(&spi->dev, "unsupported device (%x)\n", 906 status & 0x3c); 907 status = -ENODEV; 908 } 909 910 if (status < 0) 911 dev_dbg(&spi->dev, "add_dataflash --> %d\n", status); 912 913 return status; 914 } 915 916 static int dataflash_remove(struct spi_device *spi) 917 { 918 struct dataflash *flash = spi_get_drvdata(spi); 919 int status; 920 921 dev_dbg(&spi->dev, "remove\n"); 922 923 status = mtd_device_unregister(&flash->mtd); 924 if (status == 0) 925 kfree(flash); 926 return status; 927 } 928 929 static struct spi_driver dataflash_driver = { 930 .driver = { 931 .name = "mtd_dataflash", 932 .of_match_table = of_match_ptr(dataflash_dt_ids), 933 }, 934 935 .probe = dataflash_probe, 936 .remove = dataflash_remove, 937 938 /* FIXME: investigate suspend and resume... */ 939 }; 940 941 module_spi_driver(dataflash_driver); 942 943 MODULE_LICENSE("GPL"); 944 MODULE_AUTHOR("Andrew Victor, David Brownell"); 945 MODULE_DESCRIPTION("MTD DataFlash driver"); 946 MODULE_ALIAS("spi:mtd_dataflash"); 947