1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * Atmel AT45xxx DataFlash MTD driver for lightweight SPI framework
4  *
5  * Largely derived from at91_dataflash.c:
6  *  Copyright (C) 2003-2005 SAN People (Pty) Ltd
7 */
8 #include <linux/module.h>
9 #include <linux/slab.h>
10 #include <linux/delay.h>
11 #include <linux/device.h>
12 #include <linux/mutex.h>
13 #include <linux/err.h>
14 #include <linux/math64.h>
15 #include <linux/of.h>
16 #include <linux/of_device.h>
17 
18 #include <linux/spi/spi.h>
19 #include <linux/spi/flash.h>
20 
21 #include <linux/mtd/mtd.h>
22 #include <linux/mtd/partitions.h>
23 
24 /*
25  * DataFlash is a kind of SPI flash.  Most AT45 chips have two buffers in
26  * each chip, which may be used for double buffered I/O; but this driver
27  * doesn't (yet) use these for any kind of i/o overlap or prefetching.
28  *
29  * Sometimes DataFlash is packaged in MMC-format cards, although the
30  * MMC stack can't (yet?) distinguish between MMC and DataFlash
31  * protocols during enumeration.
32  */
33 
34 /* reads can bypass the buffers */
35 #define OP_READ_CONTINUOUS	0xE8
36 #define OP_READ_PAGE		0xD2
37 
38 /* group B requests can run even while status reports "busy" */
39 #define OP_READ_STATUS		0xD7	/* group B */
40 
41 /* move data between host and buffer */
42 #define OP_READ_BUFFER1		0xD4	/* group B */
43 #define OP_READ_BUFFER2		0xD6	/* group B */
44 #define OP_WRITE_BUFFER1	0x84	/* group B */
45 #define OP_WRITE_BUFFER2	0x87	/* group B */
46 
47 /* erasing flash */
48 #define OP_ERASE_PAGE		0x81
49 #define OP_ERASE_BLOCK		0x50
50 
51 /* move data between buffer and flash */
52 #define OP_TRANSFER_BUF1	0x53
53 #define OP_TRANSFER_BUF2	0x55
54 #define OP_MREAD_BUFFER1	0xD4
55 #define OP_MREAD_BUFFER2	0xD6
56 #define OP_MWERASE_BUFFER1	0x83
57 #define OP_MWERASE_BUFFER2	0x86
58 #define OP_MWRITE_BUFFER1	0x88	/* sector must be pre-erased */
59 #define OP_MWRITE_BUFFER2	0x89	/* sector must be pre-erased */
60 
61 /* write to buffer, then write-erase to flash */
62 #define OP_PROGRAM_VIA_BUF1	0x82
63 #define OP_PROGRAM_VIA_BUF2	0x85
64 
65 /* compare buffer to flash */
66 #define OP_COMPARE_BUF1		0x60
67 #define OP_COMPARE_BUF2		0x61
68 
69 /* read flash to buffer, then write-erase to flash */
70 #define OP_REWRITE_VIA_BUF1	0x58
71 #define OP_REWRITE_VIA_BUF2	0x59
72 
73 /* newer chips report JEDEC manufacturer and device IDs; chip
74  * serial number and OTP bits; and per-sector writeprotect.
75  */
76 #define OP_READ_ID		0x9F
77 #define OP_READ_SECURITY	0x77
78 #define OP_WRITE_SECURITY_REVC	0x9A
79 #define OP_WRITE_SECURITY	0x9B	/* revision D */
80 
81 #define CFI_MFR_ATMEL		0x1F
82 
83 #define DATAFLASH_SHIFT_EXTID	24
84 #define DATAFLASH_SHIFT_ID	40
85 
86 struct dataflash {
87 	u8			command[4];
88 	char			name[24];
89 
90 	unsigned short		page_offset;	/* offset in flash address */
91 	unsigned int		page_size;	/* of bytes per page */
92 
93 	struct mutex		lock;
94 	struct spi_device	*spi;
95 
96 	struct mtd_info		mtd;
97 };
98 
99 static const struct spi_device_id dataflash_dev_ids[] = {
100 	{ "at45" },
101 	{ "dataflash" },
102 	{ },
103 };
104 MODULE_DEVICE_TABLE(spi, dataflash_dev_ids);
105 
106 #ifdef CONFIG_OF
107 static const struct of_device_id dataflash_dt_ids[] = {
108 	{ .compatible = "atmel,at45", },
109 	{ .compatible = "atmel,dataflash", },
110 	{ /* sentinel */ }
111 };
112 MODULE_DEVICE_TABLE(of, dataflash_dt_ids);
113 #endif
114 
115 static const struct spi_device_id dataflash_spi_ids[] = {
116 	{ .name = "at45", },
117 	{ .name = "dataflash", },
118 	{ /* sentinel */ }
119 };
120 MODULE_DEVICE_TABLE(spi, dataflash_spi_ids);
121 
122 /* ......................................................................... */
123 
124 /*
125  * Return the status of the DataFlash device.
126  */
127 static inline int dataflash_status(struct spi_device *spi)
128 {
129 	/* NOTE:  at45db321c over 25 MHz wants to write
130 	 * a dummy byte after the opcode...
131 	 */
132 	return spi_w8r8(spi, OP_READ_STATUS);
133 }
134 
135 /*
136  * Poll the DataFlash device until it is READY.
137  * This usually takes 5-20 msec or so; more for sector erase.
138  */
139 static int dataflash_waitready(struct spi_device *spi)
140 {
141 	int	status;
142 
143 	for (;;) {
144 		status = dataflash_status(spi);
145 		if (status < 0) {
146 			dev_dbg(&spi->dev, "status %d?\n", status);
147 			status = 0;
148 		}
149 
150 		if (status & (1 << 7))	/* RDY/nBSY */
151 			return status;
152 
153 		usleep_range(3000, 4000);
154 	}
155 }
156 
157 /* ......................................................................... */
158 
159 /*
160  * Erase pages of flash.
161  */
162 static int dataflash_erase(struct mtd_info *mtd, struct erase_info *instr)
163 {
164 	struct dataflash	*priv = mtd->priv;
165 	struct spi_device	*spi = priv->spi;
166 	struct spi_transfer	x = { };
167 	struct spi_message	msg;
168 	unsigned		blocksize = priv->page_size << 3;
169 	u8			*command;
170 	u32			rem;
171 
172 	dev_dbg(&spi->dev, "erase addr=0x%llx len 0x%llx\n",
173 		(long long)instr->addr, (long long)instr->len);
174 
175 	div_u64_rem(instr->len, priv->page_size, &rem);
176 	if (rem)
177 		return -EINVAL;
178 	div_u64_rem(instr->addr, priv->page_size, &rem);
179 	if (rem)
180 		return -EINVAL;
181 
182 	spi_message_init(&msg);
183 
184 	x.tx_buf = command = priv->command;
185 	x.len = 4;
186 	spi_message_add_tail(&x, &msg);
187 
188 	mutex_lock(&priv->lock);
189 	while (instr->len > 0) {
190 		unsigned int	pageaddr;
191 		int		status;
192 		int		do_block;
193 
194 		/* Calculate flash page address; use block erase (for speed) if
195 		 * we're at a block boundary and need to erase the whole block.
196 		 */
197 		pageaddr = div_u64(instr->addr, priv->page_size);
198 		do_block = (pageaddr & 0x7) == 0 && instr->len >= blocksize;
199 		pageaddr = pageaddr << priv->page_offset;
200 
201 		command[0] = do_block ? OP_ERASE_BLOCK : OP_ERASE_PAGE;
202 		command[1] = (u8)(pageaddr >> 16);
203 		command[2] = (u8)(pageaddr >> 8);
204 		command[3] = 0;
205 
206 		dev_dbg(&spi->dev, "ERASE %s: (%x) %x %x %x [%i]\n",
207 			do_block ? "block" : "page",
208 			command[0], command[1], command[2], command[3],
209 			pageaddr);
210 
211 		status = spi_sync(spi, &msg);
212 		(void) dataflash_waitready(spi);
213 
214 		if (status < 0) {
215 			dev_err(&spi->dev, "erase %x, err %d\n",
216 				pageaddr, status);
217 			/* REVISIT:  can retry instr->retries times; or
218 			 * giveup and instr->fail_addr = instr->addr;
219 			 */
220 			continue;
221 		}
222 
223 		if (do_block) {
224 			instr->addr += blocksize;
225 			instr->len -= blocksize;
226 		} else {
227 			instr->addr += priv->page_size;
228 			instr->len -= priv->page_size;
229 		}
230 	}
231 	mutex_unlock(&priv->lock);
232 
233 	return 0;
234 }
235 
236 /*
237  * Read from the DataFlash device.
238  *   from   : Start offset in flash device
239  *   len    : Amount to read
240  *   retlen : About of data actually read
241  *   buf    : Buffer containing the data
242  */
243 static int dataflash_read(struct mtd_info *mtd, loff_t from, size_t len,
244 			       size_t *retlen, u_char *buf)
245 {
246 	struct dataflash	*priv = mtd->priv;
247 	struct spi_transfer	x[2] = { };
248 	struct spi_message	msg;
249 	unsigned int		addr;
250 	u8			*command;
251 	int			status;
252 
253 	dev_dbg(&priv->spi->dev, "read 0x%x..0x%x\n",
254 		  (unsigned int)from, (unsigned int)(from + len));
255 
256 	/* Calculate flash page/byte address */
257 	addr = (((unsigned)from / priv->page_size) << priv->page_offset)
258 		+ ((unsigned)from % priv->page_size);
259 
260 	command = priv->command;
261 
262 	dev_dbg(&priv->spi->dev, "READ: (%x) %x %x %x\n",
263 		command[0], command[1], command[2], command[3]);
264 
265 	spi_message_init(&msg);
266 
267 	x[0].tx_buf = command;
268 	x[0].len = 8;
269 	spi_message_add_tail(&x[0], &msg);
270 
271 	x[1].rx_buf = buf;
272 	x[1].len = len;
273 	spi_message_add_tail(&x[1], &msg);
274 
275 	mutex_lock(&priv->lock);
276 
277 	/* Continuous read, max clock = f(car) which may be less than
278 	 * the peak rate available.  Some chips support commands with
279 	 * fewer "don't care" bytes.  Both buffers stay unchanged.
280 	 */
281 	command[0] = OP_READ_CONTINUOUS;
282 	command[1] = (u8)(addr >> 16);
283 	command[2] = (u8)(addr >> 8);
284 	command[3] = (u8)(addr >> 0);
285 	/* plus 4 "don't care" bytes */
286 
287 	status = spi_sync(priv->spi, &msg);
288 	mutex_unlock(&priv->lock);
289 
290 	if (status >= 0) {
291 		*retlen = msg.actual_length - 8;
292 		status = 0;
293 	} else
294 		dev_dbg(&priv->spi->dev, "read %x..%x --> %d\n",
295 			(unsigned)from, (unsigned)(from + len),
296 			status);
297 	return status;
298 }
299 
300 /*
301  * Write to the DataFlash device.
302  *   to     : Start offset in flash device
303  *   len    : Amount to write
304  *   retlen : Amount of data actually written
305  *   buf    : Buffer containing the data
306  */
307 static int dataflash_write(struct mtd_info *mtd, loff_t to, size_t len,
308 				size_t * retlen, const u_char * buf)
309 {
310 	struct dataflash	*priv = mtd->priv;
311 	struct spi_device	*spi = priv->spi;
312 	struct spi_transfer	x[2] = { };
313 	struct spi_message	msg;
314 	unsigned int		pageaddr, addr, offset, writelen;
315 	size_t			remaining = len;
316 	u_char			*writebuf = (u_char *) buf;
317 	int			status = -EINVAL;
318 	u8			*command;
319 
320 	dev_dbg(&spi->dev, "write 0x%x..0x%x\n",
321 		(unsigned int)to, (unsigned int)(to + len));
322 
323 	spi_message_init(&msg);
324 
325 	x[0].tx_buf = command = priv->command;
326 	x[0].len = 4;
327 	spi_message_add_tail(&x[0], &msg);
328 
329 	pageaddr = ((unsigned)to / priv->page_size);
330 	offset = ((unsigned)to % priv->page_size);
331 	if (offset + len > priv->page_size)
332 		writelen = priv->page_size - offset;
333 	else
334 		writelen = len;
335 
336 	mutex_lock(&priv->lock);
337 	while (remaining > 0) {
338 		dev_dbg(&spi->dev, "write @ %i:%i len=%i\n",
339 			pageaddr, offset, writelen);
340 
341 		/* REVISIT:
342 		 * (a) each page in a sector must be rewritten at least
343 		 *     once every 10K sibling erase/program operations.
344 		 * (b) for pages that are already erased, we could
345 		 *     use WRITE+MWRITE not PROGRAM for ~30% speedup.
346 		 * (c) WRITE to buffer could be done while waiting for
347 		 *     a previous MWRITE/MWERASE to complete ...
348 		 * (d) error handling here seems to be mostly missing.
349 		 *
350 		 * Two persistent bits per page, plus a per-sector counter,
351 		 * could support (a) and (b) ... we might consider using
352 		 * the second half of sector zero, which is just one block,
353 		 * to track that state.  (On AT91, that sector should also
354 		 * support boot-from-DataFlash.)
355 		 */
356 
357 		addr = pageaddr << priv->page_offset;
358 
359 		/* (1) Maybe transfer partial page to Buffer1 */
360 		if (writelen != priv->page_size) {
361 			command[0] = OP_TRANSFER_BUF1;
362 			command[1] = (addr & 0x00FF0000) >> 16;
363 			command[2] = (addr & 0x0000FF00) >> 8;
364 			command[3] = 0;
365 
366 			dev_dbg(&spi->dev, "TRANSFER: (%x) %x %x %x\n",
367 				command[0], command[1], command[2], command[3]);
368 
369 			status = spi_sync(spi, &msg);
370 			if (status < 0)
371 				dev_dbg(&spi->dev, "xfer %u -> %d\n",
372 					addr, status);
373 
374 			(void) dataflash_waitready(priv->spi);
375 		}
376 
377 		/* (2) Program full page via Buffer1 */
378 		addr += offset;
379 		command[0] = OP_PROGRAM_VIA_BUF1;
380 		command[1] = (addr & 0x00FF0000) >> 16;
381 		command[2] = (addr & 0x0000FF00) >> 8;
382 		command[3] = (addr & 0x000000FF);
383 
384 		dev_dbg(&spi->dev, "PROGRAM: (%x) %x %x %x\n",
385 			command[0], command[1], command[2], command[3]);
386 
387 		x[1].tx_buf = writebuf;
388 		x[1].len = writelen;
389 		spi_message_add_tail(x + 1, &msg);
390 		status = spi_sync(spi, &msg);
391 		spi_transfer_del(x + 1);
392 		if (status < 0)
393 			dev_dbg(&spi->dev, "pgm %u/%u -> %d\n",
394 				addr, writelen, status);
395 
396 		(void) dataflash_waitready(priv->spi);
397 
398 
399 #ifdef CONFIG_MTD_DATAFLASH_WRITE_VERIFY
400 
401 		/* (3) Compare to Buffer1 */
402 		addr = pageaddr << priv->page_offset;
403 		command[0] = OP_COMPARE_BUF1;
404 		command[1] = (addr & 0x00FF0000) >> 16;
405 		command[2] = (addr & 0x0000FF00) >> 8;
406 		command[3] = 0;
407 
408 		dev_dbg(&spi->dev, "COMPARE: (%x) %x %x %x\n",
409 			command[0], command[1], command[2], command[3]);
410 
411 		status = spi_sync(spi, &msg);
412 		if (status < 0)
413 			dev_dbg(&spi->dev, "compare %u -> %d\n",
414 				addr, status);
415 
416 		status = dataflash_waitready(priv->spi);
417 
418 		/* Check result of the compare operation */
419 		if (status & (1 << 6)) {
420 			dev_err(&spi->dev, "compare page %u, err %d\n",
421 				pageaddr, status);
422 			remaining = 0;
423 			status = -EIO;
424 			break;
425 		} else
426 			status = 0;
427 
428 #endif	/* CONFIG_MTD_DATAFLASH_WRITE_VERIFY */
429 
430 		remaining = remaining - writelen;
431 		pageaddr++;
432 		offset = 0;
433 		writebuf += writelen;
434 		*retlen += writelen;
435 
436 		if (remaining > priv->page_size)
437 			writelen = priv->page_size;
438 		else
439 			writelen = remaining;
440 	}
441 	mutex_unlock(&priv->lock);
442 
443 	return status;
444 }
445 
446 /* ......................................................................... */
447 
448 #ifdef CONFIG_MTD_DATAFLASH_OTP
449 
450 static int dataflash_get_otp_info(struct mtd_info *mtd, size_t len,
451 				  size_t *retlen, struct otp_info *info)
452 {
453 	/* Report both blocks as identical:  bytes 0..64, locked.
454 	 * Unless the user block changed from all-ones, we can't
455 	 * tell whether it's still writable; so we assume it isn't.
456 	 */
457 	info->start = 0;
458 	info->length = 64;
459 	info->locked = 1;
460 	*retlen = sizeof(*info);
461 	return 0;
462 }
463 
464 static ssize_t otp_read(struct spi_device *spi, unsigned base,
465 		u8 *buf, loff_t off, size_t len)
466 {
467 	struct spi_message	m;
468 	size_t			l;
469 	u8			*scratch;
470 	struct spi_transfer	t;
471 	int			status;
472 
473 	if (off > 64)
474 		return -EINVAL;
475 
476 	if ((off + len) > 64)
477 		len = 64 - off;
478 
479 	spi_message_init(&m);
480 
481 	l = 4 + base + off + len;
482 	scratch = kzalloc(l, GFP_KERNEL);
483 	if (!scratch)
484 		return -ENOMEM;
485 
486 	/* OUT: OP_READ_SECURITY, 3 don't-care bytes, zeroes
487 	 * IN:  ignore 4 bytes, data bytes 0..N (max 127)
488 	 */
489 	scratch[0] = OP_READ_SECURITY;
490 
491 	memset(&t, 0, sizeof t);
492 	t.tx_buf = scratch;
493 	t.rx_buf = scratch;
494 	t.len = l;
495 	spi_message_add_tail(&t, &m);
496 
497 	dataflash_waitready(spi);
498 
499 	status = spi_sync(spi, &m);
500 	if (status >= 0) {
501 		memcpy(buf, scratch + 4 + base + off, len);
502 		status = len;
503 	}
504 
505 	kfree(scratch);
506 	return status;
507 }
508 
509 static int dataflash_read_fact_otp(struct mtd_info *mtd,
510 		loff_t from, size_t len, size_t *retlen, u_char *buf)
511 {
512 	struct dataflash	*priv = mtd->priv;
513 	int			status;
514 
515 	/* 64 bytes, from 0..63 ... start at 64 on-chip */
516 	mutex_lock(&priv->lock);
517 	status = otp_read(priv->spi, 64, buf, from, len);
518 	mutex_unlock(&priv->lock);
519 
520 	if (status < 0)
521 		return status;
522 	*retlen = status;
523 	return 0;
524 }
525 
526 static int dataflash_read_user_otp(struct mtd_info *mtd,
527 		loff_t from, size_t len, size_t *retlen, u_char *buf)
528 {
529 	struct dataflash	*priv = mtd->priv;
530 	int			status;
531 
532 	/* 64 bytes, from 0..63 ... start at 0 on-chip */
533 	mutex_lock(&priv->lock);
534 	status = otp_read(priv->spi, 0, buf, from, len);
535 	mutex_unlock(&priv->lock);
536 
537 	if (status < 0)
538 		return status;
539 	*retlen = status;
540 	return 0;
541 }
542 
543 static int dataflash_write_user_otp(struct mtd_info *mtd,
544 		loff_t from, size_t len, size_t *retlen, const u_char *buf)
545 {
546 	struct spi_message	m;
547 	const size_t		l = 4 + 64;
548 	u8			*scratch;
549 	struct spi_transfer	t;
550 	struct dataflash	*priv = mtd->priv;
551 	int			status;
552 
553 	if (from >= 64) {
554 		/*
555 		 * Attempting to write beyond the end of OTP memory,
556 		 * no data can be written.
557 		 */
558 		*retlen = 0;
559 		return 0;
560 	}
561 
562 	/* Truncate the write to fit into OTP memory. */
563 	if ((from + len) > 64)
564 		len = 64 - from;
565 
566 	/* OUT: OP_WRITE_SECURITY, 3 zeroes, 64 data-or-zero bytes
567 	 * IN:  ignore all
568 	 */
569 	scratch = kzalloc(l, GFP_KERNEL);
570 	if (!scratch)
571 		return -ENOMEM;
572 	scratch[0] = OP_WRITE_SECURITY;
573 	memcpy(scratch + 4 + from, buf, len);
574 
575 	spi_message_init(&m);
576 
577 	memset(&t, 0, sizeof t);
578 	t.tx_buf = scratch;
579 	t.len = l;
580 	spi_message_add_tail(&t, &m);
581 
582 	/* Write the OTP bits, if they've not yet been written.
583 	 * This modifies SRAM buffer1.
584 	 */
585 	mutex_lock(&priv->lock);
586 	dataflash_waitready(priv->spi);
587 	status = spi_sync(priv->spi, &m);
588 	mutex_unlock(&priv->lock);
589 
590 	kfree(scratch);
591 
592 	if (status >= 0) {
593 		status = 0;
594 		*retlen = len;
595 	}
596 	return status;
597 }
598 
599 static char *otp_setup(struct mtd_info *device, char revision)
600 {
601 	device->_get_fact_prot_info = dataflash_get_otp_info;
602 	device->_read_fact_prot_reg = dataflash_read_fact_otp;
603 	device->_get_user_prot_info = dataflash_get_otp_info;
604 	device->_read_user_prot_reg = dataflash_read_user_otp;
605 
606 	/* rev c parts (at45db321c and at45db1281 only!) use a
607 	 * different write procedure; not (yet?) implemented.
608 	 */
609 	if (revision > 'c')
610 		device->_write_user_prot_reg = dataflash_write_user_otp;
611 
612 	return ", OTP";
613 }
614 
615 #else
616 
617 static char *otp_setup(struct mtd_info *device, char revision)
618 {
619 	return " (OTP)";
620 }
621 
622 #endif
623 
624 /* ......................................................................... */
625 
626 /*
627  * Register DataFlash device with MTD subsystem.
628  */
629 static int add_dataflash_otp(struct spi_device *spi, char *name, int nr_pages,
630 			     int pagesize, int pageoffset, char revision)
631 {
632 	struct dataflash		*priv;
633 	struct mtd_info			*device;
634 	struct flash_platform_data	*pdata = dev_get_platdata(&spi->dev);
635 	char				*otp_tag = "";
636 	int				err = 0;
637 
638 	priv = kzalloc(sizeof *priv, GFP_KERNEL);
639 	if (!priv)
640 		return -ENOMEM;
641 
642 	mutex_init(&priv->lock);
643 	priv->spi = spi;
644 	priv->page_size = pagesize;
645 	priv->page_offset = pageoffset;
646 
647 	/* name must be usable with cmdlinepart */
648 	sprintf(priv->name, "spi%d.%d-%s",
649 			spi->master->bus_num, spi->chip_select,
650 			name);
651 
652 	device = &priv->mtd;
653 	device->name = (pdata && pdata->name) ? pdata->name : priv->name;
654 	device->size = nr_pages * pagesize;
655 	device->erasesize = pagesize;
656 	device->writesize = pagesize;
657 	device->type = MTD_DATAFLASH;
658 	device->flags = MTD_WRITEABLE;
659 	device->_erase = dataflash_erase;
660 	device->_read = dataflash_read;
661 	device->_write = dataflash_write;
662 	device->priv = priv;
663 
664 	device->dev.parent = &spi->dev;
665 	mtd_set_of_node(device, spi->dev.of_node);
666 
667 	if (revision >= 'c')
668 		otp_tag = otp_setup(device, revision);
669 
670 	dev_info(&spi->dev, "%s (%lld KBytes) pagesize %d bytes%s\n",
671 			name, (long long)((device->size + 1023) >> 10),
672 			pagesize, otp_tag);
673 	spi_set_drvdata(spi, priv);
674 
675 	err = mtd_device_register(device,
676 			pdata ? pdata->parts : NULL,
677 			pdata ? pdata->nr_parts : 0);
678 
679 	if (!err)
680 		return 0;
681 
682 	kfree(priv);
683 	return err;
684 }
685 
686 static inline int add_dataflash(struct spi_device *spi, char *name,
687 				int nr_pages, int pagesize, int pageoffset)
688 {
689 	return add_dataflash_otp(spi, name, nr_pages, pagesize,
690 			pageoffset, 0);
691 }
692 
693 struct flash_info {
694 	char		*name;
695 
696 	/* JEDEC id has a high byte of zero plus three data bytes:
697 	 * the manufacturer id, then a two byte device id.
698 	 */
699 	u64		jedec_id;
700 
701 	/* The size listed here is what works with OP_ERASE_PAGE. */
702 	unsigned	nr_pages;
703 	u16		pagesize;
704 	u16		pageoffset;
705 
706 	u16		flags;
707 #define SUP_EXTID	0x0004		/* supports extended ID data */
708 #define SUP_POW2PS	0x0002		/* supports 2^N byte pages */
709 #define IS_POW2PS	0x0001		/* uses 2^N byte pages */
710 };
711 
712 static struct flash_info dataflash_data[] = {
713 
714 	/*
715 	 * NOTE:  chips with SUP_POW2PS (rev D and up) need two entries,
716 	 * one with IS_POW2PS and the other without.  The entry with the
717 	 * non-2^N byte page size can't name exact chip revisions without
718 	 * losing backwards compatibility for cmdlinepart.
719 	 *
720 	 * These newer chips also support 128-byte security registers (with
721 	 * 64 bytes one-time-programmable) and software write-protection.
722 	 */
723 	{ "AT45DB011B",  0x1f2200, 512, 264, 9, SUP_POW2PS},
724 	{ "at45db011d",  0x1f2200, 512, 256, 8, SUP_POW2PS | IS_POW2PS},
725 
726 	{ "AT45DB021B",  0x1f2300, 1024, 264, 9, SUP_POW2PS},
727 	{ "at45db021d",  0x1f2300, 1024, 256, 8, SUP_POW2PS | IS_POW2PS},
728 
729 	{ "AT45DB041x",  0x1f2400, 2048, 264, 9, SUP_POW2PS},
730 	{ "at45db041d",  0x1f2400, 2048, 256, 8, SUP_POW2PS | IS_POW2PS},
731 
732 	{ "AT45DB081B",  0x1f2500, 4096, 264, 9, SUP_POW2PS},
733 	{ "at45db081d",  0x1f2500, 4096, 256, 8, SUP_POW2PS | IS_POW2PS},
734 
735 	{ "AT45DB161x",  0x1f2600, 4096, 528, 10, SUP_POW2PS},
736 	{ "at45db161d",  0x1f2600, 4096, 512, 9, SUP_POW2PS | IS_POW2PS},
737 
738 	{ "AT45DB321x",  0x1f2700, 8192, 528, 10, 0},		/* rev C */
739 
740 	{ "AT45DB321x",  0x1f2701, 8192, 528, 10, SUP_POW2PS},
741 	{ "at45db321d",  0x1f2701, 8192, 512, 9, SUP_POW2PS | IS_POW2PS},
742 
743 	{ "AT45DB642x",  0x1f2800, 8192, 1056, 11, SUP_POW2PS},
744 	{ "at45db642d",  0x1f2800, 8192, 1024, 10, SUP_POW2PS | IS_POW2PS},
745 
746 	{ "AT45DB641E",  0x1f28000100ULL, 32768, 264, 9, SUP_EXTID | SUP_POW2PS},
747 	{ "at45db641e",  0x1f28000100ULL, 32768, 256, 8, SUP_EXTID | SUP_POW2PS | IS_POW2PS},
748 };
749 
750 static struct flash_info *jedec_lookup(struct spi_device *spi,
751 				       u64 jedec, bool use_extid)
752 {
753 	struct flash_info *info;
754 	int status;
755 
756 	for (info = dataflash_data;
757 	     info < dataflash_data + ARRAY_SIZE(dataflash_data);
758 	     info++) {
759 		if (use_extid && !(info->flags & SUP_EXTID))
760 			continue;
761 
762 		if (info->jedec_id == jedec) {
763 			dev_dbg(&spi->dev, "OTP, sector protect%s\n",
764 				(info->flags & SUP_POW2PS) ?
765 				", binary pagesize" : "");
766 			if (info->flags & SUP_POW2PS) {
767 				status = dataflash_status(spi);
768 				if (status < 0) {
769 					dev_dbg(&spi->dev, "status error %d\n",
770 						status);
771 					return ERR_PTR(status);
772 				}
773 				if (status & 0x1) {
774 					if (info->flags & IS_POW2PS)
775 						return info;
776 				} else {
777 					if (!(info->flags & IS_POW2PS))
778 						return info;
779 				}
780 			} else
781 				return info;
782 		}
783 	}
784 
785 	return ERR_PTR(-ENODEV);
786 }
787 
788 static struct flash_info *jedec_probe(struct spi_device *spi)
789 {
790 	int ret;
791 	u8 code = OP_READ_ID;
792 	u64 jedec;
793 	u8 id[sizeof(jedec)] = {0};
794 	const unsigned int id_size = 5;
795 	struct flash_info *info;
796 
797 	/*
798 	 * JEDEC also defines an optional "extended device information"
799 	 * string for after vendor-specific data, after the three bytes
800 	 * we use here.  Supporting some chips might require using it.
801 	 *
802 	 * If the vendor ID isn't Atmel's (0x1f), assume this call failed.
803 	 * That's not an error; only rev C and newer chips handle it, and
804 	 * only Atmel sells these chips.
805 	 */
806 	ret = spi_write_then_read(spi, &code, 1, id, id_size);
807 	if (ret < 0) {
808 		dev_dbg(&spi->dev, "error %d reading JEDEC ID\n", ret);
809 		return ERR_PTR(ret);
810 	}
811 
812 	if (id[0] != CFI_MFR_ATMEL)
813 		return NULL;
814 
815 	jedec = be64_to_cpup((__be64 *)id);
816 
817 	/*
818 	 * First, try to match device using extended device
819 	 * information
820 	 */
821 	info = jedec_lookup(spi, jedec >> DATAFLASH_SHIFT_EXTID, true);
822 	if (!IS_ERR(info))
823 		return info;
824 	/*
825 	 * If that fails, make another pass using regular ID
826 	 * information
827 	 */
828 	info = jedec_lookup(spi, jedec >> DATAFLASH_SHIFT_ID, false);
829 	if (!IS_ERR(info))
830 		return info;
831 	/*
832 	 * Treat other chips as errors ... we won't know the right page
833 	 * size (it might be binary) even when we can tell which density
834 	 * class is involved (legacy chip id scheme).
835 	 */
836 	dev_warn(&spi->dev, "JEDEC id %016llx not handled\n", jedec);
837 	return ERR_PTR(-ENODEV);
838 }
839 
840 /*
841  * Detect and initialize DataFlash device, using JEDEC IDs on newer chips
842  * or else the ID code embedded in the status bits:
843  *
844  *   Device      Density         ID code          #Pages PageSize  Offset
845  *   AT45DB011B  1Mbit   (128K)  xx0011xx (0x0c)    512    264      9
846  *   AT45DB021B  2Mbit   (256K)  xx0101xx (0x14)   1024    264      9
847  *   AT45DB041B  4Mbit   (512K)  xx0111xx (0x1c)   2048    264      9
848  *   AT45DB081B  8Mbit   (1M)    xx1001xx (0x24)   4096    264      9
849  *   AT45DB0161B 16Mbit  (2M)    xx1011xx (0x2c)   4096    528     10
850  *   AT45DB0321B 32Mbit  (4M)    xx1101xx (0x34)   8192    528     10
851  *   AT45DB0642  64Mbit  (8M)    xx111xxx (0x3c)   8192   1056     11
852  *   AT45DB1282  128Mbit (16M)   xx0100xx (0x10)  16384   1056     11
853  */
854 static int dataflash_probe(struct spi_device *spi)
855 {
856 	int status;
857 	struct flash_info	*info;
858 
859 	/*
860 	 * Try to detect dataflash by JEDEC ID.
861 	 * If it succeeds we know we have either a C or D part.
862 	 * D will support power of 2 pagesize option.
863 	 * Both support the security register, though with different
864 	 * write procedures.
865 	 */
866 	info = jedec_probe(spi);
867 	if (IS_ERR(info))
868 		return PTR_ERR(info);
869 	if (info != NULL)
870 		return add_dataflash_otp(spi, info->name, info->nr_pages,
871 				info->pagesize, info->pageoffset,
872 				(info->flags & SUP_POW2PS) ? 'd' : 'c');
873 
874 	/*
875 	 * Older chips support only legacy commands, identifing
876 	 * capacity using bits in the status byte.
877 	 */
878 	status = dataflash_status(spi);
879 	if (status <= 0 || status == 0xff) {
880 		dev_dbg(&spi->dev, "status error %d\n", status);
881 		if (status == 0 || status == 0xff)
882 			status = -ENODEV;
883 		return status;
884 	}
885 
886 	/* if there's a device there, assume it's dataflash.
887 	 * board setup should have set spi->max_speed_max to
888 	 * match f(car) for continuous reads, mode 0 or 3.
889 	 */
890 	switch (status & 0x3c) {
891 	case 0x0c:	/* 0 0 1 1 x x */
892 		status = add_dataflash(spi, "AT45DB011B", 512, 264, 9);
893 		break;
894 	case 0x14:	/* 0 1 0 1 x x */
895 		status = add_dataflash(spi, "AT45DB021B", 1024, 264, 9);
896 		break;
897 	case 0x1c:	/* 0 1 1 1 x x */
898 		status = add_dataflash(spi, "AT45DB041x", 2048, 264, 9);
899 		break;
900 	case 0x24:	/* 1 0 0 1 x x */
901 		status = add_dataflash(spi, "AT45DB081B", 4096, 264, 9);
902 		break;
903 	case 0x2c:	/* 1 0 1 1 x x */
904 		status = add_dataflash(spi, "AT45DB161x", 4096, 528, 10);
905 		break;
906 	case 0x34:	/* 1 1 0 1 x x */
907 		status = add_dataflash(spi, "AT45DB321x", 8192, 528, 10);
908 		break;
909 	case 0x38:	/* 1 1 1 x x x */
910 	case 0x3c:
911 		status = add_dataflash(spi, "AT45DB642x", 8192, 1056, 11);
912 		break;
913 	/* obsolete AT45DB1282 not (yet?) supported */
914 	default:
915 		dev_info(&spi->dev, "unsupported device (%x)\n",
916 				status & 0x3c);
917 		status = -ENODEV;
918 	}
919 
920 	if (status < 0)
921 		dev_dbg(&spi->dev, "add_dataflash --> %d\n", status);
922 
923 	return status;
924 }
925 
926 static void dataflash_remove(struct spi_device *spi)
927 {
928 	struct dataflash	*flash = spi_get_drvdata(spi);
929 
930 	dev_dbg(&spi->dev, "remove\n");
931 
932 	WARN_ON(mtd_device_unregister(&flash->mtd));
933 
934 	kfree(flash);
935 }
936 
937 static struct spi_driver dataflash_driver = {
938 	.driver = {
939 		.name		= "mtd_dataflash",
940 		.of_match_table = of_match_ptr(dataflash_dt_ids),
941 	},
942 	.id_table = dataflash_dev_ids,
943 
944 	.probe		= dataflash_probe,
945 	.remove		= dataflash_remove,
946 	.id_table	= dataflash_spi_ids,
947 
948 	/* FIXME:  investigate suspend and resume... */
949 };
950 
951 module_spi_driver(dataflash_driver);
952 
953 MODULE_LICENSE("GPL");
954 MODULE_AUTHOR("Andrew Victor, David Brownell");
955 MODULE_DESCRIPTION("MTD DataFlash driver");
956 MODULE_ALIAS("spi:mtd_dataflash");
957