1 /* 2 Common Flash Interface probe code. 3 (C) 2000 Red Hat. GPL'd. 4 */ 5 6 #include <linux/module.h> 7 #include <linux/types.h> 8 #include <linux/kernel.h> 9 #include <linux/init.h> 10 #include <asm/io.h> 11 #include <asm/byteorder.h> 12 #include <linux/errno.h> 13 #include <linux/slab.h> 14 #include <linux/interrupt.h> 15 16 #include <linux/mtd/xip.h> 17 #include <linux/mtd/map.h> 18 #include <linux/mtd/cfi.h> 19 #include <linux/mtd/gen_probe.h> 20 21 //#define DEBUG_CFI 22 23 #ifdef DEBUG_CFI 24 static void print_cfi_ident(struct cfi_ident *); 25 #endif 26 27 static int cfi_probe_chip(struct map_info *map, __u32 base, 28 unsigned long *chip_map, struct cfi_private *cfi); 29 static int cfi_chip_setup(struct map_info *map, struct cfi_private *cfi); 30 31 struct mtd_info *cfi_probe(struct map_info *map); 32 33 #ifdef CONFIG_MTD_XIP 34 35 /* only needed for short periods, so this is rather simple */ 36 #define xip_disable() local_irq_disable() 37 38 #define xip_allowed(base, map) \ 39 do { \ 40 (void) map_read(map, base); \ 41 xip_iprefetch(); \ 42 local_irq_enable(); \ 43 } while (0) 44 45 #define xip_enable(base, map, cfi) \ 46 do { \ 47 cfi_send_gen_cmd(0xF0, 0, base, map, cfi, cfi->device_type, NULL); \ 48 cfi_send_gen_cmd(0xFF, 0, base, map, cfi, cfi->device_type, NULL); \ 49 xip_allowed(base, map); \ 50 } while (0) 51 52 #define xip_disable_qry(base, map, cfi) \ 53 do { \ 54 xip_disable(); \ 55 cfi_send_gen_cmd(0xF0, 0, base, map, cfi, cfi->device_type, NULL); \ 56 cfi_send_gen_cmd(0xFF, 0, base, map, cfi, cfi->device_type, NULL); \ 57 cfi_send_gen_cmd(0x98, 0x55, base, map, cfi, cfi->device_type, NULL); \ 58 } while (0) 59 60 #else 61 62 #define xip_disable() do { } while (0) 63 #define xip_allowed(base, map) do { } while (0) 64 #define xip_enable(base, map, cfi) do { } while (0) 65 #define xip_disable_qry(base, map, cfi) do { } while (0) 66 67 #endif 68 69 /* check for QRY. 70 in: interleave,type,mode 71 ret: table index, <0 for error 72 */ 73 static int __xipram qry_present(struct map_info *map, __u32 base, 74 struct cfi_private *cfi) 75 { 76 int osf = cfi->interleave * cfi->device_type; // scale factor 77 map_word val[3]; 78 map_word qry[3]; 79 80 qry[0] = cfi_build_cmd('Q', map, cfi); 81 qry[1] = cfi_build_cmd('R', map, cfi); 82 qry[2] = cfi_build_cmd('Y', map, cfi); 83 84 val[0] = map_read(map, base + osf*0x10); 85 val[1] = map_read(map, base + osf*0x11); 86 val[2] = map_read(map, base + osf*0x12); 87 88 if (!map_word_equal(map, qry[0], val[0])) 89 return 0; 90 91 if (!map_word_equal(map, qry[1], val[1])) 92 return 0; 93 94 if (!map_word_equal(map, qry[2], val[2])) 95 return 0; 96 97 return 1; // "QRY" found 98 } 99 100 static int __xipram cfi_probe_chip(struct map_info *map, __u32 base, 101 unsigned long *chip_map, struct cfi_private *cfi) 102 { 103 int i; 104 105 if ((base + 0) >= map->size) { 106 printk(KERN_NOTICE 107 "Probe at base[0x00](0x%08lx) past the end of the map(0x%08lx)\n", 108 (unsigned long)base, map->size -1); 109 return 0; 110 } 111 if ((base + 0xff) >= map->size) { 112 printk(KERN_NOTICE 113 "Probe at base[0x55](0x%08lx) past the end of the map(0x%08lx)\n", 114 (unsigned long)base + 0x55, map->size -1); 115 return 0; 116 } 117 118 xip_disable(); 119 cfi_send_gen_cmd(0xF0, 0, base, map, cfi, cfi->device_type, NULL); 120 cfi_send_gen_cmd(0xFF, 0, base, map, cfi, cfi->device_type, NULL); 121 cfi_send_gen_cmd(0x98, 0x55, base, map, cfi, cfi->device_type, NULL); 122 123 if (!qry_present(map,base,cfi)) { 124 xip_enable(base, map, cfi); 125 return 0; 126 } 127 128 if (!cfi->numchips) { 129 /* This is the first time we're called. Set up the CFI 130 stuff accordingly and return */ 131 return cfi_chip_setup(map, cfi); 132 } 133 134 /* Check each previous chip to see if it's an alias */ 135 for (i=0; i < (base >> cfi->chipshift); i++) { 136 unsigned long start; 137 if(!test_bit(i, chip_map)) { 138 /* Skip location; no valid chip at this address */ 139 continue; 140 } 141 start = i << cfi->chipshift; 142 /* This chip should be in read mode if it's one 143 we've already touched. */ 144 if (qry_present(map, start, cfi)) { 145 /* Eep. This chip also had the QRY marker. 146 * Is it an alias for the new one? */ 147 cfi_send_gen_cmd(0xF0, 0, start, map, cfi, cfi->device_type, NULL); 148 cfi_send_gen_cmd(0xFF, 0, start, map, cfi, cfi->device_type, NULL); 149 150 /* If the QRY marker goes away, it's an alias */ 151 if (!qry_present(map, start, cfi)) { 152 xip_allowed(base, map); 153 printk(KERN_DEBUG "%s: Found an alias at 0x%x for the chip at 0x%lx\n", 154 map->name, base, start); 155 return 0; 156 } 157 /* Yes, it's actually got QRY for data. Most 158 * unfortunate. Stick the new chip in read mode 159 * too and if it's the same, assume it's an alias. */ 160 /* FIXME: Use other modes to do a proper check */ 161 cfi_send_gen_cmd(0xF0, 0, base, map, cfi, cfi->device_type, NULL); 162 cfi_send_gen_cmd(0xFF, 0, start, map, cfi, cfi->device_type, NULL); 163 164 if (qry_present(map, base, cfi)) { 165 xip_allowed(base, map); 166 printk(KERN_DEBUG "%s: Found an alias at 0x%x for the chip at 0x%lx\n", 167 map->name, base, start); 168 return 0; 169 } 170 } 171 } 172 173 /* OK, if we got to here, then none of the previous chips appear to 174 be aliases for the current one. */ 175 set_bit((base >> cfi->chipshift), chip_map); /* Update chip map */ 176 cfi->numchips++; 177 178 /* Put it back into Read Mode */ 179 cfi_send_gen_cmd(0xF0, 0, base, map, cfi, cfi->device_type, NULL); 180 cfi_send_gen_cmd(0xFF, 0, base, map, cfi, cfi->device_type, NULL); 181 xip_allowed(base, map); 182 183 printk(KERN_INFO "%s: Found %d x%d devices at 0x%x in %d-bit bank\n", 184 map->name, cfi->interleave, cfi->device_type*8, base, 185 map->bankwidth*8); 186 187 return 1; 188 } 189 190 static int __xipram cfi_chip_setup(struct map_info *map, 191 struct cfi_private *cfi) 192 { 193 int ofs_factor = cfi->interleave*cfi->device_type; 194 __u32 base = 0; 195 int num_erase_regions = cfi_read_query(map, base + (0x10 + 28)*ofs_factor); 196 int i; 197 198 xip_enable(base, map, cfi); 199 #ifdef DEBUG_CFI 200 printk("Number of erase regions: %d\n", num_erase_regions); 201 #endif 202 if (!num_erase_regions) 203 return 0; 204 205 cfi->cfiq = kmalloc(sizeof(struct cfi_ident) + num_erase_regions * 4, GFP_KERNEL); 206 if (!cfi->cfiq) { 207 printk(KERN_WARNING "%s: kmalloc failed for CFI ident structure\n", map->name); 208 return 0; 209 } 210 211 memset(cfi->cfiq,0,sizeof(struct cfi_ident)); 212 213 cfi->cfi_mode = CFI_MODE_CFI; 214 215 /* Read the CFI info structure */ 216 xip_disable_qry(base, map, cfi); 217 for (i=0; i<(sizeof(struct cfi_ident) + num_erase_regions * 4); i++) 218 ((unsigned char *)cfi->cfiq)[i] = cfi_read_query(map,base + (0x10 + i)*ofs_factor); 219 220 /* Note we put the device back into Read Mode BEFORE going into Auto 221 * Select Mode, as some devices support nesting of modes, others 222 * don't. This way should always work. 223 * On cmdset 0001 the writes of 0xaa and 0x55 are not needed, and 224 * so should be treated as nops or illegal (and so put the device 225 * back into Read Mode, which is a nop in this case). 226 */ 227 cfi_send_gen_cmd(0xf0, 0, base, map, cfi, cfi->device_type, NULL); 228 cfi_send_gen_cmd(0xaa, 0x555, base, map, cfi, cfi->device_type, NULL); 229 cfi_send_gen_cmd(0x55, 0x2aa, base, map, cfi, cfi->device_type, NULL); 230 cfi_send_gen_cmd(0x90, 0x555, base, map, cfi, cfi->device_type, NULL); 231 cfi->mfr = cfi_read_query16(map, base); 232 cfi->id = cfi_read_query16(map, base + ofs_factor); 233 234 /* Get AMD/Spansion extended JEDEC ID */ 235 if (cfi->mfr == CFI_MFR_AMD && (cfi->id & 0xff) == 0x7e) 236 cfi->id = cfi_read_query(map, base + 0xe * ofs_factor) << 8 | 237 cfi_read_query(map, base + 0xf * ofs_factor); 238 239 /* Put it back into Read Mode */ 240 cfi_send_gen_cmd(0xF0, 0, base, map, cfi, cfi->device_type, NULL); 241 /* ... even if it's an Intel chip */ 242 cfi_send_gen_cmd(0xFF, 0, base, map, cfi, cfi->device_type, NULL); 243 xip_allowed(base, map); 244 245 /* Do any necessary byteswapping */ 246 cfi->cfiq->P_ID = le16_to_cpu(cfi->cfiq->P_ID); 247 248 cfi->cfiq->P_ADR = le16_to_cpu(cfi->cfiq->P_ADR); 249 cfi->cfiq->A_ID = le16_to_cpu(cfi->cfiq->A_ID); 250 cfi->cfiq->A_ADR = le16_to_cpu(cfi->cfiq->A_ADR); 251 cfi->cfiq->InterfaceDesc = le16_to_cpu(cfi->cfiq->InterfaceDesc); 252 cfi->cfiq->MaxBufWriteSize = le16_to_cpu(cfi->cfiq->MaxBufWriteSize); 253 254 #ifdef DEBUG_CFI 255 /* Dump the information therein */ 256 print_cfi_ident(cfi->cfiq); 257 #endif 258 259 for (i=0; i<cfi->cfiq->NumEraseRegions; i++) { 260 cfi->cfiq->EraseRegionInfo[i] = le32_to_cpu(cfi->cfiq->EraseRegionInfo[i]); 261 262 #ifdef DEBUG_CFI 263 printk(" Erase Region #%d: BlockSize 0x%4.4X bytes, %d blocks\n", 264 i, (cfi->cfiq->EraseRegionInfo[i] >> 8) & ~0xff, 265 (cfi->cfiq->EraseRegionInfo[i] & 0xffff) + 1); 266 #endif 267 } 268 269 printk(KERN_INFO "%s: Found %d x%d devices at 0x%x in %d-bit bank\n", 270 map->name, cfi->interleave, cfi->device_type*8, base, 271 map->bankwidth*8); 272 273 return 1; 274 } 275 276 #ifdef DEBUG_CFI 277 static char *vendorname(__u16 vendor) 278 { 279 switch (vendor) { 280 case P_ID_NONE: 281 return "None"; 282 283 case P_ID_INTEL_EXT: 284 return "Intel/Sharp Extended"; 285 286 case P_ID_AMD_STD: 287 return "AMD/Fujitsu Standard"; 288 289 case P_ID_INTEL_STD: 290 return "Intel/Sharp Standard"; 291 292 case P_ID_AMD_EXT: 293 return "AMD/Fujitsu Extended"; 294 295 case P_ID_WINBOND: 296 return "Winbond Standard"; 297 298 case P_ID_ST_ADV: 299 return "ST Advanced"; 300 301 case P_ID_MITSUBISHI_STD: 302 return "Mitsubishi Standard"; 303 304 case P_ID_MITSUBISHI_EXT: 305 return "Mitsubishi Extended"; 306 307 case P_ID_SST_PAGE: 308 return "SST Page Write"; 309 310 case P_ID_INTEL_PERFORMANCE: 311 return "Intel Performance Code"; 312 313 case P_ID_INTEL_DATA: 314 return "Intel Data"; 315 316 case P_ID_RESERVED: 317 return "Not Allowed / Reserved for Future Use"; 318 319 default: 320 return "Unknown"; 321 } 322 } 323 324 325 static void print_cfi_ident(struct cfi_ident *cfip) 326 { 327 #if 0 328 if (cfip->qry[0] != 'Q' || cfip->qry[1] != 'R' || cfip->qry[2] != 'Y') { 329 printk("Invalid CFI ident structure.\n"); 330 return; 331 } 332 #endif 333 printk("Primary Vendor Command Set: %4.4X (%s)\n", cfip->P_ID, vendorname(cfip->P_ID)); 334 if (cfip->P_ADR) 335 printk("Primary Algorithm Table at %4.4X\n", cfip->P_ADR); 336 else 337 printk("No Primary Algorithm Table\n"); 338 339 printk("Alternative Vendor Command Set: %4.4X (%s)\n", cfip->A_ID, vendorname(cfip->A_ID)); 340 if (cfip->A_ADR) 341 printk("Alternate Algorithm Table at %4.4X\n", cfip->A_ADR); 342 else 343 printk("No Alternate Algorithm Table\n"); 344 345 346 printk("Vcc Minimum: %2d.%d V\n", cfip->VccMin >> 4, cfip->VccMin & 0xf); 347 printk("Vcc Maximum: %2d.%d V\n", cfip->VccMax >> 4, cfip->VccMax & 0xf); 348 if (cfip->VppMin) { 349 printk("Vpp Minimum: %2d.%d V\n", cfip->VppMin >> 4, cfip->VppMin & 0xf); 350 printk("Vpp Maximum: %2d.%d V\n", cfip->VppMax >> 4, cfip->VppMax & 0xf); 351 } 352 else 353 printk("No Vpp line\n"); 354 355 printk("Typical byte/word write timeout: %d µs\n", 1<<cfip->WordWriteTimeoutTyp); 356 printk("Maximum byte/word write timeout: %d µs\n", (1<<cfip->WordWriteTimeoutMax) * (1<<cfip->WordWriteTimeoutTyp)); 357 358 if (cfip->BufWriteTimeoutTyp || cfip->BufWriteTimeoutMax) { 359 printk("Typical full buffer write timeout: %d µs\n", 1<<cfip->BufWriteTimeoutTyp); 360 printk("Maximum full buffer write timeout: %d µs\n", (1<<cfip->BufWriteTimeoutMax) * (1<<cfip->BufWriteTimeoutTyp)); 361 } 362 else 363 printk("Full buffer write not supported\n"); 364 365 printk("Typical block erase timeout: %d ms\n", 1<<cfip->BlockEraseTimeoutTyp); 366 printk("Maximum block erase timeout: %d ms\n", (1<<cfip->BlockEraseTimeoutMax) * (1<<cfip->BlockEraseTimeoutTyp)); 367 if (cfip->ChipEraseTimeoutTyp || cfip->ChipEraseTimeoutMax) { 368 printk("Typical chip erase timeout: %d ms\n", 1<<cfip->ChipEraseTimeoutTyp); 369 printk("Maximum chip erase timeout: %d ms\n", (1<<cfip->ChipEraseTimeoutMax) * (1<<cfip->ChipEraseTimeoutTyp)); 370 } 371 else 372 printk("Chip erase not supported\n"); 373 374 printk("Device size: 0x%X bytes (%d MiB)\n", 1 << cfip->DevSize, 1<< (cfip->DevSize - 20)); 375 printk("Flash Device Interface description: 0x%4.4X\n", cfip->InterfaceDesc); 376 switch(cfip->InterfaceDesc) { 377 case CFI_INTERFACE_X8_ASYNC: 378 printk(" - x8-only asynchronous interface\n"); 379 break; 380 381 case CFI_INTERFACE_X16_ASYNC: 382 printk(" - x16-only asynchronous interface\n"); 383 break; 384 385 case CFI_INTERFACE_X8_BY_X16_ASYNC: 386 printk(" - supports x8 and x16 via BYTE# with asynchronous interface\n"); 387 break; 388 389 case CFI_INTERFACE_X32_ASYNC: 390 printk(" - x32-only asynchronous interface\n"); 391 break; 392 393 case CFI_INTERFACE_X16_BY_X32_ASYNC: 394 printk(" - supports x16 and x32 via Word# with asynchronous interface\n"); 395 break; 396 397 case CFI_INTERFACE_NOT_ALLOWED: 398 printk(" - Not Allowed / Reserved\n"); 399 break; 400 401 default: 402 printk(" - Unknown\n"); 403 break; 404 } 405 406 printk("Max. bytes in buffer write: 0x%x\n", 1<< cfip->MaxBufWriteSize); 407 printk("Number of Erase Block Regions: %d\n", cfip->NumEraseRegions); 408 409 } 410 #endif /* DEBUG_CFI */ 411 412 static struct chip_probe cfi_chip_probe = { 413 .name = "CFI", 414 .probe_chip = cfi_probe_chip 415 }; 416 417 struct mtd_info *cfi_probe(struct map_info *map) 418 { 419 /* 420 * Just use the generic probe stuff to call our CFI-specific 421 * chip_probe routine in all the possible permutations, etc. 422 */ 423 return mtd_do_chip_probe(map, &cfi_chip_probe); 424 } 425 426 static struct mtd_chip_driver cfi_chipdrv = { 427 .probe = cfi_probe, 428 .name = "cfi_probe", 429 .module = THIS_MODULE 430 }; 431 432 static int __init cfi_probe_init(void) 433 { 434 register_mtd_chip_driver(&cfi_chipdrv); 435 return 0; 436 } 437 438 static void __exit cfi_probe_exit(void) 439 { 440 unregister_mtd_chip_driver(&cfi_chipdrv); 441 } 442 443 module_init(cfi_probe_init); 444 module_exit(cfi_probe_exit); 445 446 MODULE_LICENSE("GPL"); 447 MODULE_AUTHOR("David Woodhouse <dwmw2@infradead.org> et al."); 448 MODULE_DESCRIPTION("Probe code for CFI-compliant flash chips"); 449