1 /* 2 Common Flash Interface probe code. 3 (C) 2000 Red Hat. GPL'd. 4 $Id: cfi_probe.c,v 1.86 2005/11/29 14:48:31 gleixner Exp $ 5 */ 6 7 #include <linux/module.h> 8 #include <linux/types.h> 9 #include <linux/kernel.h> 10 #include <linux/init.h> 11 #include <asm/io.h> 12 #include <asm/byteorder.h> 13 #include <linux/errno.h> 14 #include <linux/slab.h> 15 #include <linux/interrupt.h> 16 17 #include <linux/mtd/xip.h> 18 #include <linux/mtd/map.h> 19 #include <linux/mtd/cfi.h> 20 #include <linux/mtd/gen_probe.h> 21 22 //#define DEBUG_CFI 23 24 #ifdef DEBUG_CFI 25 static void print_cfi_ident(struct cfi_ident *); 26 #endif 27 28 static int cfi_probe_chip(struct map_info *map, __u32 base, 29 unsigned long *chip_map, struct cfi_private *cfi); 30 static int cfi_chip_setup(struct map_info *map, struct cfi_private *cfi); 31 32 struct mtd_info *cfi_probe(struct map_info *map); 33 34 #ifdef CONFIG_MTD_XIP 35 36 /* only needed for short periods, so this is rather simple */ 37 #define xip_disable() local_irq_disable() 38 39 #define xip_allowed(base, map) \ 40 do { \ 41 (void) map_read(map, base); \ 42 xip_iprefetch(); \ 43 local_irq_enable(); \ 44 } while (0) 45 46 #define xip_enable(base, map, cfi) \ 47 do { \ 48 cfi_send_gen_cmd(0xF0, 0, base, map, cfi, cfi->device_type, NULL); \ 49 cfi_send_gen_cmd(0xFF, 0, base, map, cfi, cfi->device_type, NULL); \ 50 xip_allowed(base, map); \ 51 } while (0) 52 53 #define xip_disable_qry(base, map, cfi) \ 54 do { \ 55 xip_disable(); \ 56 cfi_send_gen_cmd(0xF0, 0, base, map, cfi, cfi->device_type, NULL); \ 57 cfi_send_gen_cmd(0xFF, 0, base, map, cfi, cfi->device_type, NULL); \ 58 cfi_send_gen_cmd(0x98, 0x55, base, map, cfi, cfi->device_type, NULL); \ 59 } while (0) 60 61 #else 62 63 #define xip_disable() do { } while (0) 64 #define xip_allowed(base, map) do { } while (0) 65 #define xip_enable(base, map, cfi) do { } while (0) 66 #define xip_disable_qry(base, map, cfi) do { } while (0) 67 68 #endif 69 70 /* check for QRY. 71 in: interleave,type,mode 72 ret: table index, <0 for error 73 */ 74 static int __xipram qry_present(struct map_info *map, __u32 base, 75 struct cfi_private *cfi) 76 { 77 int osf = cfi->interleave * cfi->device_type; // scale factor 78 map_word val[3]; 79 map_word qry[3]; 80 81 qry[0] = cfi_build_cmd('Q', map, cfi); 82 qry[1] = cfi_build_cmd('R', map, cfi); 83 qry[2] = cfi_build_cmd('Y', map, cfi); 84 85 val[0] = map_read(map, base + osf*0x10); 86 val[1] = map_read(map, base + osf*0x11); 87 val[2] = map_read(map, base + osf*0x12); 88 89 if (!map_word_equal(map, qry[0], val[0])) 90 return 0; 91 92 if (!map_word_equal(map, qry[1], val[1])) 93 return 0; 94 95 if (!map_word_equal(map, qry[2], val[2])) 96 return 0; 97 98 return 1; // "QRY" found 99 } 100 101 static int __xipram cfi_probe_chip(struct map_info *map, __u32 base, 102 unsigned long *chip_map, struct cfi_private *cfi) 103 { 104 int i; 105 106 if ((base + 0) >= map->size) { 107 printk(KERN_NOTICE 108 "Probe at base[0x00](0x%08lx) past the end of the map(0x%08lx)\n", 109 (unsigned long)base, map->size -1); 110 return 0; 111 } 112 if ((base + 0xff) >= map->size) { 113 printk(KERN_NOTICE 114 "Probe at base[0x55](0x%08lx) past the end of the map(0x%08lx)\n", 115 (unsigned long)base + 0x55, map->size -1); 116 return 0; 117 } 118 119 xip_disable(); 120 cfi_send_gen_cmd(0xF0, 0, base, map, cfi, cfi->device_type, NULL); 121 cfi_send_gen_cmd(0xFF, 0, base, map, cfi, cfi->device_type, NULL); 122 cfi_send_gen_cmd(0x98, 0x55, base, map, cfi, cfi->device_type, NULL); 123 124 if (!qry_present(map,base,cfi)) { 125 xip_enable(base, map, cfi); 126 return 0; 127 } 128 129 if (!cfi->numchips) { 130 /* This is the first time we're called. Set up the CFI 131 stuff accordingly and return */ 132 return cfi_chip_setup(map, cfi); 133 } 134 135 /* Check each previous chip to see if it's an alias */ 136 for (i=0; i < (base >> cfi->chipshift); i++) { 137 unsigned long start; 138 if(!test_bit(i, chip_map)) { 139 /* Skip location; no valid chip at this address */ 140 continue; 141 } 142 start = i << cfi->chipshift; 143 /* This chip should be in read mode if it's one 144 we've already touched. */ 145 if (qry_present(map, start, cfi)) { 146 /* Eep. This chip also had the QRY marker. 147 * Is it an alias for the new one? */ 148 cfi_send_gen_cmd(0xF0, 0, start, map, cfi, cfi->device_type, NULL); 149 cfi_send_gen_cmd(0xFF, 0, start, map, cfi, cfi->device_type, NULL); 150 151 /* If the QRY marker goes away, it's an alias */ 152 if (!qry_present(map, start, cfi)) { 153 xip_allowed(base, map); 154 printk(KERN_DEBUG "%s: Found an alias at 0x%x for the chip at 0x%lx\n", 155 map->name, base, start); 156 return 0; 157 } 158 /* Yes, it's actually got QRY for data. Most 159 * unfortunate. Stick the new chip in read mode 160 * too and if it's the same, assume it's an alias. */ 161 /* FIXME: Use other modes to do a proper check */ 162 cfi_send_gen_cmd(0xF0, 0, base, map, cfi, cfi->device_type, NULL); 163 cfi_send_gen_cmd(0xFF, 0, start, map, cfi, cfi->device_type, NULL); 164 165 if (qry_present(map, base, cfi)) { 166 xip_allowed(base, map); 167 printk(KERN_DEBUG "%s: Found an alias at 0x%x for the chip at 0x%lx\n", 168 map->name, base, start); 169 return 0; 170 } 171 } 172 } 173 174 /* OK, if we got to here, then none of the previous chips appear to 175 be aliases for the current one. */ 176 set_bit((base >> cfi->chipshift), chip_map); /* Update chip map */ 177 cfi->numchips++; 178 179 /* Put it back into Read Mode */ 180 cfi_send_gen_cmd(0xF0, 0, base, map, cfi, cfi->device_type, NULL); 181 cfi_send_gen_cmd(0xFF, 0, base, map, cfi, cfi->device_type, NULL); 182 xip_allowed(base, map); 183 184 printk(KERN_INFO "%s: Found %d x%d devices at 0x%x in %d-bit bank\n", 185 map->name, cfi->interleave, cfi->device_type*8, base, 186 map->bankwidth*8); 187 188 return 1; 189 } 190 191 static int __xipram cfi_chip_setup(struct map_info *map, 192 struct cfi_private *cfi) 193 { 194 int ofs_factor = cfi->interleave*cfi->device_type; 195 __u32 base = 0; 196 int num_erase_regions = cfi_read_query(map, base + (0x10 + 28)*ofs_factor); 197 int i; 198 199 xip_enable(base, map, cfi); 200 #ifdef DEBUG_CFI 201 printk("Number of erase regions: %d\n", num_erase_regions); 202 #endif 203 if (!num_erase_regions) 204 return 0; 205 206 cfi->cfiq = kmalloc(sizeof(struct cfi_ident) + num_erase_regions * 4, GFP_KERNEL); 207 if (!cfi->cfiq) { 208 printk(KERN_WARNING "%s: kmalloc failed for CFI ident structure\n", map->name); 209 return 0; 210 } 211 212 memset(cfi->cfiq,0,sizeof(struct cfi_ident)); 213 214 cfi->cfi_mode = CFI_MODE_CFI; 215 216 /* Read the CFI info structure */ 217 xip_disable_qry(base, map, cfi); 218 for (i=0; i<(sizeof(struct cfi_ident) + num_erase_regions * 4); i++) 219 ((unsigned char *)cfi->cfiq)[i] = cfi_read_query(map,base + (0x10 + i)*ofs_factor); 220 221 /* Note we put the device back into Read Mode BEFORE going into Auto 222 * Select Mode, as some devices support nesting of modes, others 223 * don't. This way should always work. 224 * On cmdset 0001 the writes of 0xaa and 0x55 are not needed, and 225 * so should be treated as nops or illegal (and so put the device 226 * back into Read Mode, which is a nop in this case). 227 */ 228 cfi_send_gen_cmd(0xf0, 0, base, map, cfi, cfi->device_type, NULL); 229 cfi_send_gen_cmd(0xaa, 0x555, base, map, cfi, cfi->device_type, NULL); 230 cfi_send_gen_cmd(0x55, 0x2aa, base, map, cfi, cfi->device_type, NULL); 231 cfi_send_gen_cmd(0x90, 0x555, base, map, cfi, cfi->device_type, NULL); 232 cfi->mfr = cfi_read_query16(map, base); 233 cfi->id = cfi_read_query16(map, base + ofs_factor); 234 235 /* Get AMD/Spansion extended JEDEC ID */ 236 if (cfi->mfr == CFI_MFR_AMD && (cfi->id & 0xff) == 0x7e) 237 cfi->id = cfi_read_query(map, base + 0xe * ofs_factor) << 8 | 238 cfi_read_query(map, base + 0xf * ofs_factor); 239 240 /* Put it back into Read Mode */ 241 cfi_send_gen_cmd(0xF0, 0, base, map, cfi, cfi->device_type, NULL); 242 /* ... even if it's an Intel chip */ 243 cfi_send_gen_cmd(0xFF, 0, base, map, cfi, cfi->device_type, NULL); 244 xip_allowed(base, map); 245 246 /* Do any necessary byteswapping */ 247 cfi->cfiq->P_ID = le16_to_cpu(cfi->cfiq->P_ID); 248 249 cfi->cfiq->P_ADR = le16_to_cpu(cfi->cfiq->P_ADR); 250 cfi->cfiq->A_ID = le16_to_cpu(cfi->cfiq->A_ID); 251 cfi->cfiq->A_ADR = le16_to_cpu(cfi->cfiq->A_ADR); 252 cfi->cfiq->InterfaceDesc = le16_to_cpu(cfi->cfiq->InterfaceDesc); 253 cfi->cfiq->MaxBufWriteSize = le16_to_cpu(cfi->cfiq->MaxBufWriteSize); 254 255 #ifdef DEBUG_CFI 256 /* Dump the information therein */ 257 print_cfi_ident(cfi->cfiq); 258 #endif 259 260 for (i=0; i<cfi->cfiq->NumEraseRegions; i++) { 261 cfi->cfiq->EraseRegionInfo[i] = le32_to_cpu(cfi->cfiq->EraseRegionInfo[i]); 262 263 #ifdef DEBUG_CFI 264 printk(" Erase Region #%d: BlockSize 0x%4.4X bytes, %d blocks\n", 265 i, (cfi->cfiq->EraseRegionInfo[i] >> 8) & ~0xff, 266 (cfi->cfiq->EraseRegionInfo[i] & 0xffff) + 1); 267 #endif 268 } 269 270 printk(KERN_INFO "%s: Found %d x%d devices at 0x%x in %d-bit bank\n", 271 map->name, cfi->interleave, cfi->device_type*8, base, 272 map->bankwidth*8); 273 274 return 1; 275 } 276 277 #ifdef DEBUG_CFI 278 static char *vendorname(__u16 vendor) 279 { 280 switch (vendor) { 281 case P_ID_NONE: 282 return "None"; 283 284 case P_ID_INTEL_EXT: 285 return "Intel/Sharp Extended"; 286 287 case P_ID_AMD_STD: 288 return "AMD/Fujitsu Standard"; 289 290 case P_ID_INTEL_STD: 291 return "Intel/Sharp Standard"; 292 293 case P_ID_AMD_EXT: 294 return "AMD/Fujitsu Extended"; 295 296 case P_ID_WINBOND: 297 return "Winbond Standard"; 298 299 case P_ID_ST_ADV: 300 return "ST Advanced"; 301 302 case P_ID_MITSUBISHI_STD: 303 return "Mitsubishi Standard"; 304 305 case P_ID_MITSUBISHI_EXT: 306 return "Mitsubishi Extended"; 307 308 case P_ID_SST_PAGE: 309 return "SST Page Write"; 310 311 case P_ID_INTEL_PERFORMANCE: 312 return "Intel Performance Code"; 313 314 case P_ID_INTEL_DATA: 315 return "Intel Data"; 316 317 case P_ID_RESERVED: 318 return "Not Allowed / Reserved for Future Use"; 319 320 default: 321 return "Unknown"; 322 } 323 } 324 325 326 static void print_cfi_ident(struct cfi_ident *cfip) 327 { 328 #if 0 329 if (cfip->qry[0] != 'Q' || cfip->qry[1] != 'R' || cfip->qry[2] != 'Y') { 330 printk("Invalid CFI ident structure.\n"); 331 return; 332 } 333 #endif 334 printk("Primary Vendor Command Set: %4.4X (%s)\n", cfip->P_ID, vendorname(cfip->P_ID)); 335 if (cfip->P_ADR) 336 printk("Primary Algorithm Table at %4.4X\n", cfip->P_ADR); 337 else 338 printk("No Primary Algorithm Table\n"); 339 340 printk("Alternative Vendor Command Set: %4.4X (%s)\n", cfip->A_ID, vendorname(cfip->A_ID)); 341 if (cfip->A_ADR) 342 printk("Alternate Algorithm Table at %4.4X\n", cfip->A_ADR); 343 else 344 printk("No Alternate Algorithm Table\n"); 345 346 347 printk("Vcc Minimum: %2d.%d V\n", cfip->VccMin >> 4, cfip->VccMin & 0xf); 348 printk("Vcc Maximum: %2d.%d V\n", cfip->VccMax >> 4, cfip->VccMax & 0xf); 349 if (cfip->VppMin) { 350 printk("Vpp Minimum: %2d.%d V\n", cfip->VppMin >> 4, cfip->VppMin & 0xf); 351 printk("Vpp Maximum: %2d.%d V\n", cfip->VppMax >> 4, cfip->VppMax & 0xf); 352 } 353 else 354 printk("No Vpp line\n"); 355 356 printk("Typical byte/word write timeout: %d µs\n", 1<<cfip->WordWriteTimeoutTyp); 357 printk("Maximum byte/word write timeout: %d µs\n", (1<<cfip->WordWriteTimeoutMax) * (1<<cfip->WordWriteTimeoutTyp)); 358 359 if (cfip->BufWriteTimeoutTyp || cfip->BufWriteTimeoutMax) { 360 printk("Typical full buffer write timeout: %d µs\n", 1<<cfip->BufWriteTimeoutTyp); 361 printk("Maximum full buffer write timeout: %d µs\n", (1<<cfip->BufWriteTimeoutMax) * (1<<cfip->BufWriteTimeoutTyp)); 362 } 363 else 364 printk("Full buffer write not supported\n"); 365 366 printk("Typical block erase timeout: %d ms\n", 1<<cfip->BlockEraseTimeoutTyp); 367 printk("Maximum block erase timeout: %d ms\n", (1<<cfip->BlockEraseTimeoutMax) * (1<<cfip->BlockEraseTimeoutTyp)); 368 if (cfip->ChipEraseTimeoutTyp || cfip->ChipEraseTimeoutMax) { 369 printk("Typical chip erase timeout: %d ms\n", 1<<cfip->ChipEraseTimeoutTyp); 370 printk("Maximum chip erase timeout: %d ms\n", (1<<cfip->ChipEraseTimeoutMax) * (1<<cfip->ChipEraseTimeoutTyp)); 371 } 372 else 373 printk("Chip erase not supported\n"); 374 375 printk("Device size: 0x%X bytes (%d MiB)\n", 1 << cfip->DevSize, 1<< (cfip->DevSize - 20)); 376 printk("Flash Device Interface description: 0x%4.4X\n", cfip->InterfaceDesc); 377 switch(cfip->InterfaceDesc) { 378 case CFI_INTERFACE_X8_ASYNC: 379 printk(" - x8-only asynchronous interface\n"); 380 break; 381 382 case CFI_INTERFACE_X16_ASYNC: 383 printk(" - x16-only asynchronous interface\n"); 384 break; 385 386 case CFI_INTERFACE_X8_BY_X16_ASYNC: 387 printk(" - supports x8 and x16 via BYTE# with asynchronous interface\n"); 388 break; 389 390 case CFI_INTERFACE_X32_ASYNC: 391 printk(" - x32-only asynchronous interface\n"); 392 break; 393 394 case CFI_INTERFACE_X16_BY_X32_ASYNC: 395 printk(" - supports x16 and x32 via Word# with asynchronous interface\n"); 396 break; 397 398 case CFI_INTERFACE_NOT_ALLOWED: 399 printk(" - Not Allowed / Reserved\n"); 400 break; 401 402 default: 403 printk(" - Unknown\n"); 404 break; 405 } 406 407 printk("Max. bytes in buffer write: 0x%x\n", 1<< cfip->MaxBufWriteSize); 408 printk("Number of Erase Block Regions: %d\n", cfip->NumEraseRegions); 409 410 } 411 #endif /* DEBUG_CFI */ 412 413 static struct chip_probe cfi_chip_probe = { 414 .name = "CFI", 415 .probe_chip = cfi_probe_chip 416 }; 417 418 struct mtd_info *cfi_probe(struct map_info *map) 419 { 420 /* 421 * Just use the generic probe stuff to call our CFI-specific 422 * chip_probe routine in all the possible permutations, etc. 423 */ 424 return mtd_do_chip_probe(map, &cfi_chip_probe); 425 } 426 427 static struct mtd_chip_driver cfi_chipdrv = { 428 .probe = cfi_probe, 429 .name = "cfi_probe", 430 .module = THIS_MODULE 431 }; 432 433 static int __init cfi_probe_init(void) 434 { 435 register_mtd_chip_driver(&cfi_chipdrv); 436 return 0; 437 } 438 439 static void __exit cfi_probe_exit(void) 440 { 441 unregister_mtd_chip_driver(&cfi_chipdrv); 442 } 443 444 module_init(cfi_probe_init); 445 module_exit(cfi_probe_exit); 446 447 MODULE_LICENSE("GPL"); 448 MODULE_AUTHOR("David Woodhouse <dwmw2@infradead.org> et al."); 449 MODULE_DESCRIPTION("Probe code for CFI-compliant flash chips"); 450