1menu "RAM/ROM/Flash chip drivers" 2 depends on MTD!=n 3 4config MTD_CFI 5 tristate "Detect flash chips by Common Flash Interface (CFI) probe" 6 select MTD_GEN_PROBE 7 select MTD_CFI_UTIL 8 help 9 The Common Flash Interface specification was developed by Intel, 10 AMD and other flash manufactures that provides a universal method 11 for probing the capabilities of flash devices. If you wish to 12 support any device that is CFI-compliant, you need to enable this 13 option. Visit <http://www.amd.com/products/nvd/overview/cfi.html> 14 for more information on CFI. 15 16config MTD_JEDECPROBE 17 tristate "Detect non-CFI AMD/JEDEC-compatible flash chips" 18 select MTD_GEN_PROBE 19 help 20 This option enables JEDEC-style probing of flash chips which are not 21 compatible with the Common Flash Interface, but will use the common 22 CFI-targeted flash drivers for any chips which are identified which 23 are in fact compatible in all but the probe method. This actually 24 covers most AMD/Fujitsu-compatible chips and also non-CFI 25 Intel chips. 26 27config MTD_GEN_PROBE 28 tristate 29 30config MTD_CFI_ADV_OPTIONS 31 bool "Flash chip driver advanced configuration options" 32 depends on MTD_GEN_PROBE 33 help 34 If you need to specify a specific endianness for access to flash 35 chips, or if you wish to reduce the size of the kernel by including 36 support for only specific arrangements of flash chips, say 'Y'. This 37 option does not directly affect the code, but will enable other 38 configuration options which allow you to do so. 39 40 If unsure, say 'N'. 41 42choice 43 prompt "Flash cmd/query data swapping" 44 depends on MTD_CFI_ADV_OPTIONS 45 default MTD_CFI_NOSWAP 46 ---help--- 47 This option defines the way in which the CPU attempts to arrange 48 data bits when writing the 'magic' commands to the chips. Saying 49 'NO', which is the default when CONFIG_MTD_CFI_ADV_OPTIONS isn't 50 enabled, means that the CPU will not do any swapping; the chips 51 are expected to be wired to the CPU in 'host-endian' form. 52 Specific arrangements are possible with the BIG_ENDIAN_BYTE and 53 LITTLE_ENDIAN_BYTE, if the bytes are reversed. 54 55config MTD_CFI_NOSWAP 56 bool "NO" 57 58config MTD_CFI_BE_BYTE_SWAP 59 bool "BIG_ENDIAN_BYTE" 60 61config MTD_CFI_LE_BYTE_SWAP 62 bool "LITTLE_ENDIAN_BYTE" 63 64endchoice 65 66config MTD_CFI_GEOMETRY 67 bool "Specific CFI Flash geometry selection" 68 depends on MTD_CFI_ADV_OPTIONS 69 help 70 This option does not affect the code directly, but will enable 71 some other configuration options which would allow you to reduce 72 the size of the kernel by including support for only certain 73 arrangements of CFI chips. If unsure, say 'N' and all options 74 which are supported by the current code will be enabled. 75 76config MTD_MAP_BANK_WIDTH_1 77 bool "Support 8-bit buswidth" if MTD_CFI_GEOMETRY 78 default y 79 help 80 If you wish to support CFI devices on a physical bus which is 81 8 bits wide, say 'Y'. 82 83config MTD_MAP_BANK_WIDTH_2 84 bool "Support 16-bit buswidth" if MTD_CFI_GEOMETRY 85 default y 86 help 87 If you wish to support CFI devices on a physical bus which is 88 16 bits wide, say 'Y'. 89 90config MTD_MAP_BANK_WIDTH_4 91 bool "Support 32-bit buswidth" if MTD_CFI_GEOMETRY 92 default y 93 help 94 If you wish to support CFI devices on a physical bus which is 95 32 bits wide, say 'Y'. 96 97config MTD_MAP_BANK_WIDTH_8 98 bool "Support 64-bit buswidth" if MTD_CFI_GEOMETRY 99 default n 100 help 101 If you wish to support CFI devices on a physical bus which is 102 64 bits wide, say 'Y'. 103 104config MTD_MAP_BANK_WIDTH_16 105 bool "Support 128-bit buswidth" if MTD_CFI_GEOMETRY 106 default n 107 help 108 If you wish to support CFI devices on a physical bus which is 109 128 bits wide, say 'Y'. 110 111config MTD_MAP_BANK_WIDTH_32 112 bool "Support 256-bit buswidth" if MTD_CFI_GEOMETRY 113 default n 114 help 115 If you wish to support CFI devices on a physical bus which is 116 256 bits wide, say 'Y'. 117 118config MTD_CFI_I1 119 bool "Support 1-chip flash interleave" if MTD_CFI_GEOMETRY 120 default y 121 help 122 If your flash chips are not interleaved - i.e. you only have one 123 flash chip addressed by each bus cycle, then say 'Y'. 124 125config MTD_CFI_I2 126 bool "Support 2-chip flash interleave" if MTD_CFI_GEOMETRY 127 default y 128 help 129 If your flash chips are interleaved in pairs - i.e. you have two 130 flash chips addressed by each bus cycle, then say 'Y'. 131 132config MTD_CFI_I4 133 bool "Support 4-chip flash interleave" if MTD_CFI_GEOMETRY 134 default n 135 help 136 If your flash chips are interleaved in fours - i.e. you have four 137 flash chips addressed by each bus cycle, then say 'Y'. 138 139config MTD_CFI_I8 140 bool "Support 8-chip flash interleave" if MTD_CFI_GEOMETRY 141 default n 142 help 143 If your flash chips are interleaved in eights - i.e. you have eight 144 flash chips addressed by each bus cycle, then say 'Y'. 145 146config MTD_OTP 147 bool "Protection Registers aka one-time programmable (OTP) bits" 148 depends on MTD_CFI_ADV_OPTIONS 149 default n 150 help 151 This enables support for reading, writing and locking so called 152 "Protection Registers" present on some flash chips. 153 A subset of them are pre-programmed at the factory with a 154 unique set of values. The rest is user-programmable. 155 156 The user-programmable Protection Registers contain one-time 157 programmable (OTP) bits; when programmed, register bits cannot be 158 erased. Each Protection Register can be accessed multiple times to 159 program individual bits, as long as the register remains unlocked. 160 161 Each Protection Register has an associated Lock Register bit. When a 162 Lock Register bit is programmed, the associated Protection Register 163 can only be read; it can no longer be programmed. Additionally, 164 because the Lock Register bits themselves are OTP, when programmed, 165 Lock Register bits cannot be erased. Therefore, when a Protection 166 Register is locked, it cannot be unlocked. 167 168 This feature should therefore be used with extreme care. Any mistake 169 in the programming of OTP bits will waste them. 170 171config MTD_CFI_INTELEXT 172 tristate "Support for CFI command set 0001 (Intel/Sharp chips)" 173 depends on MTD_GEN_PROBE 174 select MTD_CFI_UTIL 175 help 176 The Common Flash Interface defines a number of different command 177 sets which a CFI-compliant chip may claim to implement. This code 178 provides support for command set 0001, used on Intel StrataFlash 179 and other parts. 180 181config MTD_CFI_AMDSTD 182 tristate "Support for CFI command set 0002 (AMD/Fujitsu/Spansion chips)" 183 depends on MTD_GEN_PROBE 184 select MTD_CFI_UTIL 185 help 186 The Common Flash Interface defines a number of different command 187 sets which a CFI-compliant chip may claim to implement. This code 188 provides support for command set 0002, used on chips including 189 the AMD Am29LV320. 190 191config MTD_CFI_STAA 192 tristate "Support for CFI command set 0020 (ST (Advanced Architecture) chips)" 193 depends on MTD_GEN_PROBE 194 select MTD_CFI_UTIL 195 help 196 The Common Flash Interface defines a number of different command 197 sets which a CFI-compliant chip may claim to implement. This code 198 provides support for command set 0020. 199 200config MTD_CFI_UTIL 201 tristate 202 203config MTD_RAM 204 tristate "Support for RAM chips in bus mapping" 205 help 206 This option enables basic support for RAM chips accessed through 207 a bus mapping driver. 208 209config MTD_ROM 210 tristate "Support for ROM chips in bus mapping" 211 help 212 This option enables basic support for ROM chips accessed through 213 a bus mapping driver. 214 215config MTD_ABSENT 216 tristate "Support for absent chips in bus mapping" 217 help 218 This option enables support for a dummy probing driver used to 219 allocated placeholder MTD devices on systems that have socketed 220 or removable media. Use of this driver as a fallback chip probe 221 preserves the expected registration order of MTD device nodes on 222 the system regardless of media presence. Device nodes created 223 with this driver will return -ENODEV upon access. 224 225config MTD_XIP 226 bool "XIP aware MTD support" 227 depends on !SMP && (MTD_CFI_INTELEXT || MTD_CFI_AMDSTD) && ARCH_MTD_XIP 228 default y if XIP_KERNEL 229 help 230 This allows MTD support to work with flash memory which is also 231 used for XIP purposes. If you're not sure what this is all about 232 then say N. 233 234endmenu 235