1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Driver for the MMC / SD / SDIO IP found in: 4 * 5 * TC6393XB, TC6391XB, TC6387XB, T7L66XB, ASIC3, SH-Mobile SoCs 6 * 7 * Copyright (C) 2015-19 Renesas Electronics Corporation 8 * Copyright (C) 2016-19 Sang Engineering, Wolfram Sang 9 * Copyright (C) 2017 Horms Solutions, Simon Horman 10 * Copyright (C) 2011 Guennadi Liakhovetski 11 * Copyright (C) 2007 Ian Molton 12 * Copyright (C) 2004 Ian Molton 13 * 14 * This driver draws mainly on scattered spec sheets, Reverse engineering 15 * of the toshiba e800 SD driver and some parts of the 2.4 ASIC3 driver (4 bit 16 * support). (Further 4 bit support from a later datasheet). 17 * 18 * TODO: 19 * Investigate using a workqueue for PIO transfers 20 * Eliminate FIXMEs 21 * Better Power management 22 * Handle MMC errors better 23 * double buffer support 24 * 25 */ 26 27 #include <linux/delay.h> 28 #include <linux/device.h> 29 #include <linux/dma-mapping.h> 30 #include <linux/highmem.h> 31 #include <linux/interrupt.h> 32 #include <linux/io.h> 33 #include <linux/irq.h> 34 #include <linux/mfd/tmio.h> 35 #include <linux/mmc/card.h> 36 #include <linux/mmc/host.h> 37 #include <linux/mmc/mmc.h> 38 #include <linux/mmc/slot-gpio.h> 39 #include <linux/module.h> 40 #include <linux/pagemap.h> 41 #include <linux/platform_device.h> 42 #include <linux/pm_qos.h> 43 #include <linux/pm_runtime.h> 44 #include <linux/regulator/consumer.h> 45 #include <linux/mmc/sdio.h> 46 #include <linux/scatterlist.h> 47 #include <linux/sizes.h> 48 #include <linux/spinlock.h> 49 #include <linux/workqueue.h> 50 51 #include "tmio_mmc.h" 52 53 static inline void tmio_mmc_start_dma(struct tmio_mmc_host *host, 54 struct mmc_data *data) 55 { 56 if (host->dma_ops) 57 host->dma_ops->start(host, data); 58 } 59 60 static inline void tmio_mmc_enable_dma(struct tmio_mmc_host *host, bool enable) 61 { 62 if (host->dma_ops) 63 host->dma_ops->enable(host, enable); 64 } 65 66 static inline void tmio_mmc_request_dma(struct tmio_mmc_host *host, 67 struct tmio_mmc_data *pdata) 68 { 69 if (host->dma_ops) { 70 host->dma_ops->request(host, pdata); 71 } else { 72 host->chan_tx = NULL; 73 host->chan_rx = NULL; 74 } 75 } 76 77 static inline void tmio_mmc_release_dma(struct tmio_mmc_host *host) 78 { 79 if (host->dma_ops) 80 host->dma_ops->release(host); 81 } 82 83 static inline void tmio_mmc_abort_dma(struct tmio_mmc_host *host) 84 { 85 if (host->dma_ops) 86 host->dma_ops->abort(host); 87 } 88 89 static inline void tmio_mmc_dataend_dma(struct tmio_mmc_host *host) 90 { 91 if (host->dma_ops) 92 host->dma_ops->dataend(host); 93 } 94 95 void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i) 96 { 97 host->sdcard_irq_mask &= ~(i & TMIO_MASK_IRQ); 98 sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask); 99 } 100 EXPORT_SYMBOL_GPL(tmio_mmc_enable_mmc_irqs); 101 102 void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i) 103 { 104 host->sdcard_irq_mask |= (i & TMIO_MASK_IRQ); 105 sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask); 106 } 107 EXPORT_SYMBOL_GPL(tmio_mmc_disable_mmc_irqs); 108 109 static void tmio_mmc_ack_mmc_irqs(struct tmio_mmc_host *host, u32 i) 110 { 111 sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, ~i); 112 } 113 114 static void tmio_mmc_init_sg(struct tmio_mmc_host *host, struct mmc_data *data) 115 { 116 host->sg_len = data->sg_len; 117 host->sg_ptr = data->sg; 118 host->sg_orig = data->sg; 119 host->sg_off = 0; 120 } 121 122 static int tmio_mmc_next_sg(struct tmio_mmc_host *host) 123 { 124 host->sg_ptr = sg_next(host->sg_ptr); 125 host->sg_off = 0; 126 return --host->sg_len; 127 } 128 129 #define CMDREQ_TIMEOUT 5000 130 131 static void tmio_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable) 132 { 133 struct tmio_mmc_host *host = mmc_priv(mmc); 134 135 if (enable && !host->sdio_irq_enabled) { 136 u16 sdio_status; 137 138 /* Keep device active while SDIO irq is enabled */ 139 pm_runtime_get_sync(mmc_dev(mmc)); 140 141 host->sdio_irq_enabled = true; 142 host->sdio_irq_mask = TMIO_SDIO_MASK_ALL & ~TMIO_SDIO_STAT_IOIRQ; 143 144 /* Clear obsolete interrupts before enabling */ 145 sdio_status = sd_ctrl_read16(host, CTL_SDIO_STATUS) & ~TMIO_SDIO_MASK_ALL; 146 if (host->pdata->flags & TMIO_MMC_SDIO_STATUS_SETBITS) 147 sdio_status |= TMIO_SDIO_SETBITS_MASK; 148 sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status); 149 150 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask); 151 } else if (!enable && host->sdio_irq_enabled) { 152 host->sdio_irq_mask = TMIO_SDIO_MASK_ALL; 153 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask); 154 155 host->sdio_irq_enabled = false; 156 pm_runtime_mark_last_busy(mmc_dev(mmc)); 157 pm_runtime_put_autosuspend(mmc_dev(mmc)); 158 } 159 } 160 161 static void tmio_mmc_reset(struct tmio_mmc_host *host) 162 { 163 /* FIXME - should we set stop clock reg here */ 164 sd_ctrl_write16(host, CTL_RESET_SD, 0x0000); 165 usleep_range(10000, 11000); 166 sd_ctrl_write16(host, CTL_RESET_SD, 0x0001); 167 usleep_range(10000, 11000); 168 169 if (host->pdata->flags & TMIO_MMC_SDIO_IRQ) { 170 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask); 171 sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0001); 172 } 173 } 174 175 static void tmio_mmc_hw_reset(struct mmc_host *mmc) 176 { 177 struct tmio_mmc_host *host = mmc_priv(mmc); 178 179 host->reset(host); 180 181 tmio_mmc_abort_dma(host); 182 183 if (host->hw_reset) 184 host->hw_reset(host); 185 } 186 187 static void tmio_mmc_reset_work(struct work_struct *work) 188 { 189 struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host, 190 delayed_reset_work.work); 191 struct mmc_request *mrq; 192 unsigned long flags; 193 194 spin_lock_irqsave(&host->lock, flags); 195 mrq = host->mrq; 196 197 /* 198 * is request already finished? Since we use a non-blocking 199 * cancel_delayed_work(), it can happen, that a .set_ios() call preempts 200 * us, so, have to check for IS_ERR(host->mrq) 201 */ 202 if (IS_ERR_OR_NULL(mrq) || 203 time_is_after_jiffies(host->last_req_ts + 204 msecs_to_jiffies(CMDREQ_TIMEOUT))) { 205 spin_unlock_irqrestore(&host->lock, flags); 206 return; 207 } 208 209 dev_warn(&host->pdev->dev, 210 "timeout waiting for hardware interrupt (CMD%u)\n", 211 mrq->cmd->opcode); 212 213 if (host->data) 214 host->data->error = -ETIMEDOUT; 215 else if (host->cmd) 216 host->cmd->error = -ETIMEDOUT; 217 else 218 mrq->cmd->error = -ETIMEDOUT; 219 220 host->cmd = NULL; 221 host->data = NULL; 222 223 spin_unlock_irqrestore(&host->lock, flags); 224 225 tmio_mmc_hw_reset(host->mmc); 226 227 /* Ready for new calls */ 228 host->mrq = NULL; 229 230 mmc_request_done(host->mmc, mrq); 231 } 232 233 /* These are the bitmasks the tmio chip requires to implement the MMC response 234 * types. Note that R1 and R6 are the same in this scheme. */ 235 #define APP_CMD 0x0040 236 #define RESP_NONE 0x0300 237 #define RESP_R1 0x0400 238 #define RESP_R1B 0x0500 239 #define RESP_R2 0x0600 240 #define RESP_R3 0x0700 241 #define DATA_PRESENT 0x0800 242 #define TRANSFER_READ 0x1000 243 #define TRANSFER_MULTI 0x2000 244 #define SECURITY_CMD 0x4000 245 #define NO_CMD12_ISSUE 0x4000 /* TMIO_MMC_HAVE_CMD12_CTRL */ 246 247 static int tmio_mmc_start_command(struct tmio_mmc_host *host, 248 struct mmc_command *cmd) 249 { 250 struct mmc_data *data = host->data; 251 int c = cmd->opcode; 252 253 switch (mmc_resp_type(cmd)) { 254 case MMC_RSP_NONE: c |= RESP_NONE; break; 255 case MMC_RSP_R1: 256 case MMC_RSP_R1_NO_CRC: 257 c |= RESP_R1; break; 258 case MMC_RSP_R1B: c |= RESP_R1B; break; 259 case MMC_RSP_R2: c |= RESP_R2; break; 260 case MMC_RSP_R3: c |= RESP_R3; break; 261 default: 262 pr_debug("Unknown response type %d\n", mmc_resp_type(cmd)); 263 return -EINVAL; 264 } 265 266 host->cmd = cmd; 267 268 /* FIXME - this seems to be ok commented out but the spec suggest this bit 269 * should be set when issuing app commands. 270 * if(cmd->flags & MMC_FLAG_ACMD) 271 * c |= APP_CMD; 272 */ 273 if (data) { 274 c |= DATA_PRESENT; 275 if (data->blocks > 1) { 276 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, TMIO_STOP_SEC); 277 c |= TRANSFER_MULTI; 278 279 /* 280 * Disable auto CMD12 at IO_RW_EXTENDED and 281 * SET_BLOCK_COUNT when doing multiple block transfer 282 */ 283 if ((host->pdata->flags & TMIO_MMC_HAVE_CMD12_CTRL) && 284 (cmd->opcode == SD_IO_RW_EXTENDED || host->mrq->sbc)) 285 c |= NO_CMD12_ISSUE; 286 } 287 if (data->flags & MMC_DATA_READ) 288 c |= TRANSFER_READ; 289 } 290 291 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_CMD); 292 293 /* Fire off the command */ 294 sd_ctrl_write32_as_16_and_16(host, CTL_ARG_REG, cmd->arg); 295 sd_ctrl_write16(host, CTL_SD_CMD, c); 296 297 return 0; 298 } 299 300 static void tmio_mmc_transfer_data(struct tmio_mmc_host *host, 301 unsigned short *buf, 302 unsigned int count) 303 { 304 int is_read = host->data->flags & MMC_DATA_READ; 305 u8 *buf8; 306 307 /* 308 * Transfer the data 309 */ 310 if (host->pdata->flags & TMIO_MMC_32BIT_DATA_PORT) { 311 u32 data = 0; 312 u32 *buf32 = (u32 *)buf; 313 314 if (is_read) 315 sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT, buf32, 316 count >> 2); 317 else 318 sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT, buf32, 319 count >> 2); 320 321 /* if count was multiple of 4 */ 322 if (!(count & 0x3)) 323 return; 324 325 buf32 += count >> 2; 326 count %= 4; 327 328 if (is_read) { 329 sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT, &data, 1); 330 memcpy(buf32, &data, count); 331 } else { 332 memcpy(&data, buf32, count); 333 sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT, &data, 1); 334 } 335 336 return; 337 } 338 339 if (is_read) 340 sd_ctrl_read16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1); 341 else 342 sd_ctrl_write16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1); 343 344 /* if count was even number */ 345 if (!(count & 0x1)) 346 return; 347 348 /* if count was odd number */ 349 buf8 = (u8 *)(buf + (count >> 1)); 350 351 /* 352 * FIXME 353 * 354 * driver and this function are assuming that 355 * it is used as little endian 356 */ 357 if (is_read) 358 *buf8 = sd_ctrl_read16(host, CTL_SD_DATA_PORT) & 0xff; 359 else 360 sd_ctrl_write16(host, CTL_SD_DATA_PORT, *buf8); 361 } 362 363 /* 364 * This chip always returns (at least?) as much data as you ask for. 365 * I'm unsure what happens if you ask for less than a block. This should be 366 * looked into to ensure that a funny length read doesn't hose the controller. 367 */ 368 static void tmio_mmc_pio_irq(struct tmio_mmc_host *host) 369 { 370 struct mmc_data *data = host->data; 371 void *sg_virt; 372 unsigned short *buf; 373 unsigned int count; 374 unsigned long flags; 375 376 if (host->dma_on) { 377 pr_err("PIO IRQ in DMA mode!\n"); 378 return; 379 } else if (!data) { 380 pr_debug("Spurious PIO IRQ\n"); 381 return; 382 } 383 384 sg_virt = tmio_mmc_kmap_atomic(host->sg_ptr, &flags); 385 buf = (unsigned short *)(sg_virt + host->sg_off); 386 387 count = host->sg_ptr->length - host->sg_off; 388 if (count > data->blksz) 389 count = data->blksz; 390 391 pr_debug("count: %08x offset: %08x flags %08x\n", 392 count, host->sg_off, data->flags); 393 394 /* Transfer the data */ 395 tmio_mmc_transfer_data(host, buf, count); 396 397 host->sg_off += count; 398 399 tmio_mmc_kunmap_atomic(host->sg_ptr, &flags, sg_virt); 400 401 if (host->sg_off == host->sg_ptr->length) 402 tmio_mmc_next_sg(host); 403 } 404 405 static void tmio_mmc_check_bounce_buffer(struct tmio_mmc_host *host) 406 { 407 if (host->sg_ptr == &host->bounce_sg) { 408 unsigned long flags; 409 void *sg_vaddr = tmio_mmc_kmap_atomic(host->sg_orig, &flags); 410 411 memcpy(sg_vaddr, host->bounce_buf, host->bounce_sg.length); 412 tmio_mmc_kunmap_atomic(host->sg_orig, &flags, sg_vaddr); 413 } 414 } 415 416 /* needs to be called with host->lock held */ 417 void tmio_mmc_do_data_irq(struct tmio_mmc_host *host) 418 { 419 struct mmc_data *data = host->data; 420 struct mmc_command *stop; 421 422 host->data = NULL; 423 424 if (!data) { 425 dev_warn(&host->pdev->dev, "Spurious data end IRQ\n"); 426 return; 427 } 428 stop = data->stop; 429 430 /* FIXME - return correct transfer count on errors */ 431 if (!data->error) 432 data->bytes_xfered = data->blocks * data->blksz; 433 else 434 data->bytes_xfered = 0; 435 436 pr_debug("Completed data request\n"); 437 438 /* 439 * FIXME: other drivers allow an optional stop command of any given type 440 * which we dont do, as the chip can auto generate them. 441 * Perhaps we can be smarter about when to use auto CMD12 and 442 * only issue the auto request when we know this is the desired 443 * stop command, allowing fallback to the stop command the 444 * upper layers expect. For now, we do what works. 445 */ 446 447 if (data->flags & MMC_DATA_READ) { 448 if (host->dma_on) 449 tmio_mmc_check_bounce_buffer(host); 450 dev_dbg(&host->pdev->dev, "Complete Rx request %p\n", 451 host->mrq); 452 } else { 453 dev_dbg(&host->pdev->dev, "Complete Tx request %p\n", 454 host->mrq); 455 } 456 457 if (stop && !host->mrq->sbc) { 458 if (stop->opcode != MMC_STOP_TRANSMISSION || stop->arg) 459 dev_err(&host->pdev->dev, "unsupported stop: CMD%u,0x%x. We did CMD12,0\n", 460 stop->opcode, stop->arg); 461 462 /* fill in response from auto CMD12 */ 463 stop->resp[0] = sd_ctrl_read16_and_16_as_32(host, CTL_RESPONSE); 464 465 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0); 466 } 467 468 schedule_work(&host->done); 469 } 470 EXPORT_SYMBOL_GPL(tmio_mmc_do_data_irq); 471 472 static void tmio_mmc_data_irq(struct tmio_mmc_host *host, unsigned int stat) 473 { 474 struct mmc_data *data; 475 476 spin_lock(&host->lock); 477 data = host->data; 478 479 if (!data) 480 goto out; 481 482 if (stat & TMIO_STAT_CRCFAIL || stat & TMIO_STAT_STOPBIT_ERR || 483 stat & TMIO_STAT_TXUNDERRUN) 484 data->error = -EILSEQ; 485 if (host->dma_on && (data->flags & MMC_DATA_WRITE)) { 486 u32 status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS); 487 bool done = false; 488 489 /* 490 * Has all data been written out yet? Testing on SuperH showed, 491 * that in most cases the first interrupt comes already with the 492 * BUSY status bit clear, but on some operations, like mount or 493 * in the beginning of a write / sync / umount, there is one 494 * DATAEND interrupt with the BUSY bit set, in this cases 495 * waiting for one more interrupt fixes the problem. 496 */ 497 if (host->pdata->flags & TMIO_MMC_HAS_IDLE_WAIT) { 498 if (status & TMIO_STAT_SCLKDIVEN) 499 done = true; 500 } else { 501 if (!(status & TMIO_STAT_CMD_BUSY)) 502 done = true; 503 } 504 505 if (done) { 506 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND); 507 tmio_mmc_dataend_dma(host); 508 } 509 } else if (host->dma_on && (data->flags & MMC_DATA_READ)) { 510 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND); 511 tmio_mmc_dataend_dma(host); 512 } else { 513 tmio_mmc_do_data_irq(host); 514 tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_READOP | TMIO_MASK_WRITEOP); 515 } 516 out: 517 spin_unlock(&host->lock); 518 } 519 520 static void tmio_mmc_cmd_irq(struct tmio_mmc_host *host, unsigned int stat) 521 { 522 struct mmc_command *cmd = host->cmd; 523 int i, addr; 524 525 spin_lock(&host->lock); 526 527 if (!host->cmd) { 528 pr_debug("Spurious CMD irq\n"); 529 goto out; 530 } 531 532 /* This controller is sicker than the PXA one. Not only do we need to 533 * drop the top 8 bits of the first response word, we also need to 534 * modify the order of the response for short response command types. 535 */ 536 537 for (i = 3, addr = CTL_RESPONSE ; i >= 0 ; i--, addr += 4) 538 cmd->resp[i] = sd_ctrl_read16_and_16_as_32(host, addr); 539 540 if (cmd->flags & MMC_RSP_136) { 541 cmd->resp[0] = (cmd->resp[0] << 8) | (cmd->resp[1] >> 24); 542 cmd->resp[1] = (cmd->resp[1] << 8) | (cmd->resp[2] >> 24); 543 cmd->resp[2] = (cmd->resp[2] << 8) | (cmd->resp[3] >> 24); 544 cmd->resp[3] <<= 8; 545 } else if (cmd->flags & MMC_RSP_R3) { 546 cmd->resp[0] = cmd->resp[3]; 547 } 548 549 if (stat & TMIO_STAT_CMDTIMEOUT) 550 cmd->error = -ETIMEDOUT; 551 else if ((stat & TMIO_STAT_CRCFAIL && cmd->flags & MMC_RSP_CRC) || 552 stat & TMIO_STAT_STOPBIT_ERR || 553 stat & TMIO_STAT_CMD_IDX_ERR) 554 cmd->error = -EILSEQ; 555 556 /* If there is data to handle we enable data IRQs here, and 557 * we will ultimatley finish the request in the data_end handler. 558 * If theres no data or we encountered an error, finish now. 559 */ 560 if (host->data && (!cmd->error || cmd->error == -EILSEQ)) { 561 if (host->data->flags & MMC_DATA_READ) { 562 if (!host->dma_on) { 563 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_READOP); 564 } else { 565 tmio_mmc_disable_mmc_irqs(host, 566 TMIO_MASK_READOP); 567 tasklet_schedule(&host->dma_issue); 568 } 569 } else { 570 if (!host->dma_on) { 571 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_WRITEOP); 572 } else { 573 tmio_mmc_disable_mmc_irqs(host, 574 TMIO_MASK_WRITEOP); 575 tasklet_schedule(&host->dma_issue); 576 } 577 } 578 } else { 579 schedule_work(&host->done); 580 } 581 582 out: 583 spin_unlock(&host->lock); 584 } 585 586 static bool __tmio_mmc_card_detect_irq(struct tmio_mmc_host *host, 587 int ireg, int status) 588 { 589 struct mmc_host *mmc = host->mmc; 590 591 /* Card insert / remove attempts */ 592 if (ireg & (TMIO_STAT_CARD_INSERT | TMIO_STAT_CARD_REMOVE)) { 593 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CARD_INSERT | 594 TMIO_STAT_CARD_REMOVE); 595 if ((((ireg & TMIO_STAT_CARD_REMOVE) && mmc->card) || 596 ((ireg & TMIO_STAT_CARD_INSERT) && !mmc->card)) && 597 !work_pending(&mmc->detect.work)) 598 mmc_detect_change(host->mmc, msecs_to_jiffies(100)); 599 return true; 600 } 601 602 return false; 603 } 604 605 static bool __tmio_mmc_sdcard_irq(struct tmio_mmc_host *host, int ireg, 606 int status) 607 { 608 /* Command completion */ 609 if (ireg & (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT)) { 610 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CMDRESPEND | 611 TMIO_STAT_CMDTIMEOUT); 612 tmio_mmc_cmd_irq(host, status); 613 return true; 614 } 615 616 /* Data transfer */ 617 if (ireg & (TMIO_STAT_RXRDY | TMIO_STAT_TXRQ)) { 618 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_RXRDY | TMIO_STAT_TXRQ); 619 tmio_mmc_pio_irq(host); 620 return true; 621 } 622 623 /* Data transfer completion */ 624 if (ireg & TMIO_STAT_DATAEND) { 625 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_DATAEND); 626 tmio_mmc_data_irq(host, status); 627 return true; 628 } 629 630 return false; 631 } 632 633 static bool __tmio_mmc_sdio_irq(struct tmio_mmc_host *host) 634 { 635 struct mmc_host *mmc = host->mmc; 636 struct tmio_mmc_data *pdata = host->pdata; 637 unsigned int ireg, status; 638 unsigned int sdio_status; 639 640 if (!(pdata->flags & TMIO_MMC_SDIO_IRQ)) 641 return false; 642 643 status = sd_ctrl_read16(host, CTL_SDIO_STATUS); 644 ireg = status & TMIO_SDIO_MASK_ALL & ~host->sdio_irq_mask; 645 646 sdio_status = status & ~TMIO_SDIO_MASK_ALL; 647 if (pdata->flags & TMIO_MMC_SDIO_STATUS_SETBITS) 648 sdio_status |= TMIO_SDIO_SETBITS_MASK; 649 650 sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status); 651 652 if (mmc->caps & MMC_CAP_SDIO_IRQ && ireg & TMIO_SDIO_STAT_IOIRQ) 653 mmc_signal_sdio_irq(mmc); 654 655 return ireg; 656 } 657 658 irqreturn_t tmio_mmc_irq(int irq, void *devid) 659 { 660 struct tmio_mmc_host *host = devid; 661 unsigned int ireg, status; 662 663 status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS); 664 ireg = status & TMIO_MASK_IRQ & ~host->sdcard_irq_mask; 665 666 /* Clear the status except the interrupt status */ 667 sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, TMIO_MASK_IRQ); 668 669 if (__tmio_mmc_card_detect_irq(host, ireg, status)) 670 return IRQ_HANDLED; 671 if (__tmio_mmc_sdcard_irq(host, ireg, status)) 672 return IRQ_HANDLED; 673 674 if (__tmio_mmc_sdio_irq(host)) 675 return IRQ_HANDLED; 676 677 return IRQ_NONE; 678 } 679 EXPORT_SYMBOL_GPL(tmio_mmc_irq); 680 681 static int tmio_mmc_start_data(struct tmio_mmc_host *host, 682 struct mmc_data *data) 683 { 684 struct tmio_mmc_data *pdata = host->pdata; 685 686 pr_debug("setup data transfer: blocksize %08x nr_blocks %d\n", 687 data->blksz, data->blocks); 688 689 /* Some hardware cannot perform 2 byte requests in 4/8 bit mode */ 690 if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_4 || 691 host->mmc->ios.bus_width == MMC_BUS_WIDTH_8) { 692 int blksz_2bytes = pdata->flags & TMIO_MMC_BLKSZ_2BYTES; 693 694 if (data->blksz < 2 || (data->blksz < 4 && !blksz_2bytes)) { 695 pr_err("%s: %d byte block unsupported in 4/8 bit mode\n", 696 mmc_hostname(host->mmc), data->blksz); 697 return -EINVAL; 698 } 699 } 700 701 tmio_mmc_init_sg(host, data); 702 host->data = data; 703 host->dma_on = false; 704 705 /* Set transfer length / blocksize */ 706 sd_ctrl_write16(host, CTL_SD_XFER_LEN, data->blksz); 707 if (host->mmc->max_blk_count >= SZ_64K) 708 sd_ctrl_write32(host, CTL_XFER_BLK_COUNT, data->blocks); 709 else 710 sd_ctrl_write16(host, CTL_XFER_BLK_COUNT, data->blocks); 711 712 tmio_mmc_start_dma(host, data); 713 714 return 0; 715 } 716 717 static int tmio_mmc_execute_tuning(struct mmc_host *mmc, u32 opcode) 718 { 719 struct tmio_mmc_host *host = mmc_priv(mmc); 720 int ret; 721 722 if (!host->execute_tuning) 723 return 0; 724 725 ret = host->execute_tuning(host, opcode); 726 727 if (ret < 0) { 728 dev_warn(&host->pdev->dev, "Tuning procedure failed\n"); 729 tmio_mmc_hw_reset(mmc); 730 } 731 732 return ret; 733 } 734 735 static void tmio_process_mrq(struct tmio_mmc_host *host, 736 struct mmc_request *mrq) 737 { 738 struct mmc_command *cmd; 739 int ret; 740 741 if (mrq->sbc && host->cmd != mrq->sbc) { 742 cmd = mrq->sbc; 743 } else { 744 cmd = mrq->cmd; 745 if (mrq->data) { 746 ret = tmio_mmc_start_data(host, mrq->data); 747 if (ret) 748 goto fail; 749 } 750 } 751 752 ret = tmio_mmc_start_command(host, cmd); 753 if (ret) 754 goto fail; 755 756 schedule_delayed_work(&host->delayed_reset_work, 757 msecs_to_jiffies(CMDREQ_TIMEOUT)); 758 return; 759 760 fail: 761 host->mrq = NULL; 762 mrq->cmd->error = ret; 763 mmc_request_done(host->mmc, mrq); 764 } 765 766 /* Process requests from the MMC layer */ 767 static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq) 768 { 769 struct tmio_mmc_host *host = mmc_priv(mmc); 770 unsigned long flags; 771 772 spin_lock_irqsave(&host->lock, flags); 773 774 if (host->mrq) { 775 pr_debug("request not null\n"); 776 if (IS_ERR(host->mrq)) { 777 spin_unlock_irqrestore(&host->lock, flags); 778 mrq->cmd->error = -EAGAIN; 779 mmc_request_done(mmc, mrq); 780 return; 781 } 782 } 783 784 host->last_req_ts = jiffies; 785 wmb(); 786 host->mrq = mrq; 787 788 spin_unlock_irqrestore(&host->lock, flags); 789 790 tmio_process_mrq(host, mrq); 791 } 792 793 static void tmio_mmc_finish_request(struct tmio_mmc_host *host) 794 { 795 struct mmc_request *mrq; 796 unsigned long flags; 797 798 spin_lock_irqsave(&host->lock, flags); 799 800 mrq = host->mrq; 801 if (IS_ERR_OR_NULL(mrq)) { 802 spin_unlock_irqrestore(&host->lock, flags); 803 return; 804 } 805 806 /* If not SET_BLOCK_COUNT, clear old data */ 807 if (host->cmd != mrq->sbc) { 808 host->cmd = NULL; 809 host->data = NULL; 810 host->mrq = NULL; 811 } 812 813 cancel_delayed_work(&host->delayed_reset_work); 814 815 spin_unlock_irqrestore(&host->lock, flags); 816 817 if (mrq->cmd->error || (mrq->data && mrq->data->error)) 818 tmio_mmc_abort_dma(host); 819 820 /* Error means retune, but executed command was still successful */ 821 if (host->check_retune && host->check_retune(host)) 822 mmc_retune_needed(host->mmc); 823 824 /* If SET_BLOCK_COUNT, continue with main command */ 825 if (host->mrq && !mrq->cmd->error) { 826 tmio_process_mrq(host, mrq); 827 return; 828 } 829 830 mmc_request_done(host->mmc, mrq); 831 } 832 833 static void tmio_mmc_done_work(struct work_struct *work) 834 { 835 struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host, 836 done); 837 tmio_mmc_finish_request(host); 838 } 839 840 static void tmio_mmc_power_on(struct tmio_mmc_host *host, unsigned short vdd) 841 { 842 struct mmc_host *mmc = host->mmc; 843 int ret = 0; 844 845 /* .set_ios() is returning void, so, no chance to report an error */ 846 847 if (host->set_pwr) 848 host->set_pwr(host->pdev, 1); 849 850 if (!IS_ERR(mmc->supply.vmmc)) { 851 ret = mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, vdd); 852 /* 853 * Attention: empiric value. With a b43 WiFi SDIO card this 854 * delay proved necessary for reliable card-insertion probing. 855 * 100us were not enough. Is this the same 140us delay, as in 856 * tmio_mmc_set_ios()? 857 */ 858 usleep_range(200, 300); 859 } 860 /* 861 * It seems, VccQ should be switched on after Vcc, this is also what the 862 * omap_hsmmc.c driver does. 863 */ 864 if (!IS_ERR(mmc->supply.vqmmc) && !ret) { 865 ret = regulator_enable(mmc->supply.vqmmc); 866 usleep_range(200, 300); 867 } 868 869 if (ret < 0) 870 dev_dbg(&host->pdev->dev, "Regulators failed to power up: %d\n", 871 ret); 872 } 873 874 static void tmio_mmc_power_off(struct tmio_mmc_host *host) 875 { 876 struct mmc_host *mmc = host->mmc; 877 878 if (!IS_ERR(mmc->supply.vqmmc)) 879 regulator_disable(mmc->supply.vqmmc); 880 881 if (!IS_ERR(mmc->supply.vmmc)) 882 mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0); 883 884 if (host->set_pwr) 885 host->set_pwr(host->pdev, 0); 886 } 887 888 static void tmio_mmc_set_bus_width(struct tmio_mmc_host *host, 889 unsigned char bus_width) 890 { 891 u16 reg = sd_ctrl_read16(host, CTL_SD_MEM_CARD_OPT) 892 & ~(CARD_OPT_WIDTH | CARD_OPT_WIDTH8); 893 894 /* reg now applies to MMC_BUS_WIDTH_4 */ 895 if (bus_width == MMC_BUS_WIDTH_1) 896 reg |= CARD_OPT_WIDTH; 897 else if (bus_width == MMC_BUS_WIDTH_8) 898 reg |= CARD_OPT_WIDTH8; 899 900 sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, reg); 901 } 902 903 /* Set MMC clock / power. 904 * Note: This controller uses a simple divider scheme therefore it cannot 905 * run a MMC card at full speed (20MHz). The max clock is 24MHz on SD, but as 906 * MMC wont run that fast, it has to be clocked at 12MHz which is the next 907 * slowest setting. 908 */ 909 static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) 910 { 911 struct tmio_mmc_host *host = mmc_priv(mmc); 912 struct device *dev = &host->pdev->dev; 913 unsigned long flags; 914 915 mutex_lock(&host->ios_lock); 916 917 spin_lock_irqsave(&host->lock, flags); 918 if (host->mrq) { 919 if (IS_ERR(host->mrq)) { 920 dev_dbg(dev, 921 "%s.%d: concurrent .set_ios(), clk %u, mode %u\n", 922 current->comm, task_pid_nr(current), 923 ios->clock, ios->power_mode); 924 host->mrq = ERR_PTR(-EINTR); 925 } else { 926 dev_dbg(dev, 927 "%s.%d: CMD%u active since %lu, now %lu!\n", 928 current->comm, task_pid_nr(current), 929 host->mrq->cmd->opcode, host->last_req_ts, 930 jiffies); 931 } 932 spin_unlock_irqrestore(&host->lock, flags); 933 934 mutex_unlock(&host->ios_lock); 935 return; 936 } 937 938 host->mrq = ERR_PTR(-EBUSY); 939 940 spin_unlock_irqrestore(&host->lock, flags); 941 942 switch (ios->power_mode) { 943 case MMC_POWER_OFF: 944 tmio_mmc_power_off(host); 945 host->set_clock(host, 0); 946 break; 947 case MMC_POWER_UP: 948 tmio_mmc_power_on(host, ios->vdd); 949 host->set_clock(host, ios->clock); 950 tmio_mmc_set_bus_width(host, ios->bus_width); 951 break; 952 case MMC_POWER_ON: 953 host->set_clock(host, ios->clock); 954 tmio_mmc_set_bus_width(host, ios->bus_width); 955 break; 956 } 957 958 /* Let things settle. delay taken from winCE driver */ 959 usleep_range(140, 200); 960 if (PTR_ERR(host->mrq) == -EINTR) 961 dev_dbg(&host->pdev->dev, 962 "%s.%d: IOS interrupted: clk %u, mode %u", 963 current->comm, task_pid_nr(current), 964 ios->clock, ios->power_mode); 965 host->mrq = NULL; 966 967 host->clk_cache = ios->clock; 968 969 mutex_unlock(&host->ios_lock); 970 } 971 972 static int tmio_mmc_get_ro(struct mmc_host *mmc) 973 { 974 struct tmio_mmc_host *host = mmc_priv(mmc); 975 976 return !(sd_ctrl_read16_and_16_as_32(host, CTL_STATUS) & 977 TMIO_STAT_WRPROTECT); 978 } 979 980 static int tmio_mmc_get_cd(struct mmc_host *mmc) 981 { 982 struct tmio_mmc_host *host = mmc_priv(mmc); 983 984 return !!(sd_ctrl_read16_and_16_as_32(host, CTL_STATUS) & 985 TMIO_STAT_SIGSTATE); 986 } 987 988 static int tmio_multi_io_quirk(struct mmc_card *card, 989 unsigned int direction, int blk_size) 990 { 991 struct tmio_mmc_host *host = mmc_priv(card->host); 992 993 if (host->multi_io_quirk) 994 return host->multi_io_quirk(card, direction, blk_size); 995 996 return blk_size; 997 } 998 999 static struct mmc_host_ops tmio_mmc_ops = { 1000 .request = tmio_mmc_request, 1001 .set_ios = tmio_mmc_set_ios, 1002 .get_ro = tmio_mmc_get_ro, 1003 .get_cd = tmio_mmc_get_cd, 1004 .enable_sdio_irq = tmio_mmc_enable_sdio_irq, 1005 .multi_io_quirk = tmio_multi_io_quirk, 1006 .hw_reset = tmio_mmc_hw_reset, 1007 .execute_tuning = tmio_mmc_execute_tuning, 1008 }; 1009 1010 static int tmio_mmc_init_ocr(struct tmio_mmc_host *host) 1011 { 1012 struct tmio_mmc_data *pdata = host->pdata; 1013 struct mmc_host *mmc = host->mmc; 1014 int err; 1015 1016 err = mmc_regulator_get_supply(mmc); 1017 if (err) 1018 return err; 1019 1020 /* use ocr_mask if no regulator */ 1021 if (!mmc->ocr_avail) 1022 mmc->ocr_avail = pdata->ocr_mask; 1023 1024 /* 1025 * try again. 1026 * There is possibility that regulator has not been probed 1027 */ 1028 if (!mmc->ocr_avail) 1029 return -EPROBE_DEFER; 1030 1031 return 0; 1032 } 1033 1034 static void tmio_mmc_of_parse(struct platform_device *pdev, 1035 struct mmc_host *mmc) 1036 { 1037 const struct device_node *np = pdev->dev.of_node; 1038 1039 if (!np) 1040 return; 1041 1042 /* 1043 * DEPRECATED: 1044 * For new platforms, please use "disable-wp" instead of 1045 * "toshiba,mmc-wrprotect-disable" 1046 */ 1047 if (of_get_property(np, "toshiba,mmc-wrprotect-disable", NULL)) 1048 mmc->caps2 |= MMC_CAP2_NO_WRITE_PROTECT; 1049 } 1050 1051 struct tmio_mmc_host *tmio_mmc_host_alloc(struct platform_device *pdev, 1052 struct tmio_mmc_data *pdata) 1053 { 1054 struct tmio_mmc_host *host; 1055 struct mmc_host *mmc; 1056 void __iomem *ctl; 1057 int ret; 1058 1059 ctl = devm_platform_ioremap_resource(pdev, 0); 1060 if (IS_ERR(ctl)) 1061 return ERR_CAST(ctl); 1062 1063 mmc = mmc_alloc_host(sizeof(struct tmio_mmc_host), &pdev->dev); 1064 if (!mmc) 1065 return ERR_PTR(-ENOMEM); 1066 1067 host = mmc_priv(mmc); 1068 host->ctl = ctl; 1069 host->mmc = mmc; 1070 host->pdev = pdev; 1071 host->pdata = pdata; 1072 host->ops = tmio_mmc_ops; 1073 mmc->ops = &host->ops; 1074 1075 ret = mmc_of_parse(host->mmc); 1076 if (ret) { 1077 host = ERR_PTR(ret); 1078 goto free; 1079 } 1080 1081 tmio_mmc_of_parse(pdev, mmc); 1082 1083 platform_set_drvdata(pdev, host); 1084 1085 return host; 1086 free: 1087 mmc_free_host(mmc); 1088 1089 return host; 1090 } 1091 EXPORT_SYMBOL_GPL(tmio_mmc_host_alloc); 1092 1093 void tmio_mmc_host_free(struct tmio_mmc_host *host) 1094 { 1095 mmc_free_host(host->mmc); 1096 } 1097 EXPORT_SYMBOL_GPL(tmio_mmc_host_free); 1098 1099 int tmio_mmc_host_probe(struct tmio_mmc_host *_host) 1100 { 1101 struct platform_device *pdev = _host->pdev; 1102 struct tmio_mmc_data *pdata = _host->pdata; 1103 struct mmc_host *mmc = _host->mmc; 1104 int ret; 1105 1106 /* 1107 * Check the sanity of mmc->f_min to prevent host->set_clock() from 1108 * looping forever... 1109 */ 1110 if (mmc->f_min == 0) 1111 return -EINVAL; 1112 1113 if (!(pdata->flags & TMIO_MMC_HAS_IDLE_WAIT)) 1114 _host->write16_hook = NULL; 1115 1116 _host->set_pwr = pdata->set_pwr; 1117 1118 ret = tmio_mmc_init_ocr(_host); 1119 if (ret < 0) 1120 return ret; 1121 1122 /* 1123 * Look for a card detect GPIO, if it fails with anything 1124 * else than a probe deferral, just live without it. 1125 */ 1126 ret = mmc_gpiod_request_cd(mmc, "cd", 0, false, 0); 1127 if (ret == -EPROBE_DEFER) 1128 return ret; 1129 1130 mmc->caps |= MMC_CAP_4_BIT_DATA | pdata->capabilities; 1131 mmc->caps2 |= pdata->capabilities2; 1132 mmc->max_segs = pdata->max_segs ? : 32; 1133 mmc->max_blk_size = TMIO_MAX_BLK_SIZE; 1134 mmc->max_blk_count = pdata->max_blk_count ? : 1135 (PAGE_SIZE / mmc->max_blk_size) * mmc->max_segs; 1136 mmc->max_req_size = min_t(size_t, 1137 mmc->max_blk_size * mmc->max_blk_count, 1138 dma_max_mapping_size(&pdev->dev)); 1139 mmc->max_seg_size = mmc->max_req_size; 1140 1141 if (mmc_can_gpio_ro(mmc)) 1142 _host->ops.get_ro = mmc_gpio_get_ro; 1143 1144 if (mmc_can_gpio_cd(mmc)) 1145 _host->ops.get_cd = mmc_gpio_get_cd; 1146 1147 _host->native_hotplug = !(mmc_can_gpio_cd(mmc) || 1148 mmc->caps & MMC_CAP_NEEDS_POLL || 1149 !mmc_card_is_removable(mmc)); 1150 1151 if (!_host->reset) 1152 _host->reset = tmio_mmc_reset; 1153 1154 /* 1155 * On Gen2+, eMMC with NONREMOVABLE currently fails because native 1156 * hotplug gets disabled. It seems RuntimePM related yet we need further 1157 * research. Since we are planning a PM overhaul anyway, let's enforce 1158 * for now the device being active by enabling native hotplug always. 1159 */ 1160 if (pdata->flags & TMIO_MMC_MIN_RCAR2) 1161 _host->native_hotplug = true; 1162 1163 /* 1164 * While using internal tmio hardware logic for card detection, we need 1165 * to ensure it stays powered for it to work. 1166 */ 1167 if (_host->native_hotplug) 1168 pm_runtime_get_noresume(&pdev->dev); 1169 1170 _host->sdio_irq_enabled = false; 1171 if (pdata->flags & TMIO_MMC_SDIO_IRQ) 1172 _host->sdio_irq_mask = TMIO_SDIO_MASK_ALL; 1173 1174 _host->set_clock(_host, 0); 1175 tmio_mmc_hw_reset(mmc); 1176 1177 _host->sdcard_irq_mask = sd_ctrl_read16_and_16_as_32(_host, CTL_IRQ_MASK); 1178 tmio_mmc_disable_mmc_irqs(_host, TMIO_MASK_ALL); 1179 1180 if (_host->native_hotplug) 1181 tmio_mmc_enable_mmc_irqs(_host, 1182 TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT); 1183 1184 spin_lock_init(&_host->lock); 1185 mutex_init(&_host->ios_lock); 1186 1187 /* Init delayed work for request timeouts */ 1188 INIT_DELAYED_WORK(&_host->delayed_reset_work, tmio_mmc_reset_work); 1189 INIT_WORK(&_host->done, tmio_mmc_done_work); 1190 1191 /* See if we also get DMA */ 1192 tmio_mmc_request_dma(_host, pdata); 1193 1194 pm_runtime_get_noresume(&pdev->dev); 1195 pm_runtime_set_active(&pdev->dev); 1196 pm_runtime_set_autosuspend_delay(&pdev->dev, 50); 1197 pm_runtime_use_autosuspend(&pdev->dev); 1198 pm_runtime_enable(&pdev->dev); 1199 1200 ret = mmc_add_host(mmc); 1201 if (ret) 1202 goto remove_host; 1203 1204 dev_pm_qos_expose_latency_limit(&pdev->dev, 100); 1205 pm_runtime_put(&pdev->dev); 1206 1207 return 0; 1208 1209 remove_host: 1210 pm_runtime_put_noidle(&pdev->dev); 1211 tmio_mmc_host_remove(_host); 1212 return ret; 1213 } 1214 EXPORT_SYMBOL_GPL(tmio_mmc_host_probe); 1215 1216 void tmio_mmc_host_remove(struct tmio_mmc_host *host) 1217 { 1218 struct platform_device *pdev = host->pdev; 1219 struct mmc_host *mmc = host->mmc; 1220 1221 pm_runtime_get_sync(&pdev->dev); 1222 1223 if (host->pdata->flags & TMIO_MMC_SDIO_IRQ) 1224 sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0000); 1225 1226 dev_pm_qos_hide_latency_limit(&pdev->dev); 1227 1228 mmc_remove_host(mmc); 1229 cancel_work_sync(&host->done); 1230 cancel_delayed_work_sync(&host->delayed_reset_work); 1231 tmio_mmc_release_dma(host); 1232 tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_ALL); 1233 1234 if (host->native_hotplug) 1235 pm_runtime_put_noidle(&pdev->dev); 1236 1237 pm_runtime_disable(&pdev->dev); 1238 pm_runtime_dont_use_autosuspend(&pdev->dev); 1239 pm_runtime_put_noidle(&pdev->dev); 1240 } 1241 EXPORT_SYMBOL_GPL(tmio_mmc_host_remove); 1242 1243 #ifdef CONFIG_PM 1244 static int tmio_mmc_clk_enable(struct tmio_mmc_host *host) 1245 { 1246 if (!host->clk_enable) 1247 return -ENOTSUPP; 1248 1249 return host->clk_enable(host); 1250 } 1251 1252 static void tmio_mmc_clk_disable(struct tmio_mmc_host *host) 1253 { 1254 if (host->clk_disable) 1255 host->clk_disable(host); 1256 } 1257 1258 int tmio_mmc_host_runtime_suspend(struct device *dev) 1259 { 1260 struct tmio_mmc_host *host = dev_get_drvdata(dev); 1261 1262 tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_ALL); 1263 1264 if (host->clk_cache) 1265 host->set_clock(host, 0); 1266 1267 tmio_mmc_clk_disable(host); 1268 1269 return 0; 1270 } 1271 EXPORT_SYMBOL_GPL(tmio_mmc_host_runtime_suspend); 1272 1273 int tmio_mmc_host_runtime_resume(struct device *dev) 1274 { 1275 struct tmio_mmc_host *host = dev_get_drvdata(dev); 1276 1277 tmio_mmc_clk_enable(host); 1278 tmio_mmc_hw_reset(host->mmc); 1279 1280 if (host->clk_cache) 1281 host->set_clock(host, host->clk_cache); 1282 1283 if (host->native_hotplug) 1284 tmio_mmc_enable_mmc_irqs(host, 1285 TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT); 1286 1287 tmio_mmc_enable_dma(host, true); 1288 1289 mmc_retune_needed(host->mmc); 1290 1291 return 0; 1292 } 1293 EXPORT_SYMBOL_GPL(tmio_mmc_host_runtime_resume); 1294 #endif 1295 1296 MODULE_LICENSE("GPL v2"); 1297