1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Driver for the MMC / SD / SDIO IP found in: 4 * 5 * TC6393XB, TC6391XB, TC6387XB, T7L66XB, ASIC3, SH-Mobile SoCs 6 * 7 * Copyright (C) 2015-19 Renesas Electronics Corporation 8 * Copyright (C) 2016-19 Sang Engineering, Wolfram Sang 9 * Copyright (C) 2017 Horms Solutions, Simon Horman 10 * Copyright (C) 2011 Guennadi Liakhovetski 11 * Copyright (C) 2007 Ian Molton 12 * Copyright (C) 2004 Ian Molton 13 * 14 * This driver draws mainly on scattered spec sheets, Reverse engineering 15 * of the toshiba e800 SD driver and some parts of the 2.4 ASIC3 driver (4 bit 16 * support). (Further 4 bit support from a later datasheet). 17 * 18 * TODO: 19 * Investigate using a workqueue for PIO transfers 20 * Eliminate FIXMEs 21 * Better Power management 22 * Handle MMC errors better 23 * double buffer support 24 * 25 */ 26 27 #include <linux/delay.h> 28 #include <linux/device.h> 29 #include <linux/dma-mapping.h> 30 #include <linux/highmem.h> 31 #include <linux/interrupt.h> 32 #include <linux/io.h> 33 #include <linux/irq.h> 34 #include <linux/mfd/tmio.h> 35 #include <linux/mmc/card.h> 36 #include <linux/mmc/host.h> 37 #include <linux/mmc/mmc.h> 38 #include <linux/mmc/slot-gpio.h> 39 #include <linux/module.h> 40 #include <linux/pagemap.h> 41 #include <linux/platform_device.h> 42 #include <linux/pm_qos.h> 43 #include <linux/pm_runtime.h> 44 #include <linux/regulator/consumer.h> 45 #include <linux/mmc/sdio.h> 46 #include <linux/scatterlist.h> 47 #include <linux/sizes.h> 48 #include <linux/spinlock.h> 49 #include <linux/workqueue.h> 50 51 #include "tmio_mmc.h" 52 53 static inline void tmio_mmc_start_dma(struct tmio_mmc_host *host, 54 struct mmc_data *data) 55 { 56 if (host->dma_ops) 57 host->dma_ops->start(host, data); 58 } 59 60 static inline void tmio_mmc_end_dma(struct tmio_mmc_host *host) 61 { 62 if (host->dma_ops && host->dma_ops->end) 63 host->dma_ops->end(host); 64 } 65 66 static inline void tmio_mmc_enable_dma(struct tmio_mmc_host *host, bool enable) 67 { 68 if (host->dma_ops) 69 host->dma_ops->enable(host, enable); 70 } 71 72 static inline void tmio_mmc_request_dma(struct tmio_mmc_host *host, 73 struct tmio_mmc_data *pdata) 74 { 75 if (host->dma_ops) { 76 host->dma_ops->request(host, pdata); 77 } else { 78 host->chan_tx = NULL; 79 host->chan_rx = NULL; 80 } 81 } 82 83 static inline void tmio_mmc_release_dma(struct tmio_mmc_host *host) 84 { 85 if (host->dma_ops) 86 host->dma_ops->release(host); 87 } 88 89 static inline void tmio_mmc_abort_dma(struct tmio_mmc_host *host) 90 { 91 if (host->dma_ops) 92 host->dma_ops->abort(host); 93 } 94 95 static inline void tmio_mmc_dataend_dma(struct tmio_mmc_host *host) 96 { 97 if (host->dma_ops) 98 host->dma_ops->dataend(host); 99 } 100 101 void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i) 102 { 103 host->sdcard_irq_mask &= ~(i & TMIO_MASK_IRQ); 104 sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask); 105 } 106 EXPORT_SYMBOL_GPL(tmio_mmc_enable_mmc_irqs); 107 108 void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i) 109 { 110 host->sdcard_irq_mask |= (i & TMIO_MASK_IRQ); 111 sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask); 112 } 113 EXPORT_SYMBOL_GPL(tmio_mmc_disable_mmc_irqs); 114 115 static void tmio_mmc_ack_mmc_irqs(struct tmio_mmc_host *host, u32 i) 116 { 117 sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, ~i); 118 } 119 120 static void tmio_mmc_init_sg(struct tmio_mmc_host *host, struct mmc_data *data) 121 { 122 host->sg_len = data->sg_len; 123 host->sg_ptr = data->sg; 124 host->sg_orig = data->sg; 125 host->sg_off = 0; 126 } 127 128 static int tmio_mmc_next_sg(struct tmio_mmc_host *host) 129 { 130 host->sg_ptr = sg_next(host->sg_ptr); 131 host->sg_off = 0; 132 return --host->sg_len; 133 } 134 135 #define CMDREQ_TIMEOUT 5000 136 137 static void tmio_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable) 138 { 139 struct tmio_mmc_host *host = mmc_priv(mmc); 140 141 if (enable && !host->sdio_irq_enabled) { 142 u16 sdio_status; 143 144 /* Keep device active while SDIO irq is enabled */ 145 pm_runtime_get_sync(mmc_dev(mmc)); 146 147 host->sdio_irq_enabled = true; 148 host->sdio_irq_mask = TMIO_SDIO_MASK_ALL & ~TMIO_SDIO_STAT_IOIRQ; 149 150 /* Clear obsolete interrupts before enabling */ 151 sdio_status = sd_ctrl_read16(host, CTL_SDIO_STATUS) & ~TMIO_SDIO_MASK_ALL; 152 if (host->pdata->flags & TMIO_MMC_SDIO_STATUS_SETBITS) 153 sdio_status |= TMIO_SDIO_SETBITS_MASK; 154 sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status); 155 156 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask); 157 } else if (!enable && host->sdio_irq_enabled) { 158 host->sdio_irq_mask = TMIO_SDIO_MASK_ALL; 159 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask); 160 161 host->sdio_irq_enabled = false; 162 pm_runtime_mark_last_busy(mmc_dev(mmc)); 163 pm_runtime_put_autosuspend(mmc_dev(mmc)); 164 } 165 } 166 167 static void tmio_mmc_reset(struct tmio_mmc_host *host) 168 { 169 /* FIXME - should we set stop clock reg here */ 170 sd_ctrl_write16(host, CTL_RESET_SD, 0x0000); 171 usleep_range(10000, 11000); 172 sd_ctrl_write16(host, CTL_RESET_SD, 0x0001); 173 usleep_range(10000, 11000); 174 175 if (host->pdata->flags & TMIO_MMC_SDIO_IRQ) { 176 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask); 177 sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0001); 178 } 179 } 180 181 static void tmio_mmc_hw_reset(struct mmc_host *mmc) 182 { 183 struct tmio_mmc_host *host = mmc_priv(mmc); 184 185 host->reset(host); 186 187 tmio_mmc_abort_dma(host); 188 189 if (host->hw_reset) 190 host->hw_reset(host); 191 } 192 193 static void tmio_mmc_reset_work(struct work_struct *work) 194 { 195 struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host, 196 delayed_reset_work.work); 197 struct mmc_request *mrq; 198 unsigned long flags; 199 200 spin_lock_irqsave(&host->lock, flags); 201 mrq = host->mrq; 202 203 /* 204 * is request already finished? Since we use a non-blocking 205 * cancel_delayed_work(), it can happen, that a .set_ios() call preempts 206 * us, so, have to check for IS_ERR(host->mrq) 207 */ 208 if (IS_ERR_OR_NULL(mrq) || 209 time_is_after_jiffies(host->last_req_ts + 210 msecs_to_jiffies(CMDREQ_TIMEOUT))) { 211 spin_unlock_irqrestore(&host->lock, flags); 212 return; 213 } 214 215 dev_warn(&host->pdev->dev, 216 "timeout waiting for hardware interrupt (CMD%u)\n", 217 mrq->cmd->opcode); 218 219 if (host->data) 220 host->data->error = -ETIMEDOUT; 221 else if (host->cmd) 222 host->cmd->error = -ETIMEDOUT; 223 else 224 mrq->cmd->error = -ETIMEDOUT; 225 226 host->cmd = NULL; 227 host->data = NULL; 228 229 spin_unlock_irqrestore(&host->lock, flags); 230 231 tmio_mmc_hw_reset(host->mmc); 232 233 /* Ready for new calls */ 234 host->mrq = NULL; 235 236 mmc_request_done(host->mmc, mrq); 237 } 238 239 /* These are the bitmasks the tmio chip requires to implement the MMC response 240 * types. Note that R1 and R6 are the same in this scheme. */ 241 #define APP_CMD 0x0040 242 #define RESP_NONE 0x0300 243 #define RESP_R1 0x0400 244 #define RESP_R1B 0x0500 245 #define RESP_R2 0x0600 246 #define RESP_R3 0x0700 247 #define DATA_PRESENT 0x0800 248 #define TRANSFER_READ 0x1000 249 #define TRANSFER_MULTI 0x2000 250 #define SECURITY_CMD 0x4000 251 #define NO_CMD12_ISSUE 0x4000 /* TMIO_MMC_HAVE_CMD12_CTRL */ 252 253 static int tmio_mmc_start_command(struct tmio_mmc_host *host, 254 struct mmc_command *cmd) 255 { 256 struct mmc_data *data = host->data; 257 int c = cmd->opcode; 258 259 switch (mmc_resp_type(cmd)) { 260 case MMC_RSP_NONE: c |= RESP_NONE; break; 261 case MMC_RSP_R1: 262 case MMC_RSP_R1_NO_CRC: 263 c |= RESP_R1; break; 264 case MMC_RSP_R1B: c |= RESP_R1B; break; 265 case MMC_RSP_R2: c |= RESP_R2; break; 266 case MMC_RSP_R3: c |= RESP_R3; break; 267 default: 268 pr_debug("Unknown response type %d\n", mmc_resp_type(cmd)); 269 return -EINVAL; 270 } 271 272 host->cmd = cmd; 273 274 /* FIXME - this seems to be ok commented out but the spec suggest this bit 275 * should be set when issuing app commands. 276 * if(cmd->flags & MMC_FLAG_ACMD) 277 * c |= APP_CMD; 278 */ 279 if (data) { 280 c |= DATA_PRESENT; 281 if (data->blocks > 1) { 282 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, TMIO_STOP_SEC); 283 c |= TRANSFER_MULTI; 284 285 /* 286 * Disable auto CMD12 at IO_RW_EXTENDED and 287 * SET_BLOCK_COUNT when doing multiple block transfer 288 */ 289 if ((host->pdata->flags & TMIO_MMC_HAVE_CMD12_CTRL) && 290 (cmd->opcode == SD_IO_RW_EXTENDED || host->mrq->sbc)) 291 c |= NO_CMD12_ISSUE; 292 } 293 if (data->flags & MMC_DATA_READ) 294 c |= TRANSFER_READ; 295 } 296 297 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_CMD); 298 299 /* Fire off the command */ 300 sd_ctrl_write32_as_16_and_16(host, CTL_ARG_REG, cmd->arg); 301 sd_ctrl_write16(host, CTL_SD_CMD, c); 302 303 return 0; 304 } 305 306 static void tmio_mmc_transfer_data(struct tmio_mmc_host *host, 307 unsigned short *buf, 308 unsigned int count) 309 { 310 int is_read = host->data->flags & MMC_DATA_READ; 311 u8 *buf8; 312 313 /* 314 * Transfer the data 315 */ 316 if (host->pdata->flags & TMIO_MMC_32BIT_DATA_PORT) { 317 u32 data = 0; 318 u32 *buf32 = (u32 *)buf; 319 320 if (is_read) 321 sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT, buf32, 322 count >> 2); 323 else 324 sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT, buf32, 325 count >> 2); 326 327 /* if count was multiple of 4 */ 328 if (!(count & 0x3)) 329 return; 330 331 buf32 += count >> 2; 332 count %= 4; 333 334 if (is_read) { 335 sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT, &data, 1); 336 memcpy(buf32, &data, count); 337 } else { 338 memcpy(&data, buf32, count); 339 sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT, &data, 1); 340 } 341 342 return; 343 } 344 345 if (is_read) 346 sd_ctrl_read16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1); 347 else 348 sd_ctrl_write16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1); 349 350 /* if count was even number */ 351 if (!(count & 0x1)) 352 return; 353 354 /* if count was odd number */ 355 buf8 = (u8 *)(buf + (count >> 1)); 356 357 /* 358 * FIXME 359 * 360 * driver and this function are assuming that 361 * it is used as little endian 362 */ 363 if (is_read) 364 *buf8 = sd_ctrl_read16(host, CTL_SD_DATA_PORT) & 0xff; 365 else 366 sd_ctrl_write16(host, CTL_SD_DATA_PORT, *buf8); 367 } 368 369 /* 370 * This chip always returns (at least?) as much data as you ask for. 371 * I'm unsure what happens if you ask for less than a block. This should be 372 * looked into to ensure that a funny length read doesn't hose the controller. 373 */ 374 static void tmio_mmc_pio_irq(struct tmio_mmc_host *host) 375 { 376 struct mmc_data *data = host->data; 377 void *sg_virt; 378 unsigned short *buf; 379 unsigned int count; 380 unsigned long flags; 381 382 if (host->dma_on) { 383 pr_err("PIO IRQ in DMA mode!\n"); 384 return; 385 } else if (!data) { 386 pr_debug("Spurious PIO IRQ\n"); 387 return; 388 } 389 390 sg_virt = tmio_mmc_kmap_atomic(host->sg_ptr, &flags); 391 buf = (unsigned short *)(sg_virt + host->sg_off); 392 393 count = host->sg_ptr->length - host->sg_off; 394 if (count > data->blksz) 395 count = data->blksz; 396 397 pr_debug("count: %08x offset: %08x flags %08x\n", 398 count, host->sg_off, data->flags); 399 400 /* Transfer the data */ 401 tmio_mmc_transfer_data(host, buf, count); 402 403 host->sg_off += count; 404 405 tmio_mmc_kunmap_atomic(host->sg_ptr, &flags, sg_virt); 406 407 if (host->sg_off == host->sg_ptr->length) 408 tmio_mmc_next_sg(host); 409 } 410 411 static void tmio_mmc_check_bounce_buffer(struct tmio_mmc_host *host) 412 { 413 if (host->sg_ptr == &host->bounce_sg) { 414 unsigned long flags; 415 void *sg_vaddr = tmio_mmc_kmap_atomic(host->sg_orig, &flags); 416 417 memcpy(sg_vaddr, host->bounce_buf, host->bounce_sg.length); 418 tmio_mmc_kunmap_atomic(host->sg_orig, &flags, sg_vaddr); 419 } 420 } 421 422 /* needs to be called with host->lock held */ 423 void tmio_mmc_do_data_irq(struct tmio_mmc_host *host) 424 { 425 struct mmc_data *data = host->data; 426 struct mmc_command *stop; 427 428 host->data = NULL; 429 430 if (!data) { 431 dev_warn(&host->pdev->dev, "Spurious data end IRQ\n"); 432 return; 433 } 434 stop = data->stop; 435 436 /* FIXME - return correct transfer count on errors */ 437 if (!data->error) 438 data->bytes_xfered = data->blocks * data->blksz; 439 else 440 data->bytes_xfered = 0; 441 442 pr_debug("Completed data request\n"); 443 444 /* 445 * FIXME: other drivers allow an optional stop command of any given type 446 * which we dont do, as the chip can auto generate them. 447 * Perhaps we can be smarter about when to use auto CMD12 and 448 * only issue the auto request when we know this is the desired 449 * stop command, allowing fallback to the stop command the 450 * upper layers expect. For now, we do what works. 451 */ 452 453 if (data->flags & MMC_DATA_READ) { 454 if (host->dma_on) 455 tmio_mmc_check_bounce_buffer(host); 456 dev_dbg(&host->pdev->dev, "Complete Rx request %p\n", 457 host->mrq); 458 } else { 459 dev_dbg(&host->pdev->dev, "Complete Tx request %p\n", 460 host->mrq); 461 } 462 463 if (stop && !host->mrq->sbc) { 464 if (stop->opcode != MMC_STOP_TRANSMISSION || stop->arg) 465 dev_err(&host->pdev->dev, "unsupported stop: CMD%u,0x%x. We did CMD12,0\n", 466 stop->opcode, stop->arg); 467 468 /* fill in response from auto CMD12 */ 469 stop->resp[0] = sd_ctrl_read16_and_16_as_32(host, CTL_RESPONSE); 470 471 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0); 472 } 473 474 schedule_work(&host->done); 475 } 476 EXPORT_SYMBOL_GPL(tmio_mmc_do_data_irq); 477 478 static void tmio_mmc_data_irq(struct tmio_mmc_host *host, unsigned int stat) 479 { 480 struct mmc_data *data; 481 482 spin_lock(&host->lock); 483 data = host->data; 484 485 if (!data) 486 goto out; 487 488 if (stat & TMIO_STAT_CRCFAIL || stat & TMIO_STAT_STOPBIT_ERR || 489 stat & TMIO_STAT_TXUNDERRUN) 490 data->error = -EILSEQ; 491 if (host->dma_on && (data->flags & MMC_DATA_WRITE)) { 492 u32 status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS); 493 bool done = false; 494 495 /* 496 * Has all data been written out yet? Testing on SuperH showed, 497 * that in most cases the first interrupt comes already with the 498 * BUSY status bit clear, but on some operations, like mount or 499 * in the beginning of a write / sync / umount, there is one 500 * DATAEND interrupt with the BUSY bit set, in this cases 501 * waiting for one more interrupt fixes the problem. 502 */ 503 if (host->pdata->flags & TMIO_MMC_HAS_IDLE_WAIT) { 504 if (status & TMIO_STAT_SCLKDIVEN) 505 done = true; 506 } else { 507 if (!(status & TMIO_STAT_CMD_BUSY)) 508 done = true; 509 } 510 511 if (done) { 512 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND); 513 tmio_mmc_dataend_dma(host); 514 } 515 } else if (host->dma_on && (data->flags & MMC_DATA_READ)) { 516 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND); 517 tmio_mmc_dataend_dma(host); 518 } else { 519 tmio_mmc_do_data_irq(host); 520 tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_READOP | TMIO_MASK_WRITEOP); 521 } 522 out: 523 spin_unlock(&host->lock); 524 } 525 526 static void tmio_mmc_cmd_irq(struct tmio_mmc_host *host, unsigned int stat) 527 { 528 struct mmc_command *cmd = host->cmd; 529 int i, addr; 530 531 spin_lock(&host->lock); 532 533 if (!host->cmd) { 534 pr_debug("Spurious CMD irq\n"); 535 goto out; 536 } 537 538 /* This controller is sicker than the PXA one. Not only do we need to 539 * drop the top 8 bits of the first response word, we also need to 540 * modify the order of the response for short response command types. 541 */ 542 543 for (i = 3, addr = CTL_RESPONSE ; i >= 0 ; i--, addr += 4) 544 cmd->resp[i] = sd_ctrl_read16_and_16_as_32(host, addr); 545 546 if (cmd->flags & MMC_RSP_136) { 547 cmd->resp[0] = (cmd->resp[0] << 8) | (cmd->resp[1] >> 24); 548 cmd->resp[1] = (cmd->resp[1] << 8) | (cmd->resp[2] >> 24); 549 cmd->resp[2] = (cmd->resp[2] << 8) | (cmd->resp[3] >> 24); 550 cmd->resp[3] <<= 8; 551 } else if (cmd->flags & MMC_RSP_R3) { 552 cmd->resp[0] = cmd->resp[3]; 553 } 554 555 if (stat & TMIO_STAT_CMDTIMEOUT) 556 cmd->error = -ETIMEDOUT; 557 else if ((stat & TMIO_STAT_CRCFAIL && cmd->flags & MMC_RSP_CRC) || 558 stat & TMIO_STAT_STOPBIT_ERR || 559 stat & TMIO_STAT_CMD_IDX_ERR) 560 cmd->error = -EILSEQ; 561 562 /* If there is data to handle we enable data IRQs here, and 563 * we will ultimatley finish the request in the data_end handler. 564 * If theres no data or we encountered an error, finish now. 565 */ 566 if (host->data && (!cmd->error || cmd->error == -EILSEQ)) { 567 if (host->data->flags & MMC_DATA_READ) { 568 if (!host->dma_on) { 569 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_READOP); 570 } else { 571 tmio_mmc_disable_mmc_irqs(host, 572 TMIO_MASK_READOP); 573 tasklet_schedule(&host->dma_issue); 574 } 575 } else { 576 if (!host->dma_on) { 577 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_WRITEOP); 578 } else { 579 tmio_mmc_disable_mmc_irqs(host, 580 TMIO_MASK_WRITEOP); 581 tasklet_schedule(&host->dma_issue); 582 } 583 } 584 } else { 585 schedule_work(&host->done); 586 } 587 588 out: 589 spin_unlock(&host->lock); 590 } 591 592 static bool __tmio_mmc_card_detect_irq(struct tmio_mmc_host *host, 593 int ireg, int status) 594 { 595 struct mmc_host *mmc = host->mmc; 596 597 /* Card insert / remove attempts */ 598 if (ireg & (TMIO_STAT_CARD_INSERT | TMIO_STAT_CARD_REMOVE)) { 599 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CARD_INSERT | 600 TMIO_STAT_CARD_REMOVE); 601 if ((((ireg & TMIO_STAT_CARD_REMOVE) && mmc->card) || 602 ((ireg & TMIO_STAT_CARD_INSERT) && !mmc->card)) && 603 !work_pending(&mmc->detect.work)) 604 mmc_detect_change(host->mmc, msecs_to_jiffies(100)); 605 return true; 606 } 607 608 return false; 609 } 610 611 static bool __tmio_mmc_sdcard_irq(struct tmio_mmc_host *host, int ireg, 612 int status) 613 { 614 /* Command completion */ 615 if (ireg & (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT)) { 616 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CMDRESPEND | 617 TMIO_STAT_CMDTIMEOUT); 618 tmio_mmc_cmd_irq(host, status); 619 return true; 620 } 621 622 /* Data transfer */ 623 if (ireg & (TMIO_STAT_RXRDY | TMIO_STAT_TXRQ)) { 624 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_RXRDY | TMIO_STAT_TXRQ); 625 tmio_mmc_pio_irq(host); 626 return true; 627 } 628 629 /* Data transfer completion */ 630 if (ireg & TMIO_STAT_DATAEND) { 631 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_DATAEND); 632 tmio_mmc_data_irq(host, status); 633 return true; 634 } 635 636 return false; 637 } 638 639 static bool __tmio_mmc_sdio_irq(struct tmio_mmc_host *host) 640 { 641 struct mmc_host *mmc = host->mmc; 642 struct tmio_mmc_data *pdata = host->pdata; 643 unsigned int ireg, status; 644 unsigned int sdio_status; 645 646 if (!(pdata->flags & TMIO_MMC_SDIO_IRQ)) 647 return false; 648 649 status = sd_ctrl_read16(host, CTL_SDIO_STATUS); 650 ireg = status & TMIO_SDIO_MASK_ALL & ~host->sdio_irq_mask; 651 652 sdio_status = status & ~TMIO_SDIO_MASK_ALL; 653 if (pdata->flags & TMIO_MMC_SDIO_STATUS_SETBITS) 654 sdio_status |= TMIO_SDIO_SETBITS_MASK; 655 656 sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status); 657 658 if (mmc->caps & MMC_CAP_SDIO_IRQ && ireg & TMIO_SDIO_STAT_IOIRQ) 659 mmc_signal_sdio_irq(mmc); 660 661 return ireg; 662 } 663 664 irqreturn_t tmio_mmc_irq(int irq, void *devid) 665 { 666 struct tmio_mmc_host *host = devid; 667 unsigned int ireg, status; 668 669 status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS); 670 ireg = status & TMIO_MASK_IRQ & ~host->sdcard_irq_mask; 671 672 /* Clear the status except the interrupt status */ 673 sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, TMIO_MASK_IRQ); 674 675 if (__tmio_mmc_card_detect_irq(host, ireg, status)) 676 return IRQ_HANDLED; 677 if (__tmio_mmc_sdcard_irq(host, ireg, status)) 678 return IRQ_HANDLED; 679 680 if (__tmio_mmc_sdio_irq(host)) 681 return IRQ_HANDLED; 682 683 return IRQ_NONE; 684 } 685 EXPORT_SYMBOL_GPL(tmio_mmc_irq); 686 687 static int tmio_mmc_start_data(struct tmio_mmc_host *host, 688 struct mmc_data *data) 689 { 690 struct tmio_mmc_data *pdata = host->pdata; 691 692 pr_debug("setup data transfer: blocksize %08x nr_blocks %d\n", 693 data->blksz, data->blocks); 694 695 /* Some hardware cannot perform 2 byte requests in 4/8 bit mode */ 696 if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_4 || 697 host->mmc->ios.bus_width == MMC_BUS_WIDTH_8) { 698 int blksz_2bytes = pdata->flags & TMIO_MMC_BLKSZ_2BYTES; 699 700 if (data->blksz < 2 || (data->blksz < 4 && !blksz_2bytes)) { 701 pr_err("%s: %d byte block unsupported in 4/8 bit mode\n", 702 mmc_hostname(host->mmc), data->blksz); 703 return -EINVAL; 704 } 705 } 706 707 tmio_mmc_init_sg(host, data); 708 host->data = data; 709 host->dma_on = false; 710 711 /* Set transfer length / blocksize */ 712 sd_ctrl_write16(host, CTL_SD_XFER_LEN, data->blksz); 713 if (host->mmc->max_blk_count >= SZ_64K) 714 sd_ctrl_write32(host, CTL_XFER_BLK_COUNT, data->blocks); 715 else 716 sd_ctrl_write16(host, CTL_XFER_BLK_COUNT, data->blocks); 717 718 tmio_mmc_start_dma(host, data); 719 720 return 0; 721 } 722 723 static int tmio_mmc_execute_tuning(struct mmc_host *mmc, u32 opcode) 724 { 725 struct tmio_mmc_host *host = mmc_priv(mmc); 726 int ret; 727 728 if (!host->execute_tuning) 729 return 0; 730 731 ret = host->execute_tuning(host, opcode); 732 733 if (ret < 0) { 734 dev_warn(&host->pdev->dev, "Tuning procedure failed\n"); 735 tmio_mmc_hw_reset(mmc); 736 } 737 738 return ret; 739 } 740 741 static void tmio_process_mrq(struct tmio_mmc_host *host, 742 struct mmc_request *mrq) 743 { 744 struct mmc_command *cmd; 745 int ret; 746 747 if (mrq->sbc && host->cmd != mrq->sbc) { 748 cmd = mrq->sbc; 749 } else { 750 cmd = mrq->cmd; 751 if (mrq->data) { 752 ret = tmio_mmc_start_data(host, mrq->data); 753 if (ret) 754 goto fail; 755 } 756 } 757 758 ret = tmio_mmc_start_command(host, cmd); 759 if (ret) 760 goto fail; 761 762 schedule_delayed_work(&host->delayed_reset_work, 763 msecs_to_jiffies(CMDREQ_TIMEOUT)); 764 return; 765 766 fail: 767 host->mrq = NULL; 768 mrq->cmd->error = ret; 769 mmc_request_done(host->mmc, mrq); 770 } 771 772 /* Process requests from the MMC layer */ 773 static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq) 774 { 775 struct tmio_mmc_host *host = mmc_priv(mmc); 776 unsigned long flags; 777 778 spin_lock_irqsave(&host->lock, flags); 779 780 if (host->mrq) { 781 pr_debug("request not null\n"); 782 if (IS_ERR(host->mrq)) { 783 spin_unlock_irqrestore(&host->lock, flags); 784 mrq->cmd->error = -EAGAIN; 785 mmc_request_done(mmc, mrq); 786 return; 787 } 788 } 789 790 host->last_req_ts = jiffies; 791 wmb(); 792 host->mrq = mrq; 793 794 spin_unlock_irqrestore(&host->lock, flags); 795 796 tmio_process_mrq(host, mrq); 797 } 798 799 static void tmio_mmc_finish_request(struct tmio_mmc_host *host) 800 { 801 struct mmc_request *mrq; 802 unsigned long flags; 803 804 spin_lock_irqsave(&host->lock, flags); 805 806 tmio_mmc_end_dma(host); 807 808 mrq = host->mrq; 809 if (IS_ERR_OR_NULL(mrq)) { 810 spin_unlock_irqrestore(&host->lock, flags); 811 return; 812 } 813 814 /* If not SET_BLOCK_COUNT, clear old data */ 815 if (host->cmd != mrq->sbc) { 816 host->cmd = NULL; 817 host->data = NULL; 818 host->mrq = NULL; 819 } 820 821 cancel_delayed_work(&host->delayed_reset_work); 822 823 spin_unlock_irqrestore(&host->lock, flags); 824 825 if (mrq->cmd->error || (mrq->data && mrq->data->error)) 826 tmio_mmc_abort_dma(host); 827 828 /* Error means retune, but executed command was still successful */ 829 if (host->check_retune && host->check_retune(host)) 830 mmc_retune_needed(host->mmc); 831 832 /* If SET_BLOCK_COUNT, continue with main command */ 833 if (host->mrq && !mrq->cmd->error) { 834 tmio_process_mrq(host, mrq); 835 return; 836 } 837 838 mmc_request_done(host->mmc, mrq); 839 } 840 841 static void tmio_mmc_done_work(struct work_struct *work) 842 { 843 struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host, 844 done); 845 tmio_mmc_finish_request(host); 846 } 847 848 static void tmio_mmc_power_on(struct tmio_mmc_host *host, unsigned short vdd) 849 { 850 struct mmc_host *mmc = host->mmc; 851 int ret = 0; 852 853 /* .set_ios() is returning void, so, no chance to report an error */ 854 855 if (host->set_pwr) 856 host->set_pwr(host->pdev, 1); 857 858 if (!IS_ERR(mmc->supply.vmmc)) { 859 ret = mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, vdd); 860 /* 861 * Attention: empiric value. With a b43 WiFi SDIO card this 862 * delay proved necessary for reliable card-insertion probing. 863 * 100us were not enough. Is this the same 140us delay, as in 864 * tmio_mmc_set_ios()? 865 */ 866 usleep_range(200, 300); 867 } 868 /* 869 * It seems, VccQ should be switched on after Vcc, this is also what the 870 * omap_hsmmc.c driver does. 871 */ 872 if (!IS_ERR(mmc->supply.vqmmc) && !ret) { 873 ret = regulator_enable(mmc->supply.vqmmc); 874 usleep_range(200, 300); 875 } 876 877 if (ret < 0) 878 dev_dbg(&host->pdev->dev, "Regulators failed to power up: %d\n", 879 ret); 880 } 881 882 static void tmio_mmc_power_off(struct tmio_mmc_host *host) 883 { 884 struct mmc_host *mmc = host->mmc; 885 886 if (!IS_ERR(mmc->supply.vqmmc)) 887 regulator_disable(mmc->supply.vqmmc); 888 889 if (!IS_ERR(mmc->supply.vmmc)) 890 mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0); 891 892 if (host->set_pwr) 893 host->set_pwr(host->pdev, 0); 894 } 895 896 static void tmio_mmc_set_bus_width(struct tmio_mmc_host *host, 897 unsigned char bus_width) 898 { 899 u16 reg = sd_ctrl_read16(host, CTL_SD_MEM_CARD_OPT) 900 & ~(CARD_OPT_WIDTH | CARD_OPT_WIDTH8); 901 902 /* reg now applies to MMC_BUS_WIDTH_4 */ 903 if (bus_width == MMC_BUS_WIDTH_1) 904 reg |= CARD_OPT_WIDTH; 905 else if (bus_width == MMC_BUS_WIDTH_8) 906 reg |= CARD_OPT_WIDTH8; 907 908 sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, reg); 909 } 910 911 /* Set MMC clock / power. 912 * Note: This controller uses a simple divider scheme therefore it cannot 913 * run a MMC card at full speed (20MHz). The max clock is 24MHz on SD, but as 914 * MMC wont run that fast, it has to be clocked at 12MHz which is the next 915 * slowest setting. 916 */ 917 static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) 918 { 919 struct tmio_mmc_host *host = mmc_priv(mmc); 920 struct device *dev = &host->pdev->dev; 921 unsigned long flags; 922 923 mutex_lock(&host->ios_lock); 924 925 spin_lock_irqsave(&host->lock, flags); 926 if (host->mrq) { 927 if (IS_ERR(host->mrq)) { 928 dev_dbg(dev, 929 "%s.%d: concurrent .set_ios(), clk %u, mode %u\n", 930 current->comm, task_pid_nr(current), 931 ios->clock, ios->power_mode); 932 host->mrq = ERR_PTR(-EINTR); 933 } else { 934 dev_dbg(dev, 935 "%s.%d: CMD%u active since %lu, now %lu!\n", 936 current->comm, task_pid_nr(current), 937 host->mrq->cmd->opcode, host->last_req_ts, 938 jiffies); 939 } 940 spin_unlock_irqrestore(&host->lock, flags); 941 942 mutex_unlock(&host->ios_lock); 943 return; 944 } 945 946 host->mrq = ERR_PTR(-EBUSY); 947 948 spin_unlock_irqrestore(&host->lock, flags); 949 950 switch (ios->power_mode) { 951 case MMC_POWER_OFF: 952 tmio_mmc_power_off(host); 953 host->set_clock(host, 0); 954 break; 955 case MMC_POWER_UP: 956 tmio_mmc_power_on(host, ios->vdd); 957 host->set_clock(host, ios->clock); 958 tmio_mmc_set_bus_width(host, ios->bus_width); 959 break; 960 case MMC_POWER_ON: 961 host->set_clock(host, ios->clock); 962 tmio_mmc_set_bus_width(host, ios->bus_width); 963 break; 964 } 965 966 /* Let things settle. delay taken from winCE driver */ 967 usleep_range(140, 200); 968 if (PTR_ERR(host->mrq) == -EINTR) 969 dev_dbg(&host->pdev->dev, 970 "%s.%d: IOS interrupted: clk %u, mode %u", 971 current->comm, task_pid_nr(current), 972 ios->clock, ios->power_mode); 973 host->mrq = NULL; 974 975 host->clk_cache = ios->clock; 976 977 mutex_unlock(&host->ios_lock); 978 } 979 980 static int tmio_mmc_get_ro(struct mmc_host *mmc) 981 { 982 struct tmio_mmc_host *host = mmc_priv(mmc); 983 984 return !(sd_ctrl_read16_and_16_as_32(host, CTL_STATUS) & 985 TMIO_STAT_WRPROTECT); 986 } 987 988 static int tmio_mmc_get_cd(struct mmc_host *mmc) 989 { 990 struct tmio_mmc_host *host = mmc_priv(mmc); 991 992 return !!(sd_ctrl_read16_and_16_as_32(host, CTL_STATUS) & 993 TMIO_STAT_SIGSTATE); 994 } 995 996 static int tmio_multi_io_quirk(struct mmc_card *card, 997 unsigned int direction, int blk_size) 998 { 999 struct tmio_mmc_host *host = mmc_priv(card->host); 1000 1001 if (host->multi_io_quirk) 1002 return host->multi_io_quirk(card, direction, blk_size); 1003 1004 return blk_size; 1005 } 1006 1007 static struct mmc_host_ops tmio_mmc_ops = { 1008 .request = tmio_mmc_request, 1009 .set_ios = tmio_mmc_set_ios, 1010 .get_ro = tmio_mmc_get_ro, 1011 .get_cd = tmio_mmc_get_cd, 1012 .enable_sdio_irq = tmio_mmc_enable_sdio_irq, 1013 .multi_io_quirk = tmio_multi_io_quirk, 1014 .hw_reset = tmio_mmc_hw_reset, 1015 .execute_tuning = tmio_mmc_execute_tuning, 1016 }; 1017 1018 static int tmio_mmc_init_ocr(struct tmio_mmc_host *host) 1019 { 1020 struct tmio_mmc_data *pdata = host->pdata; 1021 struct mmc_host *mmc = host->mmc; 1022 int err; 1023 1024 err = mmc_regulator_get_supply(mmc); 1025 if (err) 1026 return err; 1027 1028 /* use ocr_mask if no regulator */ 1029 if (!mmc->ocr_avail) 1030 mmc->ocr_avail = pdata->ocr_mask; 1031 1032 /* 1033 * try again. 1034 * There is possibility that regulator has not been probed 1035 */ 1036 if (!mmc->ocr_avail) 1037 return -EPROBE_DEFER; 1038 1039 return 0; 1040 } 1041 1042 static void tmio_mmc_of_parse(struct platform_device *pdev, 1043 struct mmc_host *mmc) 1044 { 1045 const struct device_node *np = pdev->dev.of_node; 1046 1047 if (!np) 1048 return; 1049 1050 /* 1051 * DEPRECATED: 1052 * For new platforms, please use "disable-wp" instead of 1053 * "toshiba,mmc-wrprotect-disable" 1054 */ 1055 if (of_get_property(np, "toshiba,mmc-wrprotect-disable", NULL)) 1056 mmc->caps2 |= MMC_CAP2_NO_WRITE_PROTECT; 1057 } 1058 1059 struct tmio_mmc_host *tmio_mmc_host_alloc(struct platform_device *pdev, 1060 struct tmio_mmc_data *pdata) 1061 { 1062 struct tmio_mmc_host *host; 1063 struct mmc_host *mmc; 1064 void __iomem *ctl; 1065 int ret; 1066 1067 ctl = devm_platform_ioremap_resource(pdev, 0); 1068 if (IS_ERR(ctl)) 1069 return ERR_CAST(ctl); 1070 1071 mmc = mmc_alloc_host(sizeof(struct tmio_mmc_host), &pdev->dev); 1072 if (!mmc) 1073 return ERR_PTR(-ENOMEM); 1074 1075 host = mmc_priv(mmc); 1076 host->ctl = ctl; 1077 host->mmc = mmc; 1078 host->pdev = pdev; 1079 host->pdata = pdata; 1080 host->ops = tmio_mmc_ops; 1081 mmc->ops = &host->ops; 1082 1083 ret = mmc_of_parse(host->mmc); 1084 if (ret) { 1085 host = ERR_PTR(ret); 1086 goto free; 1087 } 1088 1089 tmio_mmc_of_parse(pdev, mmc); 1090 1091 platform_set_drvdata(pdev, host); 1092 1093 return host; 1094 free: 1095 mmc_free_host(mmc); 1096 1097 return host; 1098 } 1099 EXPORT_SYMBOL_GPL(tmio_mmc_host_alloc); 1100 1101 void tmio_mmc_host_free(struct tmio_mmc_host *host) 1102 { 1103 mmc_free_host(host->mmc); 1104 } 1105 EXPORT_SYMBOL_GPL(tmio_mmc_host_free); 1106 1107 int tmio_mmc_host_probe(struct tmio_mmc_host *_host) 1108 { 1109 struct platform_device *pdev = _host->pdev; 1110 struct tmio_mmc_data *pdata = _host->pdata; 1111 struct mmc_host *mmc = _host->mmc; 1112 int ret; 1113 1114 /* 1115 * Check the sanity of mmc->f_min to prevent host->set_clock() from 1116 * looping forever... 1117 */ 1118 if (mmc->f_min == 0) 1119 return -EINVAL; 1120 1121 if (!(pdata->flags & TMIO_MMC_HAS_IDLE_WAIT)) 1122 _host->write16_hook = NULL; 1123 1124 _host->set_pwr = pdata->set_pwr; 1125 1126 ret = tmio_mmc_init_ocr(_host); 1127 if (ret < 0) 1128 return ret; 1129 1130 /* 1131 * Look for a card detect GPIO, if it fails with anything 1132 * else than a probe deferral, just live without it. 1133 */ 1134 ret = mmc_gpiod_request_cd(mmc, "cd", 0, false, 0); 1135 if (ret == -EPROBE_DEFER) 1136 return ret; 1137 1138 mmc->caps |= MMC_CAP_4_BIT_DATA | pdata->capabilities; 1139 mmc->caps2 |= pdata->capabilities2; 1140 mmc->max_segs = pdata->max_segs ? : 32; 1141 mmc->max_blk_size = TMIO_MAX_BLK_SIZE; 1142 mmc->max_blk_count = pdata->max_blk_count ? : 1143 (PAGE_SIZE / mmc->max_blk_size) * mmc->max_segs; 1144 mmc->max_req_size = min_t(size_t, 1145 mmc->max_blk_size * mmc->max_blk_count, 1146 dma_max_mapping_size(&pdev->dev)); 1147 mmc->max_seg_size = mmc->max_req_size; 1148 1149 if (mmc_can_gpio_ro(mmc)) 1150 _host->ops.get_ro = mmc_gpio_get_ro; 1151 1152 if (mmc_can_gpio_cd(mmc)) 1153 _host->ops.get_cd = mmc_gpio_get_cd; 1154 1155 _host->native_hotplug = !(mmc_can_gpio_cd(mmc) || 1156 mmc->caps & MMC_CAP_NEEDS_POLL || 1157 !mmc_card_is_removable(mmc)); 1158 1159 if (!_host->reset) 1160 _host->reset = tmio_mmc_reset; 1161 1162 /* 1163 * On Gen2+, eMMC with NONREMOVABLE currently fails because native 1164 * hotplug gets disabled. It seems RuntimePM related yet we need further 1165 * research. Since we are planning a PM overhaul anyway, let's enforce 1166 * for now the device being active by enabling native hotplug always. 1167 */ 1168 if (pdata->flags & TMIO_MMC_MIN_RCAR2) 1169 _host->native_hotplug = true; 1170 1171 /* 1172 * While using internal tmio hardware logic for card detection, we need 1173 * to ensure it stays powered for it to work. 1174 */ 1175 if (_host->native_hotplug) 1176 pm_runtime_get_noresume(&pdev->dev); 1177 1178 _host->sdio_irq_enabled = false; 1179 if (pdata->flags & TMIO_MMC_SDIO_IRQ) 1180 _host->sdio_irq_mask = TMIO_SDIO_MASK_ALL; 1181 1182 _host->set_clock(_host, 0); 1183 tmio_mmc_hw_reset(mmc); 1184 1185 _host->sdcard_irq_mask = sd_ctrl_read16_and_16_as_32(_host, CTL_IRQ_MASK); 1186 tmio_mmc_disable_mmc_irqs(_host, TMIO_MASK_ALL); 1187 1188 if (_host->native_hotplug) 1189 tmio_mmc_enable_mmc_irqs(_host, 1190 TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT); 1191 1192 spin_lock_init(&_host->lock); 1193 mutex_init(&_host->ios_lock); 1194 1195 /* Init delayed work for request timeouts */ 1196 INIT_DELAYED_WORK(&_host->delayed_reset_work, tmio_mmc_reset_work); 1197 INIT_WORK(&_host->done, tmio_mmc_done_work); 1198 1199 /* See if we also get DMA */ 1200 tmio_mmc_request_dma(_host, pdata); 1201 1202 pm_runtime_get_noresume(&pdev->dev); 1203 pm_runtime_set_active(&pdev->dev); 1204 pm_runtime_set_autosuspend_delay(&pdev->dev, 50); 1205 pm_runtime_use_autosuspend(&pdev->dev); 1206 pm_runtime_enable(&pdev->dev); 1207 1208 ret = mmc_add_host(mmc); 1209 if (ret) 1210 goto remove_host; 1211 1212 dev_pm_qos_expose_latency_limit(&pdev->dev, 100); 1213 pm_runtime_put(&pdev->dev); 1214 1215 return 0; 1216 1217 remove_host: 1218 pm_runtime_put_noidle(&pdev->dev); 1219 tmio_mmc_host_remove(_host); 1220 return ret; 1221 } 1222 EXPORT_SYMBOL_GPL(tmio_mmc_host_probe); 1223 1224 void tmio_mmc_host_remove(struct tmio_mmc_host *host) 1225 { 1226 struct platform_device *pdev = host->pdev; 1227 struct mmc_host *mmc = host->mmc; 1228 1229 pm_runtime_get_sync(&pdev->dev); 1230 1231 if (host->pdata->flags & TMIO_MMC_SDIO_IRQ) 1232 sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0000); 1233 1234 dev_pm_qos_hide_latency_limit(&pdev->dev); 1235 1236 mmc_remove_host(mmc); 1237 cancel_work_sync(&host->done); 1238 cancel_delayed_work_sync(&host->delayed_reset_work); 1239 tmio_mmc_release_dma(host); 1240 tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_ALL); 1241 1242 if (host->native_hotplug) 1243 pm_runtime_put_noidle(&pdev->dev); 1244 1245 pm_runtime_disable(&pdev->dev); 1246 pm_runtime_dont_use_autosuspend(&pdev->dev); 1247 pm_runtime_put_noidle(&pdev->dev); 1248 } 1249 EXPORT_SYMBOL_GPL(tmio_mmc_host_remove); 1250 1251 #ifdef CONFIG_PM 1252 static int tmio_mmc_clk_enable(struct tmio_mmc_host *host) 1253 { 1254 if (!host->clk_enable) 1255 return -ENOTSUPP; 1256 1257 return host->clk_enable(host); 1258 } 1259 1260 static void tmio_mmc_clk_disable(struct tmio_mmc_host *host) 1261 { 1262 if (host->clk_disable) 1263 host->clk_disable(host); 1264 } 1265 1266 int tmio_mmc_host_runtime_suspend(struct device *dev) 1267 { 1268 struct tmio_mmc_host *host = dev_get_drvdata(dev); 1269 1270 tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_ALL); 1271 1272 if (host->clk_cache) 1273 host->set_clock(host, 0); 1274 1275 tmio_mmc_clk_disable(host); 1276 1277 return 0; 1278 } 1279 EXPORT_SYMBOL_GPL(tmio_mmc_host_runtime_suspend); 1280 1281 int tmio_mmc_host_runtime_resume(struct device *dev) 1282 { 1283 struct tmio_mmc_host *host = dev_get_drvdata(dev); 1284 1285 tmio_mmc_clk_enable(host); 1286 tmio_mmc_hw_reset(host->mmc); 1287 1288 if (host->clk_cache) 1289 host->set_clock(host, host->clk_cache); 1290 1291 if (host->native_hotplug) 1292 tmio_mmc_enable_mmc_irqs(host, 1293 TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT); 1294 1295 tmio_mmc_enable_dma(host, true); 1296 1297 mmc_retune_needed(host->mmc); 1298 1299 return 0; 1300 } 1301 EXPORT_SYMBOL_GPL(tmio_mmc_host_runtime_resume); 1302 #endif 1303 1304 MODULE_LICENSE("GPL v2"); 1305