1 /* 2 * Driver for the MMC / SD / SDIO IP found in: 3 * 4 * TC6393XB, TC6391XB, TC6387XB, T7L66XB, ASIC3, SH-Mobile SoCs 5 * 6 * Copyright (C) 2015-17 Renesas Electronics Corporation 7 * Copyright (C) 2016-17 Sang Engineering, Wolfram Sang 8 * Copyright (C) 2017 Horms Solutions, Simon Horman 9 * Copyright (C) 2011 Guennadi Liakhovetski 10 * Copyright (C) 2007 Ian Molton 11 * Copyright (C) 2004 Ian Molton 12 * 13 * This program is free software; you can redistribute it and/or modify 14 * it under the terms of the GNU General Public License version 2 as 15 * published by the Free Software Foundation. 16 * 17 * This driver draws mainly on scattered spec sheets, Reverse engineering 18 * of the toshiba e800 SD driver and some parts of the 2.4 ASIC3 driver (4 bit 19 * support). (Further 4 bit support from a later datasheet). 20 * 21 * TODO: 22 * Investigate using a workqueue for PIO transfers 23 * Eliminate FIXMEs 24 * Better Power management 25 * Handle MMC errors better 26 * double buffer support 27 * 28 */ 29 30 #include <linux/delay.h> 31 #include <linux/device.h> 32 #include <linux/highmem.h> 33 #include <linux/interrupt.h> 34 #include <linux/io.h> 35 #include <linux/irq.h> 36 #include <linux/mfd/tmio.h> 37 #include <linux/mmc/card.h> 38 #include <linux/mmc/host.h> 39 #include <linux/mmc/mmc.h> 40 #include <linux/mmc/slot-gpio.h> 41 #include <linux/module.h> 42 #include <linux/pagemap.h> 43 #include <linux/platform_device.h> 44 #include <linux/pm_qos.h> 45 #include <linux/pm_runtime.h> 46 #include <linux/regulator/consumer.h> 47 #include <linux/mmc/sdio.h> 48 #include <linux/scatterlist.h> 49 #include <linux/spinlock.h> 50 #include <linux/workqueue.h> 51 52 #include "tmio_mmc.h" 53 54 static inline void tmio_mmc_start_dma(struct tmio_mmc_host *host, 55 struct mmc_data *data) 56 { 57 if (host->dma_ops) 58 host->dma_ops->start(host, data); 59 } 60 61 static inline void tmio_mmc_enable_dma(struct tmio_mmc_host *host, bool enable) 62 { 63 if (host->dma_ops) 64 host->dma_ops->enable(host, enable); 65 } 66 67 static inline void tmio_mmc_request_dma(struct tmio_mmc_host *host, 68 struct tmio_mmc_data *pdata) 69 { 70 if (host->dma_ops) { 71 host->dma_ops->request(host, pdata); 72 } else { 73 host->chan_tx = NULL; 74 host->chan_rx = NULL; 75 } 76 } 77 78 static inline void tmio_mmc_release_dma(struct tmio_mmc_host *host) 79 { 80 if (host->dma_ops) 81 host->dma_ops->release(host); 82 } 83 84 static inline void tmio_mmc_abort_dma(struct tmio_mmc_host *host) 85 { 86 if (host->dma_ops) 87 host->dma_ops->abort(host); 88 } 89 90 void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i) 91 { 92 host->sdcard_irq_mask &= ~(i & TMIO_MASK_IRQ); 93 sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask); 94 } 95 EXPORT_SYMBOL_GPL(tmio_mmc_enable_mmc_irqs); 96 97 void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i) 98 { 99 host->sdcard_irq_mask |= (i & TMIO_MASK_IRQ); 100 sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask); 101 } 102 EXPORT_SYMBOL_GPL(tmio_mmc_disable_mmc_irqs); 103 104 static void tmio_mmc_ack_mmc_irqs(struct tmio_mmc_host *host, u32 i) 105 { 106 sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, ~i); 107 } 108 109 static void tmio_mmc_init_sg(struct tmio_mmc_host *host, struct mmc_data *data) 110 { 111 host->sg_len = data->sg_len; 112 host->sg_ptr = data->sg; 113 host->sg_orig = data->sg; 114 host->sg_off = 0; 115 } 116 117 static int tmio_mmc_next_sg(struct tmio_mmc_host *host) 118 { 119 host->sg_ptr = sg_next(host->sg_ptr); 120 host->sg_off = 0; 121 return --host->sg_len; 122 } 123 124 #define CMDREQ_TIMEOUT 5000 125 126 #ifdef CONFIG_MMC_DEBUG 127 128 #define STATUS_TO_TEXT(a, status, i) \ 129 do { \ 130 if ((status) & TMIO_STAT_##a) { \ 131 if ((i)++) \ 132 printk(KERN_DEBUG " | "); \ 133 printk(KERN_DEBUG #a); \ 134 } \ 135 } while (0) 136 137 static void pr_debug_status(u32 status) 138 { 139 int i = 0; 140 141 pr_debug("status: %08x = ", status); 142 STATUS_TO_TEXT(CARD_REMOVE, status, i); 143 STATUS_TO_TEXT(CARD_INSERT, status, i); 144 STATUS_TO_TEXT(SIGSTATE, status, i); 145 STATUS_TO_TEXT(WRPROTECT, status, i); 146 STATUS_TO_TEXT(CARD_REMOVE_A, status, i); 147 STATUS_TO_TEXT(CARD_INSERT_A, status, i); 148 STATUS_TO_TEXT(SIGSTATE_A, status, i); 149 STATUS_TO_TEXT(CMD_IDX_ERR, status, i); 150 STATUS_TO_TEXT(STOPBIT_ERR, status, i); 151 STATUS_TO_TEXT(ILL_FUNC, status, i); 152 STATUS_TO_TEXT(CMD_BUSY, status, i); 153 STATUS_TO_TEXT(CMDRESPEND, status, i); 154 STATUS_TO_TEXT(DATAEND, status, i); 155 STATUS_TO_TEXT(CRCFAIL, status, i); 156 STATUS_TO_TEXT(DATATIMEOUT, status, i); 157 STATUS_TO_TEXT(CMDTIMEOUT, status, i); 158 STATUS_TO_TEXT(RXOVERFLOW, status, i); 159 STATUS_TO_TEXT(TXUNDERRUN, status, i); 160 STATUS_TO_TEXT(RXRDY, status, i); 161 STATUS_TO_TEXT(TXRQ, status, i); 162 STATUS_TO_TEXT(ILL_ACCESS, status, i); 163 printk("\n"); 164 } 165 166 #else 167 #define pr_debug_status(s) do { } while (0) 168 #endif 169 170 static void tmio_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable) 171 { 172 struct tmio_mmc_host *host = mmc_priv(mmc); 173 174 if (enable && !host->sdio_irq_enabled) { 175 u16 sdio_status; 176 177 /* Keep device active while SDIO irq is enabled */ 178 pm_runtime_get_sync(mmc_dev(mmc)); 179 180 host->sdio_irq_enabled = true; 181 host->sdio_irq_mask = TMIO_SDIO_MASK_ALL & ~TMIO_SDIO_STAT_IOIRQ; 182 183 /* Clear obsolete interrupts before enabling */ 184 sdio_status = sd_ctrl_read16(host, CTL_SDIO_STATUS) & ~TMIO_SDIO_MASK_ALL; 185 if (host->pdata->flags & TMIO_MMC_SDIO_STATUS_SETBITS) 186 sdio_status |= TMIO_SDIO_SETBITS_MASK; 187 sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status); 188 189 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask); 190 } else if (!enable && host->sdio_irq_enabled) { 191 host->sdio_irq_mask = TMIO_SDIO_MASK_ALL; 192 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask); 193 194 host->sdio_irq_enabled = false; 195 pm_runtime_mark_last_busy(mmc_dev(mmc)); 196 pm_runtime_put_autosuspend(mmc_dev(mmc)); 197 } 198 } 199 200 static void tmio_mmc_clk_start(struct tmio_mmc_host *host) 201 { 202 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, CLK_CTL_SCLKEN | 203 sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL)); 204 msleep(host->pdata->flags & TMIO_MMC_MIN_RCAR2 ? 1 : 10); 205 206 if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG) { 207 sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0100); 208 msleep(10); 209 } 210 } 211 212 static void tmio_mmc_clk_stop(struct tmio_mmc_host *host) 213 { 214 if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG) { 215 sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0000); 216 msleep(10); 217 } 218 219 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, ~CLK_CTL_SCLKEN & 220 sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL)); 221 msleep(host->pdata->flags & TMIO_MMC_MIN_RCAR2 ? 5 : 10); 222 } 223 224 static void tmio_mmc_set_clock(struct tmio_mmc_host *host, 225 unsigned int new_clock) 226 { 227 u32 clk = 0, clock; 228 229 if (new_clock == 0) { 230 tmio_mmc_clk_stop(host); 231 return; 232 } 233 234 if (host->clk_update) 235 clock = host->clk_update(host, new_clock) / 512; 236 else 237 clock = host->mmc->f_min; 238 239 for (clk = 0x80000080; new_clock >= (clock << 1); clk >>= 1) 240 clock <<= 1; 241 242 /* 1/1 clock is option */ 243 if ((host->pdata->flags & TMIO_MMC_CLK_ACTUAL) && ((clk >> 22) & 0x1)) 244 clk |= 0xff; 245 246 if (host->set_clk_div) 247 host->set_clk_div(host->pdev, (clk >> 22) & 1); 248 249 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, ~CLK_CTL_SCLKEN & 250 sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL)); 251 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, clk & CLK_CTL_DIV_MASK); 252 if (!(host->pdata->flags & TMIO_MMC_MIN_RCAR2)) 253 msleep(10); 254 255 tmio_mmc_clk_start(host); 256 } 257 258 static void tmio_mmc_reset(struct tmio_mmc_host *host) 259 { 260 /* FIXME - should we set stop clock reg here */ 261 sd_ctrl_write16(host, CTL_RESET_SD, 0x0000); 262 if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG) 263 sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0000); 264 msleep(10); 265 sd_ctrl_write16(host, CTL_RESET_SD, 0x0001); 266 if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG) 267 sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0001); 268 msleep(10); 269 270 if (host->pdata->flags & TMIO_MMC_SDIO_IRQ) { 271 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask); 272 sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0001); 273 } 274 275 } 276 277 static void tmio_mmc_reset_work(struct work_struct *work) 278 { 279 struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host, 280 delayed_reset_work.work); 281 struct mmc_request *mrq; 282 unsigned long flags; 283 284 spin_lock_irqsave(&host->lock, flags); 285 mrq = host->mrq; 286 287 /* 288 * is request already finished? Since we use a non-blocking 289 * cancel_delayed_work(), it can happen, that a .set_ios() call preempts 290 * us, so, have to check for IS_ERR(host->mrq) 291 */ 292 if (IS_ERR_OR_NULL(mrq) || 293 time_is_after_jiffies(host->last_req_ts + 294 msecs_to_jiffies(CMDREQ_TIMEOUT))) { 295 spin_unlock_irqrestore(&host->lock, flags); 296 return; 297 } 298 299 dev_warn(&host->pdev->dev, 300 "timeout waiting for hardware interrupt (CMD%u)\n", 301 mrq->cmd->opcode); 302 303 if (host->data) 304 host->data->error = -ETIMEDOUT; 305 else if (host->cmd) 306 host->cmd->error = -ETIMEDOUT; 307 else 308 mrq->cmd->error = -ETIMEDOUT; 309 310 host->cmd = NULL; 311 host->data = NULL; 312 host->force_pio = false; 313 314 spin_unlock_irqrestore(&host->lock, flags); 315 316 tmio_mmc_reset(host); 317 318 /* Ready for new calls */ 319 host->mrq = NULL; 320 321 tmio_mmc_abort_dma(host); 322 mmc_request_done(host->mmc, mrq); 323 } 324 325 /* These are the bitmasks the tmio chip requires to implement the MMC response 326 * types. Note that R1 and R6 are the same in this scheme. */ 327 #define APP_CMD 0x0040 328 #define RESP_NONE 0x0300 329 #define RESP_R1 0x0400 330 #define RESP_R1B 0x0500 331 #define RESP_R2 0x0600 332 #define RESP_R3 0x0700 333 #define DATA_PRESENT 0x0800 334 #define TRANSFER_READ 0x1000 335 #define TRANSFER_MULTI 0x2000 336 #define SECURITY_CMD 0x4000 337 #define NO_CMD12_ISSUE 0x4000 /* TMIO_MMC_HAVE_CMD12_CTRL */ 338 339 static int tmio_mmc_start_command(struct tmio_mmc_host *host, 340 struct mmc_command *cmd) 341 { 342 struct mmc_data *data = host->data; 343 int c = cmd->opcode; 344 u32 irq_mask = TMIO_MASK_CMD; 345 346 /* CMD12 is handled by hardware */ 347 if (cmd->opcode == MMC_STOP_TRANSMISSION && !cmd->arg) { 348 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, TMIO_STOP_STP); 349 return 0; 350 } 351 352 switch (mmc_resp_type(cmd)) { 353 case MMC_RSP_NONE: c |= RESP_NONE; break; 354 case MMC_RSP_R1: 355 case MMC_RSP_R1_NO_CRC: 356 c |= RESP_R1; break; 357 case MMC_RSP_R1B: c |= RESP_R1B; break; 358 case MMC_RSP_R2: c |= RESP_R2; break; 359 case MMC_RSP_R3: c |= RESP_R3; break; 360 default: 361 pr_debug("Unknown response type %d\n", mmc_resp_type(cmd)); 362 return -EINVAL; 363 } 364 365 host->cmd = cmd; 366 367 /* FIXME - this seems to be ok commented out but the spec suggest this bit 368 * should be set when issuing app commands. 369 * if(cmd->flags & MMC_FLAG_ACMD) 370 * c |= APP_CMD; 371 */ 372 if (data) { 373 c |= DATA_PRESENT; 374 if (data->blocks > 1) { 375 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, TMIO_STOP_SEC); 376 c |= TRANSFER_MULTI; 377 378 /* 379 * Disable auto CMD12 at IO_RW_EXTENDED and 380 * SET_BLOCK_COUNT when doing multiple block transfer 381 */ 382 if ((host->pdata->flags & TMIO_MMC_HAVE_CMD12_CTRL) && 383 (cmd->opcode == SD_IO_RW_EXTENDED || host->mrq->sbc)) 384 c |= NO_CMD12_ISSUE; 385 } 386 if (data->flags & MMC_DATA_READ) 387 c |= TRANSFER_READ; 388 } 389 390 if (!host->native_hotplug) 391 irq_mask &= ~(TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT); 392 tmio_mmc_enable_mmc_irqs(host, irq_mask); 393 394 /* Fire off the command */ 395 sd_ctrl_write32_as_16_and_16(host, CTL_ARG_REG, cmd->arg); 396 sd_ctrl_write16(host, CTL_SD_CMD, c); 397 398 return 0; 399 } 400 401 static void tmio_mmc_transfer_data(struct tmio_mmc_host *host, 402 unsigned short *buf, 403 unsigned int count) 404 { 405 int is_read = host->data->flags & MMC_DATA_READ; 406 u8 *buf8; 407 408 /* 409 * Transfer the data 410 */ 411 if (host->pdata->flags & TMIO_MMC_32BIT_DATA_PORT) { 412 u32 data = 0; 413 u32 *buf32 = (u32 *)buf; 414 415 if (is_read) 416 sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT, buf32, 417 count >> 2); 418 else 419 sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT, buf32, 420 count >> 2); 421 422 /* if count was multiple of 4 */ 423 if (!(count & 0x3)) 424 return; 425 426 buf32 += count >> 2; 427 count %= 4; 428 429 if (is_read) { 430 sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT, &data, 1); 431 memcpy(buf32, &data, count); 432 } else { 433 memcpy(&data, buf32, count); 434 sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT, &data, 1); 435 } 436 437 return; 438 } 439 440 if (is_read) 441 sd_ctrl_read16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1); 442 else 443 sd_ctrl_write16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1); 444 445 /* if count was even number */ 446 if (!(count & 0x1)) 447 return; 448 449 /* if count was odd number */ 450 buf8 = (u8 *)(buf + (count >> 1)); 451 452 /* 453 * FIXME 454 * 455 * driver and this function are assuming that 456 * it is used as little endian 457 */ 458 if (is_read) 459 *buf8 = sd_ctrl_read16(host, CTL_SD_DATA_PORT) & 0xff; 460 else 461 sd_ctrl_write16(host, CTL_SD_DATA_PORT, *buf8); 462 } 463 464 /* 465 * This chip always returns (at least?) as much data as you ask for. 466 * I'm unsure what happens if you ask for less than a block. This should be 467 * looked into to ensure that a funny length read doesn't hose the controller. 468 */ 469 static void tmio_mmc_pio_irq(struct tmio_mmc_host *host) 470 { 471 struct mmc_data *data = host->data; 472 void *sg_virt; 473 unsigned short *buf; 474 unsigned int count; 475 unsigned long flags; 476 477 if ((host->chan_tx || host->chan_rx) && !host->force_pio) { 478 pr_err("PIO IRQ in DMA mode!\n"); 479 return; 480 } else if (!data) { 481 pr_debug("Spurious PIO IRQ\n"); 482 return; 483 } 484 485 sg_virt = tmio_mmc_kmap_atomic(host->sg_ptr, &flags); 486 buf = (unsigned short *)(sg_virt + host->sg_off); 487 488 count = host->sg_ptr->length - host->sg_off; 489 if (count > data->blksz) 490 count = data->blksz; 491 492 pr_debug("count: %08x offset: %08x flags %08x\n", 493 count, host->sg_off, data->flags); 494 495 /* Transfer the data */ 496 tmio_mmc_transfer_data(host, buf, count); 497 498 host->sg_off += count; 499 500 tmio_mmc_kunmap_atomic(host->sg_ptr, &flags, sg_virt); 501 502 if (host->sg_off == host->sg_ptr->length) 503 tmio_mmc_next_sg(host); 504 } 505 506 static void tmio_mmc_check_bounce_buffer(struct tmio_mmc_host *host) 507 { 508 if (host->sg_ptr == &host->bounce_sg) { 509 unsigned long flags; 510 void *sg_vaddr = tmio_mmc_kmap_atomic(host->sg_orig, &flags); 511 512 memcpy(sg_vaddr, host->bounce_buf, host->bounce_sg.length); 513 tmio_mmc_kunmap_atomic(host->sg_orig, &flags, sg_vaddr); 514 } 515 } 516 517 /* needs to be called with host->lock held */ 518 void tmio_mmc_do_data_irq(struct tmio_mmc_host *host) 519 { 520 struct mmc_data *data = host->data; 521 struct mmc_command *stop; 522 523 host->data = NULL; 524 525 if (!data) { 526 dev_warn(&host->pdev->dev, "Spurious data end IRQ\n"); 527 return; 528 } 529 stop = data->stop; 530 531 /* FIXME - return correct transfer count on errors */ 532 if (!data->error) 533 data->bytes_xfered = data->blocks * data->blksz; 534 else 535 data->bytes_xfered = 0; 536 537 pr_debug("Completed data request\n"); 538 539 /* 540 * FIXME: other drivers allow an optional stop command of any given type 541 * which we dont do, as the chip can auto generate them. 542 * Perhaps we can be smarter about when to use auto CMD12 and 543 * only issue the auto request when we know this is the desired 544 * stop command, allowing fallback to the stop command the 545 * upper layers expect. For now, we do what works. 546 */ 547 548 if (data->flags & MMC_DATA_READ) { 549 if (host->chan_rx && !host->force_pio) 550 tmio_mmc_check_bounce_buffer(host); 551 dev_dbg(&host->pdev->dev, "Complete Rx request %p\n", 552 host->mrq); 553 } else { 554 dev_dbg(&host->pdev->dev, "Complete Tx request %p\n", 555 host->mrq); 556 } 557 558 if (stop && !host->mrq->sbc) { 559 if (stop->opcode != MMC_STOP_TRANSMISSION || stop->arg) 560 dev_err(&host->pdev->dev, "unsupported stop: CMD%u,0x%x. We did CMD12,0\n", 561 stop->opcode, stop->arg); 562 563 /* fill in response from auto CMD12 */ 564 stop->resp[0] = sd_ctrl_read16_and_16_as_32(host, CTL_RESPONSE); 565 566 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0); 567 } 568 569 schedule_work(&host->done); 570 } 571 EXPORT_SYMBOL_GPL(tmio_mmc_do_data_irq); 572 573 static void tmio_mmc_data_irq(struct tmio_mmc_host *host, unsigned int stat) 574 { 575 struct mmc_data *data; 576 577 spin_lock(&host->lock); 578 data = host->data; 579 580 if (!data) 581 goto out; 582 583 if (stat & TMIO_STAT_CRCFAIL || stat & TMIO_STAT_STOPBIT_ERR || 584 stat & TMIO_STAT_TXUNDERRUN) 585 data->error = -EILSEQ; 586 if (host->chan_tx && (data->flags & MMC_DATA_WRITE) && !host->force_pio) { 587 u32 status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS); 588 bool done = false; 589 590 /* 591 * Has all data been written out yet? Testing on SuperH showed, 592 * that in most cases the first interrupt comes already with the 593 * BUSY status bit clear, but on some operations, like mount or 594 * in the beginning of a write / sync / umount, there is one 595 * DATAEND interrupt with the BUSY bit set, in this cases 596 * waiting for one more interrupt fixes the problem. 597 */ 598 if (host->pdata->flags & TMIO_MMC_HAS_IDLE_WAIT) { 599 if (status & TMIO_STAT_SCLKDIVEN) 600 done = true; 601 } else { 602 if (!(status & TMIO_STAT_CMD_BUSY)) 603 done = true; 604 } 605 606 if (done) { 607 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND); 608 complete(&host->dma_dataend); 609 } 610 } else if (host->chan_rx && (data->flags & MMC_DATA_READ) && !host->force_pio) { 611 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND); 612 complete(&host->dma_dataend); 613 } else { 614 tmio_mmc_do_data_irq(host); 615 tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_READOP | TMIO_MASK_WRITEOP); 616 } 617 out: 618 spin_unlock(&host->lock); 619 } 620 621 static void tmio_mmc_cmd_irq(struct tmio_mmc_host *host, unsigned int stat) 622 { 623 struct mmc_command *cmd = host->cmd; 624 int i, addr; 625 626 spin_lock(&host->lock); 627 628 if (!host->cmd) { 629 pr_debug("Spurious CMD irq\n"); 630 goto out; 631 } 632 633 /* This controller is sicker than the PXA one. Not only do we need to 634 * drop the top 8 bits of the first response word, we also need to 635 * modify the order of the response for short response command types. 636 */ 637 638 for (i = 3, addr = CTL_RESPONSE ; i >= 0 ; i--, addr += 4) 639 cmd->resp[i] = sd_ctrl_read16_and_16_as_32(host, addr); 640 641 if (cmd->flags & MMC_RSP_136) { 642 cmd->resp[0] = (cmd->resp[0] << 8) | (cmd->resp[1] >> 24); 643 cmd->resp[1] = (cmd->resp[1] << 8) | (cmd->resp[2] >> 24); 644 cmd->resp[2] = (cmd->resp[2] << 8) | (cmd->resp[3] >> 24); 645 cmd->resp[3] <<= 8; 646 } else if (cmd->flags & MMC_RSP_R3) { 647 cmd->resp[0] = cmd->resp[3]; 648 } 649 650 if (stat & TMIO_STAT_CMDTIMEOUT) 651 cmd->error = -ETIMEDOUT; 652 else if ((stat & TMIO_STAT_CRCFAIL && cmd->flags & MMC_RSP_CRC) || 653 stat & TMIO_STAT_STOPBIT_ERR || 654 stat & TMIO_STAT_CMD_IDX_ERR) 655 cmd->error = -EILSEQ; 656 657 /* If there is data to handle we enable data IRQs here, and 658 * we will ultimatley finish the request in the data_end handler. 659 * If theres no data or we encountered an error, finish now. 660 */ 661 if (host->data && (!cmd->error || cmd->error == -EILSEQ)) { 662 if (host->data->flags & MMC_DATA_READ) { 663 if (host->force_pio || !host->chan_rx) 664 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_READOP); 665 else 666 tasklet_schedule(&host->dma_issue); 667 } else { 668 if (host->force_pio || !host->chan_tx) 669 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_WRITEOP); 670 else 671 tasklet_schedule(&host->dma_issue); 672 } 673 } else { 674 schedule_work(&host->done); 675 } 676 677 out: 678 spin_unlock(&host->lock); 679 } 680 681 static bool __tmio_mmc_card_detect_irq(struct tmio_mmc_host *host, 682 int ireg, int status) 683 { 684 struct mmc_host *mmc = host->mmc; 685 686 /* Card insert / remove attempts */ 687 if (ireg & (TMIO_STAT_CARD_INSERT | TMIO_STAT_CARD_REMOVE)) { 688 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CARD_INSERT | 689 TMIO_STAT_CARD_REMOVE); 690 if ((((ireg & TMIO_STAT_CARD_REMOVE) && mmc->card) || 691 ((ireg & TMIO_STAT_CARD_INSERT) && !mmc->card)) && 692 !work_pending(&mmc->detect.work)) 693 mmc_detect_change(host->mmc, msecs_to_jiffies(100)); 694 return true; 695 } 696 697 return false; 698 } 699 700 static bool __tmio_mmc_sdcard_irq(struct tmio_mmc_host *host, int ireg, 701 int status) 702 { 703 /* Command completion */ 704 if (ireg & (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT)) { 705 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CMDRESPEND | 706 TMIO_STAT_CMDTIMEOUT); 707 tmio_mmc_cmd_irq(host, status); 708 return true; 709 } 710 711 /* Data transfer */ 712 if (ireg & (TMIO_STAT_RXRDY | TMIO_STAT_TXRQ)) { 713 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_RXRDY | TMIO_STAT_TXRQ); 714 tmio_mmc_pio_irq(host); 715 return true; 716 } 717 718 /* Data transfer completion */ 719 if (ireg & TMIO_STAT_DATAEND) { 720 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_DATAEND); 721 tmio_mmc_data_irq(host, status); 722 return true; 723 } 724 725 return false; 726 } 727 728 static void __tmio_mmc_sdio_irq(struct tmio_mmc_host *host) 729 { 730 struct mmc_host *mmc = host->mmc; 731 struct tmio_mmc_data *pdata = host->pdata; 732 unsigned int ireg, status; 733 unsigned int sdio_status; 734 735 if (!(pdata->flags & TMIO_MMC_SDIO_IRQ)) 736 return; 737 738 status = sd_ctrl_read16(host, CTL_SDIO_STATUS); 739 ireg = status & TMIO_SDIO_MASK_ALL & ~host->sdio_irq_mask; 740 741 sdio_status = status & ~TMIO_SDIO_MASK_ALL; 742 if (pdata->flags & TMIO_MMC_SDIO_STATUS_SETBITS) 743 sdio_status |= TMIO_SDIO_SETBITS_MASK; 744 745 sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status); 746 747 if (mmc->caps & MMC_CAP_SDIO_IRQ && ireg & TMIO_SDIO_STAT_IOIRQ) 748 mmc_signal_sdio_irq(mmc); 749 } 750 751 irqreturn_t tmio_mmc_irq(int irq, void *devid) 752 { 753 struct tmio_mmc_host *host = devid; 754 unsigned int ireg, status; 755 756 status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS); 757 ireg = status & TMIO_MASK_IRQ & ~host->sdcard_irq_mask; 758 759 pr_debug_status(status); 760 pr_debug_status(ireg); 761 762 /* Clear the status except the interrupt status */ 763 sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, TMIO_MASK_IRQ); 764 765 if (__tmio_mmc_card_detect_irq(host, ireg, status)) 766 return IRQ_HANDLED; 767 if (__tmio_mmc_sdcard_irq(host, ireg, status)) 768 return IRQ_HANDLED; 769 770 __tmio_mmc_sdio_irq(host); 771 772 return IRQ_HANDLED; 773 } 774 EXPORT_SYMBOL_GPL(tmio_mmc_irq); 775 776 static int tmio_mmc_start_data(struct tmio_mmc_host *host, 777 struct mmc_data *data) 778 { 779 struct tmio_mmc_data *pdata = host->pdata; 780 781 pr_debug("setup data transfer: blocksize %08x nr_blocks %d\n", 782 data->blksz, data->blocks); 783 784 /* Some hardware cannot perform 2 byte requests in 4/8 bit mode */ 785 if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_4 || 786 host->mmc->ios.bus_width == MMC_BUS_WIDTH_8) { 787 int blksz_2bytes = pdata->flags & TMIO_MMC_BLKSZ_2BYTES; 788 789 if (data->blksz < 2 || (data->blksz < 4 && !blksz_2bytes)) { 790 pr_err("%s: %d byte block unsupported in 4/8 bit mode\n", 791 mmc_hostname(host->mmc), data->blksz); 792 return -EINVAL; 793 } 794 } 795 796 tmio_mmc_init_sg(host, data); 797 host->data = data; 798 799 /* Set transfer length / blocksize */ 800 sd_ctrl_write16(host, CTL_SD_XFER_LEN, data->blksz); 801 sd_ctrl_write16(host, CTL_XFER_BLK_COUNT, data->blocks); 802 803 tmio_mmc_start_dma(host, data); 804 805 return 0; 806 } 807 808 static void tmio_mmc_hw_reset(struct mmc_host *mmc) 809 { 810 struct tmio_mmc_host *host = mmc_priv(mmc); 811 812 if (host->hw_reset) 813 host->hw_reset(host); 814 } 815 816 static int tmio_mmc_execute_tuning(struct mmc_host *mmc, u32 opcode) 817 { 818 struct tmio_mmc_host *host = mmc_priv(mmc); 819 int i, ret = 0; 820 821 if (!host->init_tuning || !host->select_tuning) 822 /* Tuning is not supported */ 823 goto out; 824 825 host->tap_num = host->init_tuning(host); 826 if (!host->tap_num) 827 /* Tuning is not supported */ 828 goto out; 829 830 if (host->tap_num * 2 >= sizeof(host->taps) * BITS_PER_BYTE) { 831 dev_warn_once(&host->pdev->dev, 832 "Too many taps, skipping tuning. Please consider updating size of taps field of tmio_mmc_host\n"); 833 goto out; 834 } 835 836 bitmap_zero(host->taps, host->tap_num * 2); 837 838 /* Issue CMD19 twice for each tap */ 839 for (i = 0; i < 2 * host->tap_num; i++) { 840 if (host->prepare_tuning) 841 host->prepare_tuning(host, i % host->tap_num); 842 843 ret = mmc_send_tuning(mmc, opcode, NULL); 844 if (ret && ret != -EILSEQ) 845 goto out; 846 if (ret == 0) 847 set_bit(i, host->taps); 848 849 mdelay(1); 850 } 851 852 ret = host->select_tuning(host); 853 854 out: 855 if (ret < 0) { 856 dev_warn(&host->pdev->dev, "Tuning procedure failed\n"); 857 tmio_mmc_hw_reset(mmc); 858 } 859 860 return ret; 861 } 862 863 static void tmio_process_mrq(struct tmio_mmc_host *host, 864 struct mmc_request *mrq) 865 { 866 struct mmc_command *cmd; 867 int ret; 868 869 if (mrq->sbc && host->cmd != mrq->sbc) { 870 cmd = mrq->sbc; 871 } else { 872 cmd = mrq->cmd; 873 if (mrq->data) { 874 ret = tmio_mmc_start_data(host, mrq->data); 875 if (ret) 876 goto fail; 877 } 878 } 879 880 ret = tmio_mmc_start_command(host, cmd); 881 if (ret) 882 goto fail; 883 884 schedule_delayed_work(&host->delayed_reset_work, 885 msecs_to_jiffies(CMDREQ_TIMEOUT)); 886 return; 887 888 fail: 889 host->force_pio = false; 890 host->mrq = NULL; 891 mrq->cmd->error = ret; 892 mmc_request_done(host->mmc, mrq); 893 } 894 895 /* Process requests from the MMC layer */ 896 static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq) 897 { 898 struct tmio_mmc_host *host = mmc_priv(mmc); 899 unsigned long flags; 900 901 spin_lock_irqsave(&host->lock, flags); 902 903 if (host->mrq) { 904 pr_debug("request not null\n"); 905 if (IS_ERR(host->mrq)) { 906 spin_unlock_irqrestore(&host->lock, flags); 907 mrq->cmd->error = -EAGAIN; 908 mmc_request_done(mmc, mrq); 909 return; 910 } 911 } 912 913 host->last_req_ts = jiffies; 914 wmb(); 915 host->mrq = mrq; 916 917 spin_unlock_irqrestore(&host->lock, flags); 918 919 tmio_process_mrq(host, mrq); 920 } 921 922 static void tmio_mmc_finish_request(struct tmio_mmc_host *host) 923 { 924 struct mmc_request *mrq; 925 unsigned long flags; 926 927 spin_lock_irqsave(&host->lock, flags); 928 929 mrq = host->mrq; 930 if (IS_ERR_OR_NULL(mrq)) { 931 spin_unlock_irqrestore(&host->lock, flags); 932 return; 933 } 934 935 /* If not SET_BLOCK_COUNT, clear old data */ 936 if (host->cmd != mrq->sbc) { 937 host->cmd = NULL; 938 host->data = NULL; 939 host->force_pio = false; 940 host->mrq = NULL; 941 } 942 943 cancel_delayed_work(&host->delayed_reset_work); 944 945 spin_unlock_irqrestore(&host->lock, flags); 946 947 if (mrq->cmd->error || (mrq->data && mrq->data->error)) 948 tmio_mmc_abort_dma(host); 949 950 if (host->check_scc_error) 951 host->check_scc_error(host); 952 953 /* If SET_BLOCK_COUNT, continue with main command */ 954 if (host->mrq) { 955 tmio_process_mrq(host, mrq); 956 return; 957 } 958 959 mmc_request_done(host->mmc, mrq); 960 } 961 962 static void tmio_mmc_done_work(struct work_struct *work) 963 { 964 struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host, 965 done); 966 tmio_mmc_finish_request(host); 967 } 968 969 static int tmio_mmc_clk_enable(struct tmio_mmc_host *host) 970 { 971 if (!host->clk_enable) 972 return -ENOTSUPP; 973 974 return host->clk_enable(host); 975 } 976 977 static void tmio_mmc_clk_disable(struct tmio_mmc_host *host) 978 { 979 if (host->clk_disable) 980 host->clk_disable(host); 981 } 982 983 static void tmio_mmc_power_on(struct tmio_mmc_host *host, unsigned short vdd) 984 { 985 struct mmc_host *mmc = host->mmc; 986 int ret = 0; 987 988 /* .set_ios() is returning void, so, no chance to report an error */ 989 990 if (host->set_pwr) 991 host->set_pwr(host->pdev, 1); 992 993 if (!IS_ERR(mmc->supply.vmmc)) { 994 ret = mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, vdd); 995 /* 996 * Attention: empiric value. With a b43 WiFi SDIO card this 997 * delay proved necessary for reliable card-insertion probing. 998 * 100us were not enough. Is this the same 140us delay, as in 999 * tmio_mmc_set_ios()? 1000 */ 1001 udelay(200); 1002 } 1003 /* 1004 * It seems, VccQ should be switched on after Vcc, this is also what the 1005 * omap_hsmmc.c driver does. 1006 */ 1007 if (!IS_ERR(mmc->supply.vqmmc) && !ret) { 1008 ret = regulator_enable(mmc->supply.vqmmc); 1009 udelay(200); 1010 } 1011 1012 if (ret < 0) 1013 dev_dbg(&host->pdev->dev, "Regulators failed to power up: %d\n", 1014 ret); 1015 } 1016 1017 static void tmio_mmc_power_off(struct tmio_mmc_host *host) 1018 { 1019 struct mmc_host *mmc = host->mmc; 1020 1021 if (!IS_ERR(mmc->supply.vqmmc)) 1022 regulator_disable(mmc->supply.vqmmc); 1023 1024 if (!IS_ERR(mmc->supply.vmmc)) 1025 mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0); 1026 1027 if (host->set_pwr) 1028 host->set_pwr(host->pdev, 0); 1029 } 1030 1031 static void tmio_mmc_set_bus_width(struct tmio_mmc_host *host, 1032 unsigned char bus_width) 1033 { 1034 u16 reg = sd_ctrl_read16(host, CTL_SD_MEM_CARD_OPT) 1035 & ~(CARD_OPT_WIDTH | CARD_OPT_WIDTH8); 1036 1037 /* reg now applies to MMC_BUS_WIDTH_4 */ 1038 if (bus_width == MMC_BUS_WIDTH_1) 1039 reg |= CARD_OPT_WIDTH; 1040 else if (bus_width == MMC_BUS_WIDTH_8) 1041 reg |= CARD_OPT_WIDTH8; 1042 1043 sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, reg); 1044 } 1045 1046 /* Set MMC clock / power. 1047 * Note: This controller uses a simple divider scheme therefore it cannot 1048 * run a MMC card at full speed (20MHz). The max clock is 24MHz on SD, but as 1049 * MMC wont run that fast, it has to be clocked at 12MHz which is the next 1050 * slowest setting. 1051 */ 1052 static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) 1053 { 1054 struct tmio_mmc_host *host = mmc_priv(mmc); 1055 struct device *dev = &host->pdev->dev; 1056 unsigned long flags; 1057 1058 mutex_lock(&host->ios_lock); 1059 1060 spin_lock_irqsave(&host->lock, flags); 1061 if (host->mrq) { 1062 if (IS_ERR(host->mrq)) { 1063 dev_dbg(dev, 1064 "%s.%d: concurrent .set_ios(), clk %u, mode %u\n", 1065 current->comm, task_pid_nr(current), 1066 ios->clock, ios->power_mode); 1067 host->mrq = ERR_PTR(-EINTR); 1068 } else { 1069 dev_dbg(dev, 1070 "%s.%d: CMD%u active since %lu, now %lu!\n", 1071 current->comm, task_pid_nr(current), 1072 host->mrq->cmd->opcode, host->last_req_ts, 1073 jiffies); 1074 } 1075 spin_unlock_irqrestore(&host->lock, flags); 1076 1077 mutex_unlock(&host->ios_lock); 1078 return; 1079 } 1080 1081 host->mrq = ERR_PTR(-EBUSY); 1082 1083 spin_unlock_irqrestore(&host->lock, flags); 1084 1085 switch (ios->power_mode) { 1086 case MMC_POWER_OFF: 1087 tmio_mmc_power_off(host); 1088 tmio_mmc_clk_stop(host); 1089 break; 1090 case MMC_POWER_UP: 1091 tmio_mmc_power_on(host, ios->vdd); 1092 tmio_mmc_set_clock(host, ios->clock); 1093 tmio_mmc_set_bus_width(host, ios->bus_width); 1094 break; 1095 case MMC_POWER_ON: 1096 tmio_mmc_set_clock(host, ios->clock); 1097 tmio_mmc_set_bus_width(host, ios->bus_width); 1098 break; 1099 } 1100 1101 /* Let things settle. delay taken from winCE driver */ 1102 udelay(140); 1103 if (PTR_ERR(host->mrq) == -EINTR) 1104 dev_dbg(&host->pdev->dev, 1105 "%s.%d: IOS interrupted: clk %u, mode %u", 1106 current->comm, task_pid_nr(current), 1107 ios->clock, ios->power_mode); 1108 host->mrq = NULL; 1109 1110 host->clk_cache = ios->clock; 1111 1112 mutex_unlock(&host->ios_lock); 1113 } 1114 1115 static int tmio_mmc_get_ro(struct mmc_host *mmc) 1116 { 1117 struct tmio_mmc_host *host = mmc_priv(mmc); 1118 struct tmio_mmc_data *pdata = host->pdata; 1119 int ret = mmc_gpio_get_ro(mmc); 1120 1121 if (ret >= 0) 1122 return ret; 1123 1124 ret = !((pdata->flags & TMIO_MMC_WRPROTECT_DISABLE) || 1125 (sd_ctrl_read16_and_16_as_32(host, CTL_STATUS) & TMIO_STAT_WRPROTECT)); 1126 1127 return ret; 1128 } 1129 1130 static int tmio_multi_io_quirk(struct mmc_card *card, 1131 unsigned int direction, int blk_size) 1132 { 1133 struct tmio_mmc_host *host = mmc_priv(card->host); 1134 1135 if (host->multi_io_quirk) 1136 return host->multi_io_quirk(card, direction, blk_size); 1137 1138 return blk_size; 1139 } 1140 1141 static struct mmc_host_ops tmio_mmc_ops = { 1142 .request = tmio_mmc_request, 1143 .set_ios = tmio_mmc_set_ios, 1144 .get_ro = tmio_mmc_get_ro, 1145 .get_cd = mmc_gpio_get_cd, 1146 .enable_sdio_irq = tmio_mmc_enable_sdio_irq, 1147 .multi_io_quirk = tmio_multi_io_quirk, 1148 .hw_reset = tmio_mmc_hw_reset, 1149 .execute_tuning = tmio_mmc_execute_tuning, 1150 }; 1151 1152 static int tmio_mmc_init_ocr(struct tmio_mmc_host *host) 1153 { 1154 struct tmio_mmc_data *pdata = host->pdata; 1155 struct mmc_host *mmc = host->mmc; 1156 1157 mmc_regulator_get_supply(mmc); 1158 1159 /* use ocr_mask if no regulator */ 1160 if (!mmc->ocr_avail) 1161 mmc->ocr_avail = pdata->ocr_mask; 1162 1163 /* 1164 * try again. 1165 * There is possibility that regulator has not been probed 1166 */ 1167 if (!mmc->ocr_avail) 1168 return -EPROBE_DEFER; 1169 1170 return 0; 1171 } 1172 1173 static void tmio_mmc_of_parse(struct platform_device *pdev, 1174 struct tmio_mmc_data *pdata) 1175 { 1176 const struct device_node *np = pdev->dev.of_node; 1177 1178 if (!np) 1179 return; 1180 1181 if (of_get_property(np, "toshiba,mmc-wrprotect-disable", NULL)) 1182 pdata->flags |= TMIO_MMC_WRPROTECT_DISABLE; 1183 } 1184 1185 struct tmio_mmc_host* 1186 tmio_mmc_host_alloc(struct platform_device *pdev) 1187 { 1188 struct tmio_mmc_host *host; 1189 struct mmc_host *mmc; 1190 1191 mmc = mmc_alloc_host(sizeof(struct tmio_mmc_host), &pdev->dev); 1192 if (!mmc) 1193 return NULL; 1194 1195 host = mmc_priv(mmc); 1196 host->mmc = mmc; 1197 host->pdev = pdev; 1198 1199 return host; 1200 } 1201 EXPORT_SYMBOL_GPL(tmio_mmc_host_alloc); 1202 1203 void tmio_mmc_host_free(struct tmio_mmc_host *host) 1204 { 1205 mmc_free_host(host->mmc); 1206 } 1207 EXPORT_SYMBOL_GPL(tmio_mmc_host_free); 1208 1209 int tmio_mmc_host_probe(struct tmio_mmc_host *_host, 1210 struct tmio_mmc_data *pdata, 1211 const struct tmio_mmc_dma_ops *dma_ops) 1212 { 1213 struct platform_device *pdev = _host->pdev; 1214 struct mmc_host *mmc = _host->mmc; 1215 struct resource *res_ctl; 1216 int ret; 1217 u32 irq_mask = TMIO_MASK_CMD; 1218 1219 tmio_mmc_of_parse(pdev, pdata); 1220 1221 if (!(pdata->flags & TMIO_MMC_HAS_IDLE_WAIT)) 1222 _host->write16_hook = NULL; 1223 1224 res_ctl = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1225 if (!res_ctl) 1226 return -EINVAL; 1227 1228 ret = mmc_of_parse(mmc); 1229 if (ret < 0) 1230 return ret; 1231 1232 _host->pdata = pdata; 1233 platform_set_drvdata(pdev, mmc); 1234 1235 _host->set_pwr = pdata->set_pwr; 1236 _host->set_clk_div = pdata->set_clk_div; 1237 1238 ret = tmio_mmc_init_ocr(_host); 1239 if (ret < 0) 1240 return ret; 1241 1242 _host->ctl = devm_ioremap(&pdev->dev, 1243 res_ctl->start, resource_size(res_ctl)); 1244 if (!_host->ctl) 1245 return -ENOMEM; 1246 1247 tmio_mmc_ops.card_busy = _host->card_busy; 1248 tmio_mmc_ops.start_signal_voltage_switch = 1249 _host->start_signal_voltage_switch; 1250 mmc->ops = &tmio_mmc_ops; 1251 1252 mmc->caps |= MMC_CAP_4_BIT_DATA | pdata->capabilities; 1253 mmc->caps2 |= pdata->capabilities2; 1254 mmc->max_segs = 32; 1255 mmc->max_blk_size = 512; 1256 mmc->max_blk_count = (PAGE_SIZE / mmc->max_blk_size) * 1257 mmc->max_segs; 1258 mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count; 1259 mmc->max_seg_size = mmc->max_req_size; 1260 1261 _host->native_hotplug = !(pdata->flags & TMIO_MMC_USE_GPIO_CD || 1262 mmc->caps & MMC_CAP_NEEDS_POLL || 1263 !mmc_card_is_removable(mmc)); 1264 1265 /* 1266 * On Gen2+, eMMC with NONREMOVABLE currently fails because native 1267 * hotplug gets disabled. It seems RuntimePM related yet we need further 1268 * research. Since we are planning a PM overhaul anyway, let's enforce 1269 * for now the device being active by enabling native hotplug always. 1270 */ 1271 if (pdata->flags & TMIO_MMC_MIN_RCAR2) 1272 _host->native_hotplug = true; 1273 1274 if (tmio_mmc_clk_enable(_host) < 0) { 1275 mmc->f_max = pdata->hclk; 1276 mmc->f_min = mmc->f_max / 512; 1277 } 1278 1279 /* 1280 * Check the sanity of mmc->f_min to prevent tmio_mmc_set_clock() from 1281 * looping forever... 1282 */ 1283 if (mmc->f_min == 0) 1284 return -EINVAL; 1285 1286 /* 1287 * While using internal tmio hardware logic for card detection, we need 1288 * to ensure it stays powered for it to work. 1289 */ 1290 if (_host->native_hotplug) 1291 pm_runtime_get_noresume(&pdev->dev); 1292 1293 _host->sdio_irq_enabled = false; 1294 if (pdata->flags & TMIO_MMC_SDIO_IRQ) 1295 _host->sdio_irq_mask = TMIO_SDIO_MASK_ALL; 1296 1297 tmio_mmc_clk_stop(_host); 1298 tmio_mmc_reset(_host); 1299 1300 _host->sdcard_irq_mask = sd_ctrl_read16_and_16_as_32(_host, CTL_IRQ_MASK); 1301 tmio_mmc_disable_mmc_irqs(_host, TMIO_MASK_ALL); 1302 1303 /* Unmask the IRQs we want to know about */ 1304 if (!_host->chan_rx) 1305 irq_mask |= TMIO_MASK_READOP; 1306 if (!_host->chan_tx) 1307 irq_mask |= TMIO_MASK_WRITEOP; 1308 if (!_host->native_hotplug) 1309 irq_mask &= ~(TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT); 1310 1311 _host->sdcard_irq_mask &= ~irq_mask; 1312 1313 spin_lock_init(&_host->lock); 1314 mutex_init(&_host->ios_lock); 1315 1316 /* Init delayed work for request timeouts */ 1317 INIT_DELAYED_WORK(&_host->delayed_reset_work, tmio_mmc_reset_work); 1318 INIT_WORK(&_host->done, tmio_mmc_done_work); 1319 1320 /* See if we also get DMA */ 1321 _host->dma_ops = dma_ops; 1322 tmio_mmc_request_dma(_host, pdata); 1323 1324 pm_runtime_set_active(&pdev->dev); 1325 pm_runtime_set_autosuspend_delay(&pdev->dev, 50); 1326 pm_runtime_use_autosuspend(&pdev->dev); 1327 pm_runtime_enable(&pdev->dev); 1328 1329 ret = mmc_add_host(mmc); 1330 if (ret < 0) { 1331 tmio_mmc_host_remove(_host); 1332 return ret; 1333 } 1334 1335 dev_pm_qos_expose_latency_limit(&pdev->dev, 100); 1336 1337 if (pdata->flags & TMIO_MMC_USE_GPIO_CD) { 1338 ret = mmc_gpio_request_cd(mmc, pdata->cd_gpio, 0); 1339 if (ret < 0) { 1340 tmio_mmc_host_remove(_host); 1341 return ret; 1342 } 1343 mmc_gpiod_request_cd_irq(mmc); 1344 } 1345 1346 return 0; 1347 } 1348 EXPORT_SYMBOL_GPL(tmio_mmc_host_probe); 1349 1350 void tmio_mmc_host_remove(struct tmio_mmc_host *host) 1351 { 1352 struct platform_device *pdev = host->pdev; 1353 struct mmc_host *mmc = host->mmc; 1354 1355 if (host->pdata->flags & TMIO_MMC_SDIO_IRQ) 1356 sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0000); 1357 1358 if (!host->native_hotplug) 1359 pm_runtime_get_sync(&pdev->dev); 1360 1361 dev_pm_qos_hide_latency_limit(&pdev->dev); 1362 1363 mmc_remove_host(mmc); 1364 cancel_work_sync(&host->done); 1365 cancel_delayed_work_sync(&host->delayed_reset_work); 1366 tmio_mmc_release_dma(host); 1367 1368 pm_runtime_put_sync(&pdev->dev); 1369 pm_runtime_disable(&pdev->dev); 1370 1371 tmio_mmc_clk_disable(host); 1372 } 1373 EXPORT_SYMBOL_GPL(tmio_mmc_host_remove); 1374 1375 #ifdef CONFIG_PM 1376 int tmio_mmc_host_runtime_suspend(struct device *dev) 1377 { 1378 struct mmc_host *mmc = dev_get_drvdata(dev); 1379 struct tmio_mmc_host *host = mmc_priv(mmc); 1380 1381 tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_ALL); 1382 1383 if (host->clk_cache) 1384 tmio_mmc_clk_stop(host); 1385 1386 tmio_mmc_clk_disable(host); 1387 1388 return 0; 1389 } 1390 EXPORT_SYMBOL_GPL(tmio_mmc_host_runtime_suspend); 1391 1392 static bool tmio_mmc_can_retune(struct tmio_mmc_host *host) 1393 { 1394 return host->tap_num && mmc_can_retune(host->mmc); 1395 } 1396 1397 int tmio_mmc_host_runtime_resume(struct device *dev) 1398 { 1399 struct mmc_host *mmc = dev_get_drvdata(dev); 1400 struct tmio_mmc_host *host = mmc_priv(mmc); 1401 1402 tmio_mmc_reset(host); 1403 tmio_mmc_clk_enable(host); 1404 1405 if (host->clk_cache) 1406 tmio_mmc_set_clock(host, host->clk_cache); 1407 1408 tmio_mmc_enable_dma(host, true); 1409 1410 if (tmio_mmc_can_retune(host) && host->select_tuning(host)) 1411 dev_warn(&host->pdev->dev, "Tuning selection failed\n"); 1412 1413 return 0; 1414 } 1415 EXPORT_SYMBOL_GPL(tmio_mmc_host_runtime_resume); 1416 #endif 1417 1418 MODULE_LICENSE("GPL v2"); 1419