xref: /openbmc/linux/drivers/mmc/host/tmio_mmc_core.c (revision a2818ee4)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Driver for the MMC / SD / SDIO IP found in:
4  *
5  * TC6393XB, TC6391XB, TC6387XB, T7L66XB, ASIC3, SH-Mobile SoCs
6  *
7  * Copyright (C) 2015-17 Renesas Electronics Corporation
8  * Copyright (C) 2016-17 Sang Engineering, Wolfram Sang
9  * Copyright (C) 2017 Horms Solutions, Simon Horman
10  * Copyright (C) 2011 Guennadi Liakhovetski
11  * Copyright (C) 2007 Ian Molton
12  * Copyright (C) 2004 Ian Molton
13  *
14  * This driver draws mainly on scattered spec sheets, Reverse engineering
15  * of the toshiba e800  SD driver and some parts of the 2.4 ASIC3 driver (4 bit
16  * support). (Further 4 bit support from a later datasheet).
17  *
18  * TODO:
19  *   Investigate using a workqueue for PIO transfers
20  *   Eliminate FIXMEs
21  *   Better Power management
22  *   Handle MMC errors better
23  *   double buffer support
24  *
25  */
26 
27 #include <linux/delay.h>
28 #include <linux/device.h>
29 #include <linux/highmem.h>
30 #include <linux/interrupt.h>
31 #include <linux/io.h>
32 #include <linux/irq.h>
33 #include <linux/mfd/tmio.h>
34 #include <linux/mmc/card.h>
35 #include <linux/mmc/host.h>
36 #include <linux/mmc/mmc.h>
37 #include <linux/mmc/slot-gpio.h>
38 #include <linux/module.h>
39 #include <linux/pagemap.h>
40 #include <linux/platform_device.h>
41 #include <linux/pm_qos.h>
42 #include <linux/pm_runtime.h>
43 #include <linux/regulator/consumer.h>
44 #include <linux/mmc/sdio.h>
45 #include <linux/scatterlist.h>
46 #include <linux/spinlock.h>
47 #include <linux/swiotlb.h>
48 #include <linux/workqueue.h>
49 
50 #include "tmio_mmc.h"
51 
52 static inline void tmio_mmc_start_dma(struct tmio_mmc_host *host,
53 				      struct mmc_data *data)
54 {
55 	if (host->dma_ops)
56 		host->dma_ops->start(host, data);
57 }
58 
59 static inline void tmio_mmc_enable_dma(struct tmio_mmc_host *host, bool enable)
60 {
61 	if (host->dma_ops)
62 		host->dma_ops->enable(host, enable);
63 }
64 
65 static inline void tmio_mmc_request_dma(struct tmio_mmc_host *host,
66 					struct tmio_mmc_data *pdata)
67 {
68 	if (host->dma_ops) {
69 		host->dma_ops->request(host, pdata);
70 	} else {
71 		host->chan_tx = NULL;
72 		host->chan_rx = NULL;
73 	}
74 }
75 
76 static inline void tmio_mmc_release_dma(struct tmio_mmc_host *host)
77 {
78 	if (host->dma_ops)
79 		host->dma_ops->release(host);
80 }
81 
82 static inline void tmio_mmc_abort_dma(struct tmio_mmc_host *host)
83 {
84 	if (host->dma_ops)
85 		host->dma_ops->abort(host);
86 }
87 
88 static inline void tmio_mmc_dataend_dma(struct tmio_mmc_host *host)
89 {
90 	if (host->dma_ops)
91 		host->dma_ops->dataend(host);
92 }
93 
94 void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
95 {
96 	host->sdcard_irq_mask &= ~(i & TMIO_MASK_IRQ);
97 	sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
98 }
99 EXPORT_SYMBOL_GPL(tmio_mmc_enable_mmc_irqs);
100 
101 void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
102 {
103 	host->sdcard_irq_mask |= (i & TMIO_MASK_IRQ);
104 	sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
105 }
106 EXPORT_SYMBOL_GPL(tmio_mmc_disable_mmc_irqs);
107 
108 static void tmio_mmc_ack_mmc_irqs(struct tmio_mmc_host *host, u32 i)
109 {
110 	sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, ~i);
111 }
112 
113 static void tmio_mmc_init_sg(struct tmio_mmc_host *host, struct mmc_data *data)
114 {
115 	host->sg_len = data->sg_len;
116 	host->sg_ptr = data->sg;
117 	host->sg_orig = data->sg;
118 	host->sg_off = 0;
119 }
120 
121 static int tmio_mmc_next_sg(struct tmio_mmc_host *host)
122 {
123 	host->sg_ptr = sg_next(host->sg_ptr);
124 	host->sg_off = 0;
125 	return --host->sg_len;
126 }
127 
128 #define CMDREQ_TIMEOUT	5000
129 
130 static void tmio_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable)
131 {
132 	struct tmio_mmc_host *host = mmc_priv(mmc);
133 
134 	if (enable && !host->sdio_irq_enabled) {
135 		u16 sdio_status;
136 
137 		/* Keep device active while SDIO irq is enabled */
138 		pm_runtime_get_sync(mmc_dev(mmc));
139 
140 		host->sdio_irq_enabled = true;
141 		host->sdio_irq_mask = TMIO_SDIO_MASK_ALL & ~TMIO_SDIO_STAT_IOIRQ;
142 
143 		/* Clear obsolete interrupts before enabling */
144 		sdio_status = sd_ctrl_read16(host, CTL_SDIO_STATUS) & ~TMIO_SDIO_MASK_ALL;
145 		if (host->pdata->flags & TMIO_MMC_SDIO_STATUS_SETBITS)
146 			sdio_status |= TMIO_SDIO_SETBITS_MASK;
147 		sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status);
148 
149 		sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
150 	} else if (!enable && host->sdio_irq_enabled) {
151 		host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
152 		sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
153 
154 		host->sdio_irq_enabled = false;
155 		pm_runtime_mark_last_busy(mmc_dev(mmc));
156 		pm_runtime_put_autosuspend(mmc_dev(mmc));
157 	}
158 }
159 
160 static void tmio_mmc_reset(struct tmio_mmc_host *host)
161 {
162 	/* FIXME - should we set stop clock reg here */
163 	sd_ctrl_write16(host, CTL_RESET_SD, 0x0000);
164 	usleep_range(10000, 11000);
165 	sd_ctrl_write16(host, CTL_RESET_SD, 0x0001);
166 	usleep_range(10000, 11000);
167 
168 	if (host->pdata->flags & TMIO_MMC_SDIO_IRQ) {
169 		sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
170 		sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0001);
171 	}
172 }
173 
174 static void tmio_mmc_hw_reset(struct mmc_host *mmc)
175 {
176 	struct tmio_mmc_host *host = mmc_priv(mmc);
177 
178 	host->reset(host);
179 
180 	tmio_mmc_abort_dma(host);
181 
182 	if (host->hw_reset)
183 		host->hw_reset(host);
184 }
185 
186 static void tmio_mmc_reset_work(struct work_struct *work)
187 {
188 	struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
189 						  delayed_reset_work.work);
190 	struct mmc_request *mrq;
191 	unsigned long flags;
192 
193 	spin_lock_irqsave(&host->lock, flags);
194 	mrq = host->mrq;
195 
196 	/*
197 	 * is request already finished? Since we use a non-blocking
198 	 * cancel_delayed_work(), it can happen, that a .set_ios() call preempts
199 	 * us, so, have to check for IS_ERR(host->mrq)
200 	 */
201 	if (IS_ERR_OR_NULL(mrq) ||
202 	    time_is_after_jiffies(host->last_req_ts +
203 				  msecs_to_jiffies(CMDREQ_TIMEOUT))) {
204 		spin_unlock_irqrestore(&host->lock, flags);
205 		return;
206 	}
207 
208 	dev_warn(&host->pdev->dev,
209 		 "timeout waiting for hardware interrupt (CMD%u)\n",
210 		 mrq->cmd->opcode);
211 
212 	if (host->data)
213 		host->data->error = -ETIMEDOUT;
214 	else if (host->cmd)
215 		host->cmd->error = -ETIMEDOUT;
216 	else
217 		mrq->cmd->error = -ETIMEDOUT;
218 
219 	host->cmd = NULL;
220 	host->data = NULL;
221 
222 	spin_unlock_irqrestore(&host->lock, flags);
223 
224 	tmio_mmc_hw_reset(host->mmc);
225 
226 	/* Ready for new calls */
227 	host->mrq = NULL;
228 
229 	mmc_request_done(host->mmc, mrq);
230 }
231 
232 /* These are the bitmasks the tmio chip requires to implement the MMC response
233  * types. Note that R1 and R6 are the same in this scheme. */
234 #define APP_CMD        0x0040
235 #define RESP_NONE      0x0300
236 #define RESP_R1        0x0400
237 #define RESP_R1B       0x0500
238 #define RESP_R2        0x0600
239 #define RESP_R3        0x0700
240 #define DATA_PRESENT   0x0800
241 #define TRANSFER_READ  0x1000
242 #define TRANSFER_MULTI 0x2000
243 #define SECURITY_CMD   0x4000
244 #define NO_CMD12_ISSUE 0x4000 /* TMIO_MMC_HAVE_CMD12_CTRL */
245 
246 static int tmio_mmc_start_command(struct tmio_mmc_host *host,
247 				  struct mmc_command *cmd)
248 {
249 	struct mmc_data *data = host->data;
250 	int c = cmd->opcode;
251 
252 	switch (mmc_resp_type(cmd)) {
253 	case MMC_RSP_NONE: c |= RESP_NONE; break;
254 	case MMC_RSP_R1:
255 	case MMC_RSP_R1_NO_CRC:
256 			   c |= RESP_R1;   break;
257 	case MMC_RSP_R1B:  c |= RESP_R1B;  break;
258 	case MMC_RSP_R2:   c |= RESP_R2;   break;
259 	case MMC_RSP_R3:   c |= RESP_R3;   break;
260 	default:
261 		pr_debug("Unknown response type %d\n", mmc_resp_type(cmd));
262 		return -EINVAL;
263 	}
264 
265 	host->cmd = cmd;
266 
267 /* FIXME - this seems to be ok commented out but the spec suggest this bit
268  *         should be set when issuing app commands.
269  *	if(cmd->flags & MMC_FLAG_ACMD)
270  *		c |= APP_CMD;
271  */
272 	if (data) {
273 		c |= DATA_PRESENT;
274 		if (data->blocks > 1) {
275 			sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, TMIO_STOP_SEC);
276 			c |= TRANSFER_MULTI;
277 
278 			/*
279 			 * Disable auto CMD12 at IO_RW_EXTENDED and
280 			 * SET_BLOCK_COUNT when doing multiple block transfer
281 			 */
282 			if ((host->pdata->flags & TMIO_MMC_HAVE_CMD12_CTRL) &&
283 			    (cmd->opcode == SD_IO_RW_EXTENDED || host->mrq->sbc))
284 				c |= NO_CMD12_ISSUE;
285 		}
286 		if (data->flags & MMC_DATA_READ)
287 			c |= TRANSFER_READ;
288 	}
289 
290 	tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_CMD);
291 
292 	/* Fire off the command */
293 	sd_ctrl_write32_as_16_and_16(host, CTL_ARG_REG, cmd->arg);
294 	sd_ctrl_write16(host, CTL_SD_CMD, c);
295 
296 	return 0;
297 }
298 
299 static void tmio_mmc_transfer_data(struct tmio_mmc_host *host,
300 				   unsigned short *buf,
301 				   unsigned int count)
302 {
303 	int is_read = host->data->flags & MMC_DATA_READ;
304 	u8  *buf8;
305 
306 	/*
307 	 * Transfer the data
308 	 */
309 	if (host->pdata->flags & TMIO_MMC_32BIT_DATA_PORT) {
310 		u32 data = 0;
311 		u32 *buf32 = (u32 *)buf;
312 
313 		if (is_read)
314 			sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT, buf32,
315 					   count >> 2);
316 		else
317 			sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT, buf32,
318 					    count >> 2);
319 
320 		/* if count was multiple of 4 */
321 		if (!(count & 0x3))
322 			return;
323 
324 		buf32 += count >> 2;
325 		count %= 4;
326 
327 		if (is_read) {
328 			sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT, &data, 1);
329 			memcpy(buf32, &data, count);
330 		} else {
331 			memcpy(&data, buf32, count);
332 			sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT, &data, 1);
333 		}
334 
335 		return;
336 	}
337 
338 	if (is_read)
339 		sd_ctrl_read16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
340 	else
341 		sd_ctrl_write16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
342 
343 	/* if count was even number */
344 	if (!(count & 0x1))
345 		return;
346 
347 	/* if count was odd number */
348 	buf8 = (u8 *)(buf + (count >> 1));
349 
350 	/*
351 	 * FIXME
352 	 *
353 	 * driver and this function are assuming that
354 	 * it is used as little endian
355 	 */
356 	if (is_read)
357 		*buf8 = sd_ctrl_read16(host, CTL_SD_DATA_PORT) & 0xff;
358 	else
359 		sd_ctrl_write16(host, CTL_SD_DATA_PORT, *buf8);
360 }
361 
362 /*
363  * This chip always returns (at least?) as much data as you ask for.
364  * I'm unsure what happens if you ask for less than a block. This should be
365  * looked into to ensure that a funny length read doesn't hose the controller.
366  */
367 static void tmio_mmc_pio_irq(struct tmio_mmc_host *host)
368 {
369 	struct mmc_data *data = host->data;
370 	void *sg_virt;
371 	unsigned short *buf;
372 	unsigned int count;
373 	unsigned long flags;
374 
375 	if (host->dma_on) {
376 		pr_err("PIO IRQ in DMA mode!\n");
377 		return;
378 	} else if (!data) {
379 		pr_debug("Spurious PIO IRQ\n");
380 		return;
381 	}
382 
383 	sg_virt = tmio_mmc_kmap_atomic(host->sg_ptr, &flags);
384 	buf = (unsigned short *)(sg_virt + host->sg_off);
385 
386 	count = host->sg_ptr->length - host->sg_off;
387 	if (count > data->blksz)
388 		count = data->blksz;
389 
390 	pr_debug("count: %08x offset: %08x flags %08x\n",
391 		 count, host->sg_off, data->flags);
392 
393 	/* Transfer the data */
394 	tmio_mmc_transfer_data(host, buf, count);
395 
396 	host->sg_off += count;
397 
398 	tmio_mmc_kunmap_atomic(host->sg_ptr, &flags, sg_virt);
399 
400 	if (host->sg_off == host->sg_ptr->length)
401 		tmio_mmc_next_sg(host);
402 }
403 
404 static void tmio_mmc_check_bounce_buffer(struct tmio_mmc_host *host)
405 {
406 	if (host->sg_ptr == &host->bounce_sg) {
407 		unsigned long flags;
408 		void *sg_vaddr = tmio_mmc_kmap_atomic(host->sg_orig, &flags);
409 
410 		memcpy(sg_vaddr, host->bounce_buf, host->bounce_sg.length);
411 		tmio_mmc_kunmap_atomic(host->sg_orig, &flags, sg_vaddr);
412 	}
413 }
414 
415 /* needs to be called with host->lock held */
416 void tmio_mmc_do_data_irq(struct tmio_mmc_host *host)
417 {
418 	struct mmc_data *data = host->data;
419 	struct mmc_command *stop;
420 
421 	host->data = NULL;
422 
423 	if (!data) {
424 		dev_warn(&host->pdev->dev, "Spurious data end IRQ\n");
425 		return;
426 	}
427 	stop = data->stop;
428 
429 	/* FIXME - return correct transfer count on errors */
430 	if (!data->error)
431 		data->bytes_xfered = data->blocks * data->blksz;
432 	else
433 		data->bytes_xfered = 0;
434 
435 	pr_debug("Completed data request\n");
436 
437 	/*
438 	 * FIXME: other drivers allow an optional stop command of any given type
439 	 *        which we dont do, as the chip can auto generate them.
440 	 *        Perhaps we can be smarter about when to use auto CMD12 and
441 	 *        only issue the auto request when we know this is the desired
442 	 *        stop command, allowing fallback to the stop command the
443 	 *        upper layers expect. For now, we do what works.
444 	 */
445 
446 	if (data->flags & MMC_DATA_READ) {
447 		if (host->dma_on)
448 			tmio_mmc_check_bounce_buffer(host);
449 		dev_dbg(&host->pdev->dev, "Complete Rx request %p\n",
450 			host->mrq);
451 	} else {
452 		dev_dbg(&host->pdev->dev, "Complete Tx request %p\n",
453 			host->mrq);
454 	}
455 
456 	if (stop && !host->mrq->sbc) {
457 		if (stop->opcode != MMC_STOP_TRANSMISSION || stop->arg)
458 			dev_err(&host->pdev->dev, "unsupported stop: CMD%u,0x%x. We did CMD12,0\n",
459 				stop->opcode, stop->arg);
460 
461 		/* fill in response from auto CMD12 */
462 		stop->resp[0] = sd_ctrl_read16_and_16_as_32(host, CTL_RESPONSE);
463 
464 		sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0);
465 	}
466 
467 	schedule_work(&host->done);
468 }
469 EXPORT_SYMBOL_GPL(tmio_mmc_do_data_irq);
470 
471 static void tmio_mmc_data_irq(struct tmio_mmc_host *host, unsigned int stat)
472 {
473 	struct mmc_data *data;
474 
475 	spin_lock(&host->lock);
476 	data = host->data;
477 
478 	if (!data)
479 		goto out;
480 
481 	if (stat & TMIO_STAT_CRCFAIL || stat & TMIO_STAT_STOPBIT_ERR ||
482 	    stat & TMIO_STAT_TXUNDERRUN)
483 		data->error = -EILSEQ;
484 	if (host->dma_on && (data->flags & MMC_DATA_WRITE)) {
485 		u32 status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS);
486 		bool done = false;
487 
488 		/*
489 		 * Has all data been written out yet? Testing on SuperH showed,
490 		 * that in most cases the first interrupt comes already with the
491 		 * BUSY status bit clear, but on some operations, like mount or
492 		 * in the beginning of a write / sync / umount, there is one
493 		 * DATAEND interrupt with the BUSY bit set, in this cases
494 		 * waiting for one more interrupt fixes the problem.
495 		 */
496 		if (host->pdata->flags & TMIO_MMC_HAS_IDLE_WAIT) {
497 			if (status & TMIO_STAT_SCLKDIVEN)
498 				done = true;
499 		} else {
500 			if (!(status & TMIO_STAT_CMD_BUSY))
501 				done = true;
502 		}
503 
504 		if (done) {
505 			tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
506 			tmio_mmc_dataend_dma(host);
507 		}
508 	} else if (host->dma_on && (data->flags & MMC_DATA_READ)) {
509 		tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
510 		tmio_mmc_dataend_dma(host);
511 	} else {
512 		tmio_mmc_do_data_irq(host);
513 		tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_READOP | TMIO_MASK_WRITEOP);
514 	}
515 out:
516 	spin_unlock(&host->lock);
517 }
518 
519 static void tmio_mmc_cmd_irq(struct tmio_mmc_host *host, unsigned int stat)
520 {
521 	struct mmc_command *cmd = host->cmd;
522 	int i, addr;
523 
524 	spin_lock(&host->lock);
525 
526 	if (!host->cmd) {
527 		pr_debug("Spurious CMD irq\n");
528 		goto out;
529 	}
530 
531 	/* This controller is sicker than the PXA one. Not only do we need to
532 	 * drop the top 8 bits of the first response word, we also need to
533 	 * modify the order of the response for short response command types.
534 	 */
535 
536 	for (i = 3, addr = CTL_RESPONSE ; i >= 0 ; i--, addr += 4)
537 		cmd->resp[i] = sd_ctrl_read16_and_16_as_32(host, addr);
538 
539 	if (cmd->flags &  MMC_RSP_136) {
540 		cmd->resp[0] = (cmd->resp[0] << 8) | (cmd->resp[1] >> 24);
541 		cmd->resp[1] = (cmd->resp[1] << 8) | (cmd->resp[2] >> 24);
542 		cmd->resp[2] = (cmd->resp[2] << 8) | (cmd->resp[3] >> 24);
543 		cmd->resp[3] <<= 8;
544 	} else if (cmd->flags & MMC_RSP_R3) {
545 		cmd->resp[0] = cmd->resp[3];
546 	}
547 
548 	if (stat & TMIO_STAT_CMDTIMEOUT)
549 		cmd->error = -ETIMEDOUT;
550 	else if ((stat & TMIO_STAT_CRCFAIL && cmd->flags & MMC_RSP_CRC) ||
551 		 stat & TMIO_STAT_STOPBIT_ERR ||
552 		 stat & TMIO_STAT_CMD_IDX_ERR)
553 		cmd->error = -EILSEQ;
554 
555 	/* If there is data to handle we enable data IRQs here, and
556 	 * we will ultimatley finish the request in the data_end handler.
557 	 * If theres no data or we encountered an error, finish now.
558 	 */
559 	if (host->data && (!cmd->error || cmd->error == -EILSEQ)) {
560 		if (host->data->flags & MMC_DATA_READ) {
561 			if (!host->dma_on) {
562 				tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_READOP);
563 			} else {
564 				tmio_mmc_disable_mmc_irqs(host,
565 							  TMIO_MASK_READOP);
566 				tasklet_schedule(&host->dma_issue);
567 			}
568 		} else {
569 			if (!host->dma_on) {
570 				tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_WRITEOP);
571 			} else {
572 				tmio_mmc_disable_mmc_irqs(host,
573 							  TMIO_MASK_WRITEOP);
574 				tasklet_schedule(&host->dma_issue);
575 			}
576 		}
577 	} else {
578 		schedule_work(&host->done);
579 	}
580 
581 out:
582 	spin_unlock(&host->lock);
583 }
584 
585 static bool __tmio_mmc_card_detect_irq(struct tmio_mmc_host *host,
586 				       int ireg, int status)
587 {
588 	struct mmc_host *mmc = host->mmc;
589 
590 	/* Card insert / remove attempts */
591 	if (ireg & (TMIO_STAT_CARD_INSERT | TMIO_STAT_CARD_REMOVE)) {
592 		tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CARD_INSERT |
593 			TMIO_STAT_CARD_REMOVE);
594 		if ((((ireg & TMIO_STAT_CARD_REMOVE) && mmc->card) ||
595 		     ((ireg & TMIO_STAT_CARD_INSERT) && !mmc->card)) &&
596 		    !work_pending(&mmc->detect.work))
597 			mmc_detect_change(host->mmc, msecs_to_jiffies(100));
598 		return true;
599 	}
600 
601 	return false;
602 }
603 
604 static bool __tmio_mmc_sdcard_irq(struct tmio_mmc_host *host, int ireg,
605 				  int status)
606 {
607 	/* Command completion */
608 	if (ireg & (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT)) {
609 		tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CMDRESPEND |
610 				      TMIO_STAT_CMDTIMEOUT);
611 		tmio_mmc_cmd_irq(host, status);
612 		return true;
613 	}
614 
615 	/* Data transfer */
616 	if (ireg & (TMIO_STAT_RXRDY | TMIO_STAT_TXRQ)) {
617 		tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_RXRDY | TMIO_STAT_TXRQ);
618 		tmio_mmc_pio_irq(host);
619 		return true;
620 	}
621 
622 	/* Data transfer completion */
623 	if (ireg & TMIO_STAT_DATAEND) {
624 		tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_DATAEND);
625 		tmio_mmc_data_irq(host, status);
626 		return true;
627 	}
628 
629 	return false;
630 }
631 
632 static void __tmio_mmc_sdio_irq(struct tmio_mmc_host *host)
633 {
634 	struct mmc_host *mmc = host->mmc;
635 	struct tmio_mmc_data *pdata = host->pdata;
636 	unsigned int ireg, status;
637 	unsigned int sdio_status;
638 
639 	if (!(pdata->flags & TMIO_MMC_SDIO_IRQ))
640 		return;
641 
642 	status = sd_ctrl_read16(host, CTL_SDIO_STATUS);
643 	ireg = status & TMIO_SDIO_MASK_ALL & ~host->sdio_irq_mask;
644 
645 	sdio_status = status & ~TMIO_SDIO_MASK_ALL;
646 	if (pdata->flags & TMIO_MMC_SDIO_STATUS_SETBITS)
647 		sdio_status |= TMIO_SDIO_SETBITS_MASK;
648 
649 	sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status);
650 
651 	if (mmc->caps & MMC_CAP_SDIO_IRQ && ireg & TMIO_SDIO_STAT_IOIRQ)
652 		mmc_signal_sdio_irq(mmc);
653 }
654 
655 irqreturn_t tmio_mmc_irq(int irq, void *devid)
656 {
657 	struct tmio_mmc_host *host = devid;
658 	unsigned int ireg, status;
659 
660 	status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS);
661 	ireg = status & TMIO_MASK_IRQ & ~host->sdcard_irq_mask;
662 
663 	/* Clear the status except the interrupt status */
664 	sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, TMIO_MASK_IRQ);
665 
666 	if (__tmio_mmc_card_detect_irq(host, ireg, status))
667 		return IRQ_HANDLED;
668 	if (__tmio_mmc_sdcard_irq(host, ireg, status))
669 		return IRQ_HANDLED;
670 
671 	__tmio_mmc_sdio_irq(host);
672 
673 	return IRQ_HANDLED;
674 }
675 EXPORT_SYMBOL_GPL(tmio_mmc_irq);
676 
677 static int tmio_mmc_start_data(struct tmio_mmc_host *host,
678 			       struct mmc_data *data)
679 {
680 	struct tmio_mmc_data *pdata = host->pdata;
681 
682 	pr_debug("setup data transfer: blocksize %08x  nr_blocks %d\n",
683 		 data->blksz, data->blocks);
684 
685 	/* Some hardware cannot perform 2 byte requests in 4/8 bit mode */
686 	if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_4 ||
687 	    host->mmc->ios.bus_width == MMC_BUS_WIDTH_8) {
688 		int blksz_2bytes = pdata->flags & TMIO_MMC_BLKSZ_2BYTES;
689 
690 		if (data->blksz < 2 || (data->blksz < 4 && !blksz_2bytes)) {
691 			pr_err("%s: %d byte block unsupported in 4/8 bit mode\n",
692 			       mmc_hostname(host->mmc), data->blksz);
693 			return -EINVAL;
694 		}
695 	}
696 
697 	tmio_mmc_init_sg(host, data);
698 	host->data = data;
699 	host->dma_on = false;
700 
701 	/* Set transfer length / blocksize */
702 	sd_ctrl_write16(host, CTL_SD_XFER_LEN, data->blksz);
703 	sd_ctrl_write16(host, CTL_XFER_BLK_COUNT, data->blocks);
704 
705 	tmio_mmc_start_dma(host, data);
706 
707 	return 0;
708 }
709 
710 static int tmio_mmc_execute_tuning(struct mmc_host *mmc, u32 opcode)
711 {
712 	struct tmio_mmc_host *host = mmc_priv(mmc);
713 	int i, ret = 0;
714 
715 	if (!host->init_tuning || !host->select_tuning)
716 		/* Tuning is not supported */
717 		goto out;
718 
719 	host->tap_num = host->init_tuning(host);
720 	if (!host->tap_num)
721 		/* Tuning is not supported */
722 		goto out;
723 
724 	if (host->tap_num * 2 >= sizeof(host->taps) * BITS_PER_BYTE) {
725 		dev_warn_once(&host->pdev->dev,
726 			"Too many taps, skipping tuning. Please consider updating size of taps field of tmio_mmc_host\n");
727 		goto out;
728 	}
729 
730 	bitmap_zero(host->taps, host->tap_num * 2);
731 
732 	/* Issue CMD19 twice for each tap */
733 	for (i = 0; i < 2 * host->tap_num; i++) {
734 		if (host->prepare_tuning)
735 			host->prepare_tuning(host, i % host->tap_num);
736 
737 		ret = mmc_send_tuning(mmc, opcode, NULL);
738 		if (ret == 0)
739 			set_bit(i, host->taps);
740 	}
741 
742 	ret = host->select_tuning(host);
743 
744 out:
745 	if (ret < 0) {
746 		dev_warn(&host->pdev->dev, "Tuning procedure failed\n");
747 		tmio_mmc_hw_reset(mmc);
748 	}
749 
750 	return ret;
751 }
752 
753 static void tmio_process_mrq(struct tmio_mmc_host *host,
754 			     struct mmc_request *mrq)
755 {
756 	struct mmc_command *cmd;
757 	int ret;
758 
759 	if (mrq->sbc && host->cmd != mrq->sbc) {
760 		cmd = mrq->sbc;
761 	} else {
762 		cmd = mrq->cmd;
763 		if (mrq->data) {
764 			ret = tmio_mmc_start_data(host, mrq->data);
765 			if (ret)
766 				goto fail;
767 		}
768 	}
769 
770 	ret = tmio_mmc_start_command(host, cmd);
771 	if (ret)
772 		goto fail;
773 
774 	schedule_delayed_work(&host->delayed_reset_work,
775 			      msecs_to_jiffies(CMDREQ_TIMEOUT));
776 	return;
777 
778 fail:
779 	host->mrq = NULL;
780 	mrq->cmd->error = ret;
781 	mmc_request_done(host->mmc, mrq);
782 }
783 
784 /* Process requests from the MMC layer */
785 static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
786 {
787 	struct tmio_mmc_host *host = mmc_priv(mmc);
788 	unsigned long flags;
789 
790 	spin_lock_irqsave(&host->lock, flags);
791 
792 	if (host->mrq) {
793 		pr_debug("request not null\n");
794 		if (IS_ERR(host->mrq)) {
795 			spin_unlock_irqrestore(&host->lock, flags);
796 			mrq->cmd->error = -EAGAIN;
797 			mmc_request_done(mmc, mrq);
798 			return;
799 		}
800 	}
801 
802 	host->last_req_ts = jiffies;
803 	wmb();
804 	host->mrq = mrq;
805 
806 	spin_unlock_irqrestore(&host->lock, flags);
807 
808 	tmio_process_mrq(host, mrq);
809 }
810 
811 static void tmio_mmc_finish_request(struct tmio_mmc_host *host)
812 {
813 	struct mmc_request *mrq;
814 	unsigned long flags;
815 
816 	spin_lock_irqsave(&host->lock, flags);
817 
818 	mrq = host->mrq;
819 	if (IS_ERR_OR_NULL(mrq)) {
820 		spin_unlock_irqrestore(&host->lock, flags);
821 		return;
822 	}
823 
824 	/* If not SET_BLOCK_COUNT, clear old data */
825 	if (host->cmd != mrq->sbc) {
826 		host->cmd = NULL;
827 		host->data = NULL;
828 		host->mrq = NULL;
829 	}
830 
831 	cancel_delayed_work(&host->delayed_reset_work);
832 
833 	spin_unlock_irqrestore(&host->lock, flags);
834 
835 	if (mrq->cmd->error || (mrq->data && mrq->data->error))
836 		tmio_mmc_abort_dma(host);
837 
838 	if (host->check_scc_error && host->check_scc_error(host))
839 		mrq->cmd->error = -EILSEQ;
840 
841 	/* If SET_BLOCK_COUNT, continue with main command */
842 	if (host->mrq && !mrq->cmd->error) {
843 		tmio_process_mrq(host, mrq);
844 		return;
845 	}
846 
847 	mmc_request_done(host->mmc, mrq);
848 }
849 
850 static void tmio_mmc_done_work(struct work_struct *work)
851 {
852 	struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
853 						  done);
854 	tmio_mmc_finish_request(host);
855 }
856 
857 static void tmio_mmc_power_on(struct tmio_mmc_host *host, unsigned short vdd)
858 {
859 	struct mmc_host *mmc = host->mmc;
860 	int ret = 0;
861 
862 	/* .set_ios() is returning void, so, no chance to report an error */
863 
864 	if (host->set_pwr)
865 		host->set_pwr(host->pdev, 1);
866 
867 	if (!IS_ERR(mmc->supply.vmmc)) {
868 		ret = mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, vdd);
869 		/*
870 		 * Attention: empiric value. With a b43 WiFi SDIO card this
871 		 * delay proved necessary for reliable card-insertion probing.
872 		 * 100us were not enough. Is this the same 140us delay, as in
873 		 * tmio_mmc_set_ios()?
874 		 */
875 		usleep_range(200, 300);
876 	}
877 	/*
878 	 * It seems, VccQ should be switched on after Vcc, this is also what the
879 	 * omap_hsmmc.c driver does.
880 	 */
881 	if (!IS_ERR(mmc->supply.vqmmc) && !ret) {
882 		ret = regulator_enable(mmc->supply.vqmmc);
883 		usleep_range(200, 300);
884 	}
885 
886 	if (ret < 0)
887 		dev_dbg(&host->pdev->dev, "Regulators failed to power up: %d\n",
888 			ret);
889 }
890 
891 static void tmio_mmc_power_off(struct tmio_mmc_host *host)
892 {
893 	struct mmc_host *mmc = host->mmc;
894 
895 	if (!IS_ERR(mmc->supply.vqmmc))
896 		regulator_disable(mmc->supply.vqmmc);
897 
898 	if (!IS_ERR(mmc->supply.vmmc))
899 		mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0);
900 
901 	if (host->set_pwr)
902 		host->set_pwr(host->pdev, 0);
903 }
904 
905 static void tmio_mmc_set_bus_width(struct tmio_mmc_host *host,
906 				   unsigned char bus_width)
907 {
908 	u16 reg = sd_ctrl_read16(host, CTL_SD_MEM_CARD_OPT)
909 				& ~(CARD_OPT_WIDTH | CARD_OPT_WIDTH8);
910 
911 	/* reg now applies to MMC_BUS_WIDTH_4 */
912 	if (bus_width == MMC_BUS_WIDTH_1)
913 		reg |= CARD_OPT_WIDTH;
914 	else if (bus_width == MMC_BUS_WIDTH_8)
915 		reg |= CARD_OPT_WIDTH8;
916 
917 	sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, reg);
918 }
919 
920 /* Set MMC clock / power.
921  * Note: This controller uses a simple divider scheme therefore it cannot
922  * run a MMC card at full speed (20MHz). The max clock is 24MHz on SD, but as
923  * MMC wont run that fast, it has to be clocked at 12MHz which is the next
924  * slowest setting.
925  */
926 static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
927 {
928 	struct tmio_mmc_host *host = mmc_priv(mmc);
929 	struct device *dev = &host->pdev->dev;
930 	unsigned long flags;
931 
932 	mutex_lock(&host->ios_lock);
933 
934 	spin_lock_irqsave(&host->lock, flags);
935 	if (host->mrq) {
936 		if (IS_ERR(host->mrq)) {
937 			dev_dbg(dev,
938 				"%s.%d: concurrent .set_ios(), clk %u, mode %u\n",
939 				current->comm, task_pid_nr(current),
940 				ios->clock, ios->power_mode);
941 			host->mrq = ERR_PTR(-EINTR);
942 		} else {
943 			dev_dbg(dev,
944 				"%s.%d: CMD%u active since %lu, now %lu!\n",
945 				current->comm, task_pid_nr(current),
946 				host->mrq->cmd->opcode, host->last_req_ts,
947 				jiffies);
948 		}
949 		spin_unlock_irqrestore(&host->lock, flags);
950 
951 		mutex_unlock(&host->ios_lock);
952 		return;
953 	}
954 
955 	host->mrq = ERR_PTR(-EBUSY);
956 
957 	spin_unlock_irqrestore(&host->lock, flags);
958 
959 	switch (ios->power_mode) {
960 	case MMC_POWER_OFF:
961 		tmio_mmc_power_off(host);
962 		host->set_clock(host, 0);
963 		break;
964 	case MMC_POWER_UP:
965 		tmio_mmc_power_on(host, ios->vdd);
966 		host->set_clock(host, ios->clock);
967 		tmio_mmc_set_bus_width(host, ios->bus_width);
968 		break;
969 	case MMC_POWER_ON:
970 		host->set_clock(host, ios->clock);
971 		tmio_mmc_set_bus_width(host, ios->bus_width);
972 		break;
973 	}
974 
975 	/* Let things settle. delay taken from winCE driver */
976 	usleep_range(140, 200);
977 	if (PTR_ERR(host->mrq) == -EINTR)
978 		dev_dbg(&host->pdev->dev,
979 			"%s.%d: IOS interrupted: clk %u, mode %u",
980 			current->comm, task_pid_nr(current),
981 			ios->clock, ios->power_mode);
982 	host->mrq = NULL;
983 
984 	host->clk_cache = ios->clock;
985 
986 	mutex_unlock(&host->ios_lock);
987 }
988 
989 static int tmio_mmc_get_ro(struct mmc_host *mmc)
990 {
991 	struct tmio_mmc_host *host = mmc_priv(mmc);
992 
993 	return !(sd_ctrl_read16_and_16_as_32(host, CTL_STATUS) &
994 		 TMIO_STAT_WRPROTECT);
995 }
996 
997 static int tmio_mmc_get_cd(struct mmc_host *mmc)
998 {
999 	struct tmio_mmc_host *host = mmc_priv(mmc);
1000 
1001 	return !!(sd_ctrl_read16_and_16_as_32(host, CTL_STATUS) &
1002 		  TMIO_STAT_SIGSTATE);
1003 }
1004 
1005 static int tmio_multi_io_quirk(struct mmc_card *card,
1006 			       unsigned int direction, int blk_size)
1007 {
1008 	struct tmio_mmc_host *host = mmc_priv(card->host);
1009 
1010 	if (host->multi_io_quirk)
1011 		return host->multi_io_quirk(card, direction, blk_size);
1012 
1013 	return blk_size;
1014 }
1015 
1016 static int tmio_mmc_prepare_hs400_tuning(struct mmc_host *mmc,
1017 					 struct mmc_ios *ios)
1018 {
1019 	struct tmio_mmc_host *host = mmc_priv(mmc);
1020 
1021 	if (host->prepare_hs400_tuning)
1022 		host->prepare_hs400_tuning(host);
1023 
1024 	return 0;
1025 }
1026 
1027 static void tmio_mmc_hs400_downgrade(struct mmc_host *mmc)
1028 {
1029 	struct tmio_mmc_host *host = mmc_priv(mmc);
1030 
1031 	if (host->hs400_downgrade)
1032 		host->hs400_downgrade(host);
1033 }
1034 
1035 static void tmio_mmc_hs400_complete(struct mmc_host *mmc)
1036 {
1037 	struct tmio_mmc_host *host = mmc_priv(mmc);
1038 
1039 	if (host->hs400_complete)
1040 		host->hs400_complete(host);
1041 }
1042 
1043 static const struct mmc_host_ops tmio_mmc_ops = {
1044 	.request	= tmio_mmc_request,
1045 	.set_ios	= tmio_mmc_set_ios,
1046 	.get_ro         = tmio_mmc_get_ro,
1047 	.get_cd		= tmio_mmc_get_cd,
1048 	.enable_sdio_irq = tmio_mmc_enable_sdio_irq,
1049 	.multi_io_quirk	= tmio_multi_io_quirk,
1050 	.hw_reset	= tmio_mmc_hw_reset,
1051 	.execute_tuning = tmio_mmc_execute_tuning,
1052 	.prepare_hs400_tuning = tmio_mmc_prepare_hs400_tuning,
1053 	.hs400_downgrade = tmio_mmc_hs400_downgrade,
1054 	.hs400_complete	= tmio_mmc_hs400_complete,
1055 };
1056 
1057 static int tmio_mmc_init_ocr(struct tmio_mmc_host *host)
1058 {
1059 	struct tmio_mmc_data *pdata = host->pdata;
1060 	struct mmc_host *mmc = host->mmc;
1061 	int err;
1062 
1063 	err = mmc_regulator_get_supply(mmc);
1064 	if (err)
1065 		return err;
1066 
1067 	/* use ocr_mask if no regulator */
1068 	if (!mmc->ocr_avail)
1069 		mmc->ocr_avail =  pdata->ocr_mask;
1070 
1071 	/*
1072 	 * try again.
1073 	 * There is possibility that regulator has not been probed
1074 	 */
1075 	if (!mmc->ocr_avail)
1076 		return -EPROBE_DEFER;
1077 
1078 	return 0;
1079 }
1080 
1081 static void tmio_mmc_of_parse(struct platform_device *pdev,
1082 			      struct mmc_host *mmc)
1083 {
1084 	const struct device_node *np = pdev->dev.of_node;
1085 
1086 	if (!np)
1087 		return;
1088 
1089 	/*
1090 	 * DEPRECATED:
1091 	 * For new platforms, please use "disable-wp" instead of
1092 	 * "toshiba,mmc-wrprotect-disable"
1093 	 */
1094 	if (of_get_property(np, "toshiba,mmc-wrprotect-disable", NULL))
1095 		mmc->caps2 |= MMC_CAP2_NO_WRITE_PROTECT;
1096 }
1097 
1098 struct tmio_mmc_host *tmio_mmc_host_alloc(struct platform_device *pdev,
1099 					  struct tmio_mmc_data *pdata)
1100 {
1101 	struct tmio_mmc_host *host;
1102 	struct mmc_host *mmc;
1103 	struct resource *res;
1104 	void __iomem *ctl;
1105 	int ret;
1106 
1107 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1108 	ctl = devm_ioremap_resource(&pdev->dev, res);
1109 	if (IS_ERR(ctl))
1110 		return ERR_CAST(ctl);
1111 
1112 	mmc = mmc_alloc_host(sizeof(struct tmio_mmc_host), &pdev->dev);
1113 	if (!mmc)
1114 		return ERR_PTR(-ENOMEM);
1115 
1116 	host = mmc_priv(mmc);
1117 	host->ctl = ctl;
1118 	host->mmc = mmc;
1119 	host->pdev = pdev;
1120 	host->pdata = pdata;
1121 	host->ops = tmio_mmc_ops;
1122 	mmc->ops = &host->ops;
1123 
1124 	ret = mmc_of_parse(host->mmc);
1125 	if (ret) {
1126 		host = ERR_PTR(ret);
1127 		goto free;
1128 	}
1129 
1130 	tmio_mmc_of_parse(pdev, mmc);
1131 
1132 	platform_set_drvdata(pdev, host);
1133 
1134 	return host;
1135 free:
1136 	mmc_free_host(mmc);
1137 
1138 	return host;
1139 }
1140 EXPORT_SYMBOL_GPL(tmio_mmc_host_alloc);
1141 
1142 void tmio_mmc_host_free(struct tmio_mmc_host *host)
1143 {
1144 	mmc_free_host(host->mmc);
1145 }
1146 EXPORT_SYMBOL_GPL(tmio_mmc_host_free);
1147 
1148 int tmio_mmc_host_probe(struct tmio_mmc_host *_host)
1149 {
1150 	struct platform_device *pdev = _host->pdev;
1151 	struct tmio_mmc_data *pdata = _host->pdata;
1152 	struct mmc_host *mmc = _host->mmc;
1153 	int ret;
1154 
1155 	/*
1156 	 * Check the sanity of mmc->f_min to prevent host->set_clock() from
1157 	 * looping forever...
1158 	 */
1159 	if (mmc->f_min == 0)
1160 		return -EINVAL;
1161 
1162 	if (!(pdata->flags & TMIO_MMC_HAS_IDLE_WAIT))
1163 		_host->write16_hook = NULL;
1164 
1165 	_host->set_pwr = pdata->set_pwr;
1166 
1167 	ret = tmio_mmc_init_ocr(_host);
1168 	if (ret < 0)
1169 		return ret;
1170 
1171 	/*
1172 	 * Look for a card detect GPIO, if it fails with anything
1173 	 * else than a probe deferral, just live without it.
1174 	 */
1175 	ret = mmc_gpiod_request_cd(mmc, "cd", 0, false, 0, NULL);
1176 	if (ret == -EPROBE_DEFER)
1177 		return ret;
1178 
1179 	mmc->caps |= MMC_CAP_4_BIT_DATA | pdata->capabilities;
1180 	mmc->caps2 |= pdata->capabilities2;
1181 	mmc->max_segs = pdata->max_segs ? : 32;
1182 	mmc->max_blk_size = 512;
1183 	mmc->max_blk_count = pdata->max_blk_count ? :
1184 		(PAGE_SIZE / mmc->max_blk_size) * mmc->max_segs;
1185 	mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count;
1186 	/*
1187 	 * Since swiotlb has memory size limitation, this will calculate
1188 	 * the maximum size locally (because we don't have any APIs for it now)
1189 	 * and check the current max_req_size. And then, this will update
1190 	 * the max_req_size if needed as a workaround.
1191 	 */
1192 	if (swiotlb_max_segment()) {
1193 		unsigned int max_size = (1 << IO_TLB_SHIFT) * IO_TLB_SEGSIZE;
1194 
1195 		if (mmc->max_req_size > max_size)
1196 			mmc->max_req_size = max_size;
1197 	}
1198 	mmc->max_seg_size = mmc->max_req_size;
1199 
1200 	if (mmc_can_gpio_ro(mmc))
1201 		_host->ops.get_ro = mmc_gpio_get_ro;
1202 
1203 	if (mmc_can_gpio_cd(mmc))
1204 		_host->ops.get_cd = mmc_gpio_get_cd;
1205 
1206 	_host->native_hotplug = !(mmc_can_gpio_cd(mmc) ||
1207 				  mmc->caps & MMC_CAP_NEEDS_POLL ||
1208 				  !mmc_card_is_removable(mmc));
1209 
1210 	if (!_host->reset)
1211 		_host->reset = tmio_mmc_reset;
1212 
1213 	/*
1214 	 * On Gen2+, eMMC with NONREMOVABLE currently fails because native
1215 	 * hotplug gets disabled. It seems RuntimePM related yet we need further
1216 	 * research. Since we are planning a PM overhaul anyway, let's enforce
1217 	 * for now the device being active by enabling native hotplug always.
1218 	 */
1219 	if (pdata->flags & TMIO_MMC_MIN_RCAR2)
1220 		_host->native_hotplug = true;
1221 
1222 	/*
1223 	 * While using internal tmio hardware logic for card detection, we need
1224 	 * to ensure it stays powered for it to work.
1225 	 */
1226 	if (_host->native_hotplug)
1227 		pm_runtime_get_noresume(&pdev->dev);
1228 
1229 	_host->sdio_irq_enabled = false;
1230 	if (pdata->flags & TMIO_MMC_SDIO_IRQ)
1231 		_host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
1232 
1233 	_host->set_clock(_host, 0);
1234 	tmio_mmc_hw_reset(mmc);
1235 
1236 	_host->sdcard_irq_mask = sd_ctrl_read16_and_16_as_32(_host, CTL_IRQ_MASK);
1237 	tmio_mmc_disable_mmc_irqs(_host, TMIO_MASK_ALL);
1238 
1239 	if (_host->native_hotplug)
1240 		tmio_mmc_enable_mmc_irqs(_host,
1241 				TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT);
1242 
1243 	spin_lock_init(&_host->lock);
1244 	mutex_init(&_host->ios_lock);
1245 
1246 	/* Init delayed work for request timeouts */
1247 	INIT_DELAYED_WORK(&_host->delayed_reset_work, tmio_mmc_reset_work);
1248 	INIT_WORK(&_host->done, tmio_mmc_done_work);
1249 
1250 	/* See if we also get DMA */
1251 	tmio_mmc_request_dma(_host, pdata);
1252 
1253 	pm_runtime_set_active(&pdev->dev);
1254 	pm_runtime_set_autosuspend_delay(&pdev->dev, 50);
1255 	pm_runtime_use_autosuspend(&pdev->dev);
1256 	pm_runtime_enable(&pdev->dev);
1257 
1258 	ret = mmc_add_host(mmc);
1259 	if (ret)
1260 		goto remove_host;
1261 
1262 	dev_pm_qos_expose_latency_limit(&pdev->dev, 100);
1263 
1264 	return 0;
1265 
1266 remove_host:
1267 	tmio_mmc_host_remove(_host);
1268 	return ret;
1269 }
1270 EXPORT_SYMBOL_GPL(tmio_mmc_host_probe);
1271 
1272 void tmio_mmc_host_remove(struct tmio_mmc_host *host)
1273 {
1274 	struct platform_device *pdev = host->pdev;
1275 	struct mmc_host *mmc = host->mmc;
1276 
1277 	if (host->pdata->flags & TMIO_MMC_SDIO_IRQ)
1278 		sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0000);
1279 
1280 	if (!host->native_hotplug)
1281 		pm_runtime_get_sync(&pdev->dev);
1282 
1283 	dev_pm_qos_hide_latency_limit(&pdev->dev);
1284 
1285 	mmc_remove_host(mmc);
1286 	cancel_work_sync(&host->done);
1287 	cancel_delayed_work_sync(&host->delayed_reset_work);
1288 	tmio_mmc_release_dma(host);
1289 
1290 	pm_runtime_put_sync(&pdev->dev);
1291 	pm_runtime_disable(&pdev->dev);
1292 }
1293 EXPORT_SYMBOL_GPL(tmio_mmc_host_remove);
1294 
1295 #ifdef CONFIG_PM
1296 static int tmio_mmc_clk_enable(struct tmio_mmc_host *host)
1297 {
1298 	if (!host->clk_enable)
1299 		return -ENOTSUPP;
1300 
1301 	return host->clk_enable(host);
1302 }
1303 
1304 static void tmio_mmc_clk_disable(struct tmio_mmc_host *host)
1305 {
1306 	if (host->clk_disable)
1307 		host->clk_disable(host);
1308 }
1309 
1310 int tmio_mmc_host_runtime_suspend(struct device *dev)
1311 {
1312 	struct tmio_mmc_host *host = dev_get_drvdata(dev);
1313 
1314 	tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_ALL);
1315 
1316 	if (host->clk_cache)
1317 		host->set_clock(host, 0);
1318 
1319 	tmio_mmc_clk_disable(host);
1320 
1321 	return 0;
1322 }
1323 EXPORT_SYMBOL_GPL(tmio_mmc_host_runtime_suspend);
1324 
1325 static bool tmio_mmc_can_retune(struct tmio_mmc_host *host)
1326 {
1327 	return host->tap_num && mmc_can_retune(host->mmc);
1328 }
1329 
1330 int tmio_mmc_host_runtime_resume(struct device *dev)
1331 {
1332 	struct tmio_mmc_host *host = dev_get_drvdata(dev);
1333 
1334 	tmio_mmc_clk_enable(host);
1335 	tmio_mmc_hw_reset(host->mmc);
1336 
1337 	if (host->clk_cache)
1338 		host->set_clock(host, host->clk_cache);
1339 
1340 	if (host->native_hotplug)
1341 		tmio_mmc_enable_mmc_irqs(host,
1342 				TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT);
1343 
1344 	tmio_mmc_enable_dma(host, true);
1345 
1346 	if (tmio_mmc_can_retune(host) && host->select_tuning(host))
1347 		dev_warn(&host->pdev->dev, "Tuning selection failed\n");
1348 
1349 	return 0;
1350 }
1351 EXPORT_SYMBOL_GPL(tmio_mmc_host_runtime_resume);
1352 #endif
1353 
1354 MODULE_LICENSE("GPL v2");
1355