xref: /openbmc/linux/drivers/mmc/host/tmio_mmc_core.c (revision 79f382b9)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Driver for the MMC / SD / SDIO IP found in:
4  *
5  * TC6393XB, TC6391XB, TC6387XB, T7L66XB, ASIC3, SH-Mobile SoCs
6  *
7  * Copyright (C) 2015-19 Renesas Electronics Corporation
8  * Copyright (C) 2016-19 Sang Engineering, Wolfram Sang
9  * Copyright (C) 2017 Horms Solutions, Simon Horman
10  * Copyright (C) 2011 Guennadi Liakhovetski
11  * Copyright (C) 2007 Ian Molton
12  * Copyright (C) 2004 Ian Molton
13  *
14  * This driver draws mainly on scattered spec sheets, Reverse engineering
15  * of the toshiba e800  SD driver and some parts of the 2.4 ASIC3 driver (4 bit
16  * support). (Further 4 bit support from a later datasheet).
17  *
18  * TODO:
19  *   Investigate using a workqueue for PIO transfers
20  *   Eliminate FIXMEs
21  *   Better Power management
22  *   Handle MMC errors better
23  *   double buffer support
24  *
25  */
26 
27 #include <linux/delay.h>
28 #include <linux/device.h>
29 #include <linux/dma-mapping.h>
30 #include <linux/highmem.h>
31 #include <linux/interrupt.h>
32 #include <linux/io.h>
33 #include <linux/irq.h>
34 #include <linux/mfd/tmio.h>
35 #include <linux/mmc/card.h>
36 #include <linux/mmc/host.h>
37 #include <linux/mmc/mmc.h>
38 #include <linux/mmc/slot-gpio.h>
39 #include <linux/module.h>
40 #include <linux/pagemap.h>
41 #include <linux/platform_device.h>
42 #include <linux/pm_qos.h>
43 #include <linux/pm_runtime.h>
44 #include <linux/regulator/consumer.h>
45 #include <linux/mmc/sdio.h>
46 #include <linux/scatterlist.h>
47 #include <linux/sizes.h>
48 #include <linux/spinlock.h>
49 #include <linux/workqueue.h>
50 
51 #include "tmio_mmc.h"
52 
53 static inline void tmio_mmc_start_dma(struct tmio_mmc_host *host,
54 				      struct mmc_data *data)
55 {
56 	if (host->dma_ops)
57 		host->dma_ops->start(host, data);
58 }
59 
60 static inline void tmio_mmc_end_dma(struct tmio_mmc_host *host)
61 {
62 	if (host->dma_ops && host->dma_ops->end)
63 		host->dma_ops->end(host);
64 }
65 
66 static inline void tmio_mmc_enable_dma(struct tmio_mmc_host *host, bool enable)
67 {
68 	if (host->dma_ops)
69 		host->dma_ops->enable(host, enable);
70 }
71 
72 static inline void tmio_mmc_request_dma(struct tmio_mmc_host *host,
73 					struct tmio_mmc_data *pdata)
74 {
75 	if (host->dma_ops) {
76 		host->dma_ops->request(host, pdata);
77 	} else {
78 		host->chan_tx = NULL;
79 		host->chan_rx = NULL;
80 	}
81 }
82 
83 static inline void tmio_mmc_release_dma(struct tmio_mmc_host *host)
84 {
85 	if (host->dma_ops)
86 		host->dma_ops->release(host);
87 }
88 
89 static inline void tmio_mmc_abort_dma(struct tmio_mmc_host *host)
90 {
91 	if (host->dma_ops)
92 		host->dma_ops->abort(host);
93 }
94 
95 static inline void tmio_mmc_dataend_dma(struct tmio_mmc_host *host)
96 {
97 	if (host->dma_ops)
98 		host->dma_ops->dataend(host);
99 }
100 
101 void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
102 {
103 	host->sdcard_irq_mask &= ~(i & TMIO_MASK_IRQ);
104 	sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
105 }
106 EXPORT_SYMBOL_GPL(tmio_mmc_enable_mmc_irqs);
107 
108 void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
109 {
110 	host->sdcard_irq_mask |= (i & TMIO_MASK_IRQ);
111 	sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
112 }
113 EXPORT_SYMBOL_GPL(tmio_mmc_disable_mmc_irqs);
114 
115 static void tmio_mmc_ack_mmc_irqs(struct tmio_mmc_host *host, u32 i)
116 {
117 	sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, ~i);
118 }
119 
120 static void tmio_mmc_init_sg(struct tmio_mmc_host *host, struct mmc_data *data)
121 {
122 	host->sg_len = data->sg_len;
123 	host->sg_ptr = data->sg;
124 	host->sg_orig = data->sg;
125 	host->sg_off = 0;
126 }
127 
128 static int tmio_mmc_next_sg(struct tmio_mmc_host *host)
129 {
130 	host->sg_ptr = sg_next(host->sg_ptr);
131 	host->sg_off = 0;
132 	return --host->sg_len;
133 }
134 
135 #define CMDREQ_TIMEOUT	5000
136 
137 static void tmio_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable)
138 {
139 	struct tmio_mmc_host *host = mmc_priv(mmc);
140 
141 	if (enable && !host->sdio_irq_enabled) {
142 		u16 sdio_status;
143 
144 		/* Keep device active while SDIO irq is enabled */
145 		pm_runtime_get_sync(mmc_dev(mmc));
146 
147 		host->sdio_irq_enabled = true;
148 		host->sdio_irq_mask = TMIO_SDIO_MASK_ALL & ~TMIO_SDIO_STAT_IOIRQ;
149 
150 		/* Clear obsolete interrupts before enabling */
151 		sdio_status = sd_ctrl_read16(host, CTL_SDIO_STATUS) & ~TMIO_SDIO_MASK_ALL;
152 		if (host->pdata->flags & TMIO_MMC_SDIO_STATUS_SETBITS)
153 			sdio_status |= TMIO_SDIO_SETBITS_MASK;
154 		sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status);
155 
156 		sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
157 	} else if (!enable && host->sdio_irq_enabled) {
158 		host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
159 		sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
160 
161 		host->sdio_irq_enabled = false;
162 		pm_runtime_mark_last_busy(mmc_dev(mmc));
163 		pm_runtime_put_autosuspend(mmc_dev(mmc));
164 	}
165 }
166 
167 static void tmio_mmc_reset(struct tmio_mmc_host *host)
168 {
169 	/* FIXME - should we set stop clock reg here */
170 	sd_ctrl_write16(host, CTL_RESET_SD, 0x0000);
171 	usleep_range(10000, 11000);
172 	sd_ctrl_write16(host, CTL_RESET_SD, 0x0001);
173 	usleep_range(10000, 11000);
174 
175 	if (host->reset)
176 		host->reset(host);
177 
178 	tmio_mmc_abort_dma(host);
179 
180 	if (host->pdata->flags & TMIO_MMC_SDIO_IRQ) {
181 		sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
182 		sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0001);
183 	}
184 }
185 
186 static void tmio_mmc_reset_work(struct work_struct *work)
187 {
188 	struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
189 						  delayed_reset_work.work);
190 	struct mmc_request *mrq;
191 	unsigned long flags;
192 
193 	spin_lock_irqsave(&host->lock, flags);
194 	mrq = host->mrq;
195 
196 	/*
197 	 * is request already finished? Since we use a non-blocking
198 	 * cancel_delayed_work(), it can happen, that a .set_ios() call preempts
199 	 * us, so, have to check for IS_ERR(host->mrq)
200 	 */
201 	if (IS_ERR_OR_NULL(mrq) ||
202 	    time_is_after_jiffies(host->last_req_ts +
203 				  msecs_to_jiffies(CMDREQ_TIMEOUT))) {
204 		spin_unlock_irqrestore(&host->lock, flags);
205 		return;
206 	}
207 
208 	dev_warn(&host->pdev->dev,
209 		 "timeout waiting for hardware interrupt (CMD%u)\n",
210 		 mrq->cmd->opcode);
211 
212 	if (host->data)
213 		host->data->error = -ETIMEDOUT;
214 	else if (host->cmd)
215 		host->cmd->error = -ETIMEDOUT;
216 	else
217 		mrq->cmd->error = -ETIMEDOUT;
218 
219 	host->cmd = NULL;
220 	host->data = NULL;
221 
222 	spin_unlock_irqrestore(&host->lock, flags);
223 
224 	tmio_mmc_reset(host);
225 
226 	/* Ready for new calls */
227 	host->mrq = NULL;
228 	mmc_request_done(host->mmc, mrq);
229 }
230 
231 /* These are the bitmasks the tmio chip requires to implement the MMC response
232  * types. Note that R1 and R6 are the same in this scheme. */
233 #define APP_CMD        0x0040
234 #define RESP_NONE      0x0300
235 #define RESP_R1        0x0400
236 #define RESP_R1B       0x0500
237 #define RESP_R2        0x0600
238 #define RESP_R3        0x0700
239 #define DATA_PRESENT   0x0800
240 #define TRANSFER_READ  0x1000
241 #define TRANSFER_MULTI 0x2000
242 #define SECURITY_CMD   0x4000
243 #define NO_CMD12_ISSUE 0x4000 /* TMIO_MMC_HAVE_CMD12_CTRL */
244 
245 static int tmio_mmc_start_command(struct tmio_mmc_host *host,
246 				  struct mmc_command *cmd)
247 {
248 	struct mmc_data *data = host->data;
249 	int c = cmd->opcode;
250 
251 	switch (mmc_resp_type(cmd)) {
252 	case MMC_RSP_NONE: c |= RESP_NONE; break;
253 	case MMC_RSP_R1:
254 	case MMC_RSP_R1_NO_CRC:
255 			   c |= RESP_R1;   break;
256 	case MMC_RSP_R1B:  c |= RESP_R1B;  break;
257 	case MMC_RSP_R2:   c |= RESP_R2;   break;
258 	case MMC_RSP_R3:   c |= RESP_R3;   break;
259 	default:
260 		pr_debug("Unknown response type %d\n", mmc_resp_type(cmd));
261 		return -EINVAL;
262 	}
263 
264 	host->cmd = cmd;
265 
266 /* FIXME - this seems to be ok commented out but the spec suggest this bit
267  *         should be set when issuing app commands.
268  *	if(cmd->flags & MMC_FLAG_ACMD)
269  *		c |= APP_CMD;
270  */
271 	if (data) {
272 		c |= DATA_PRESENT;
273 		if (data->blocks > 1) {
274 			sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, TMIO_STOP_SEC);
275 			c |= TRANSFER_MULTI;
276 
277 			/*
278 			 * Disable auto CMD12 at IO_RW_EXTENDED and
279 			 * SET_BLOCK_COUNT when doing multiple block transfer
280 			 */
281 			if ((host->pdata->flags & TMIO_MMC_HAVE_CMD12_CTRL) &&
282 			    (cmd->opcode == SD_IO_RW_EXTENDED || host->mrq->sbc))
283 				c |= NO_CMD12_ISSUE;
284 		}
285 		if (data->flags & MMC_DATA_READ)
286 			c |= TRANSFER_READ;
287 	}
288 
289 	tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_CMD);
290 
291 	/* Fire off the command */
292 	sd_ctrl_write32_as_16_and_16(host, CTL_ARG_REG, cmd->arg);
293 	sd_ctrl_write16(host, CTL_SD_CMD, c);
294 
295 	return 0;
296 }
297 
298 static void tmio_mmc_transfer_data(struct tmio_mmc_host *host,
299 				   unsigned short *buf,
300 				   unsigned int count)
301 {
302 	int is_read = host->data->flags & MMC_DATA_READ;
303 	u8  *buf8;
304 
305 	/*
306 	 * Transfer the data
307 	 */
308 	if (host->pdata->flags & TMIO_MMC_32BIT_DATA_PORT) {
309 		u32 data = 0;
310 		u32 *buf32 = (u32 *)buf;
311 
312 		if (is_read)
313 			sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT, buf32,
314 					   count >> 2);
315 		else
316 			sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT, buf32,
317 					    count >> 2);
318 
319 		/* if count was multiple of 4 */
320 		if (!(count & 0x3))
321 			return;
322 
323 		buf32 += count >> 2;
324 		count %= 4;
325 
326 		if (is_read) {
327 			sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT, &data, 1);
328 			memcpy(buf32, &data, count);
329 		} else {
330 			memcpy(&data, buf32, count);
331 			sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT, &data, 1);
332 		}
333 
334 		return;
335 	}
336 
337 	if (is_read)
338 		sd_ctrl_read16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
339 	else
340 		sd_ctrl_write16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
341 
342 	/* if count was even number */
343 	if (!(count & 0x1))
344 		return;
345 
346 	/* if count was odd number */
347 	buf8 = (u8 *)(buf + (count >> 1));
348 
349 	/*
350 	 * FIXME
351 	 *
352 	 * driver and this function are assuming that
353 	 * it is used as little endian
354 	 */
355 	if (is_read)
356 		*buf8 = sd_ctrl_read16(host, CTL_SD_DATA_PORT) & 0xff;
357 	else
358 		sd_ctrl_write16(host, CTL_SD_DATA_PORT, *buf8);
359 }
360 
361 /*
362  * This chip always returns (at least?) as much data as you ask for.
363  * I'm unsure what happens if you ask for less than a block. This should be
364  * looked into to ensure that a funny length read doesn't hose the controller.
365  */
366 static void tmio_mmc_pio_irq(struct tmio_mmc_host *host)
367 {
368 	struct mmc_data *data = host->data;
369 	void *sg_virt;
370 	unsigned short *buf;
371 	unsigned int count;
372 	unsigned long flags;
373 
374 	if (host->dma_on) {
375 		pr_err("PIO IRQ in DMA mode!\n");
376 		return;
377 	} else if (!data) {
378 		pr_debug("Spurious PIO IRQ\n");
379 		return;
380 	}
381 
382 	sg_virt = tmio_mmc_kmap_atomic(host->sg_ptr, &flags);
383 	buf = (unsigned short *)(sg_virt + host->sg_off);
384 
385 	count = host->sg_ptr->length - host->sg_off;
386 	if (count > data->blksz)
387 		count = data->blksz;
388 
389 	pr_debug("count: %08x offset: %08x flags %08x\n",
390 		 count, host->sg_off, data->flags);
391 
392 	/* Transfer the data */
393 	tmio_mmc_transfer_data(host, buf, count);
394 
395 	host->sg_off += count;
396 
397 	tmio_mmc_kunmap_atomic(host->sg_ptr, &flags, sg_virt);
398 
399 	if (host->sg_off == host->sg_ptr->length)
400 		tmio_mmc_next_sg(host);
401 }
402 
403 static void tmio_mmc_check_bounce_buffer(struct tmio_mmc_host *host)
404 {
405 	if (host->sg_ptr == &host->bounce_sg) {
406 		unsigned long flags;
407 		void *sg_vaddr = tmio_mmc_kmap_atomic(host->sg_orig, &flags);
408 
409 		memcpy(sg_vaddr, host->bounce_buf, host->bounce_sg.length);
410 		tmio_mmc_kunmap_atomic(host->sg_orig, &flags, sg_vaddr);
411 	}
412 }
413 
414 /* needs to be called with host->lock held */
415 void tmio_mmc_do_data_irq(struct tmio_mmc_host *host)
416 {
417 	struct mmc_data *data = host->data;
418 	struct mmc_command *stop;
419 
420 	host->data = NULL;
421 
422 	if (!data) {
423 		dev_warn(&host->pdev->dev, "Spurious data end IRQ\n");
424 		return;
425 	}
426 	stop = data->stop;
427 
428 	/* FIXME - return correct transfer count on errors */
429 	if (!data->error)
430 		data->bytes_xfered = data->blocks * data->blksz;
431 	else
432 		data->bytes_xfered = 0;
433 
434 	pr_debug("Completed data request\n");
435 
436 	/*
437 	 * FIXME: other drivers allow an optional stop command of any given type
438 	 *        which we dont do, as the chip can auto generate them.
439 	 *        Perhaps we can be smarter about when to use auto CMD12 and
440 	 *        only issue the auto request when we know this is the desired
441 	 *        stop command, allowing fallback to the stop command the
442 	 *        upper layers expect. For now, we do what works.
443 	 */
444 
445 	if (data->flags & MMC_DATA_READ) {
446 		if (host->dma_on)
447 			tmio_mmc_check_bounce_buffer(host);
448 		dev_dbg(&host->pdev->dev, "Complete Rx request %p\n",
449 			host->mrq);
450 	} else {
451 		dev_dbg(&host->pdev->dev, "Complete Tx request %p\n",
452 			host->mrq);
453 	}
454 
455 	if (stop && !host->mrq->sbc) {
456 		if (stop->opcode != MMC_STOP_TRANSMISSION || stop->arg)
457 			dev_err(&host->pdev->dev, "unsupported stop: CMD%u,0x%x. We did CMD12,0\n",
458 				stop->opcode, stop->arg);
459 
460 		/* fill in response from auto CMD12 */
461 		stop->resp[0] = sd_ctrl_read16_and_16_as_32(host, CTL_RESPONSE);
462 
463 		sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0);
464 	}
465 
466 	schedule_work(&host->done);
467 }
468 EXPORT_SYMBOL_GPL(tmio_mmc_do_data_irq);
469 
470 static void tmio_mmc_data_irq(struct tmio_mmc_host *host, unsigned int stat)
471 {
472 	struct mmc_data *data;
473 
474 	spin_lock(&host->lock);
475 	data = host->data;
476 
477 	if (!data)
478 		goto out;
479 
480 	if (stat & TMIO_STAT_DATATIMEOUT)
481 		data->error = -ETIMEDOUT;
482 	else if (stat & TMIO_STAT_CRCFAIL || stat & TMIO_STAT_STOPBIT_ERR ||
483 		 stat & TMIO_STAT_TXUNDERRUN)
484 		data->error = -EILSEQ;
485 	if (host->dma_on && (data->flags & MMC_DATA_WRITE)) {
486 		u32 status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS);
487 		bool done = false;
488 
489 		/*
490 		 * Has all data been written out yet? Testing on SuperH showed,
491 		 * that in most cases the first interrupt comes already with the
492 		 * BUSY status bit clear, but on some operations, like mount or
493 		 * in the beginning of a write / sync / umount, there is one
494 		 * DATAEND interrupt with the BUSY bit set, in this cases
495 		 * waiting for one more interrupt fixes the problem.
496 		 */
497 		if (host->pdata->flags & TMIO_MMC_HAS_IDLE_WAIT) {
498 			if (status & TMIO_STAT_SCLKDIVEN)
499 				done = true;
500 		} else {
501 			if (!(status & TMIO_STAT_CMD_BUSY))
502 				done = true;
503 		}
504 
505 		if (done) {
506 			tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
507 			tmio_mmc_dataend_dma(host);
508 		}
509 	} else if (host->dma_on && (data->flags & MMC_DATA_READ)) {
510 		tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
511 		tmio_mmc_dataend_dma(host);
512 	} else {
513 		tmio_mmc_do_data_irq(host);
514 		tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_READOP | TMIO_MASK_WRITEOP);
515 	}
516 out:
517 	spin_unlock(&host->lock);
518 }
519 
520 static void tmio_mmc_cmd_irq(struct tmio_mmc_host *host, unsigned int stat)
521 {
522 	struct mmc_command *cmd = host->cmd;
523 	int i, addr;
524 
525 	spin_lock(&host->lock);
526 
527 	if (!host->cmd) {
528 		pr_debug("Spurious CMD irq\n");
529 		goto out;
530 	}
531 
532 	/* This controller is sicker than the PXA one. Not only do we need to
533 	 * drop the top 8 bits of the first response word, we also need to
534 	 * modify the order of the response for short response command types.
535 	 */
536 
537 	for (i = 3, addr = CTL_RESPONSE ; i >= 0 ; i--, addr += 4)
538 		cmd->resp[i] = sd_ctrl_read16_and_16_as_32(host, addr);
539 
540 	if (cmd->flags &  MMC_RSP_136) {
541 		cmd->resp[0] = (cmd->resp[0] << 8) | (cmd->resp[1] >> 24);
542 		cmd->resp[1] = (cmd->resp[1] << 8) | (cmd->resp[2] >> 24);
543 		cmd->resp[2] = (cmd->resp[2] << 8) | (cmd->resp[3] >> 24);
544 		cmd->resp[3] <<= 8;
545 	} else if (cmd->flags & MMC_RSP_R3) {
546 		cmd->resp[0] = cmd->resp[3];
547 	}
548 
549 	if (stat & TMIO_STAT_CMDTIMEOUT)
550 		cmd->error = -ETIMEDOUT;
551 	else if ((stat & TMIO_STAT_CRCFAIL && cmd->flags & MMC_RSP_CRC) ||
552 		 stat & TMIO_STAT_STOPBIT_ERR ||
553 		 stat & TMIO_STAT_CMD_IDX_ERR)
554 		cmd->error = -EILSEQ;
555 
556 	/* If there is data to handle we enable data IRQs here, and
557 	 * we will ultimatley finish the request in the data_end handler.
558 	 * If theres no data or we encountered an error, finish now.
559 	 */
560 	if (host->data && (!cmd->error || cmd->error == -EILSEQ)) {
561 		if (host->data->flags & MMC_DATA_READ) {
562 			if (!host->dma_on) {
563 				tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_READOP);
564 			} else {
565 				tmio_mmc_disable_mmc_irqs(host,
566 							  TMIO_MASK_READOP);
567 				tasklet_schedule(&host->dma_issue);
568 			}
569 		} else {
570 			if (!host->dma_on) {
571 				tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_WRITEOP);
572 			} else {
573 				tmio_mmc_disable_mmc_irqs(host,
574 							  TMIO_MASK_WRITEOP);
575 				tasklet_schedule(&host->dma_issue);
576 			}
577 		}
578 	} else {
579 		schedule_work(&host->done);
580 	}
581 
582 out:
583 	spin_unlock(&host->lock);
584 }
585 
586 static bool __tmio_mmc_card_detect_irq(struct tmio_mmc_host *host,
587 				       int ireg, int status)
588 {
589 	struct mmc_host *mmc = host->mmc;
590 
591 	/* Card insert / remove attempts */
592 	if (ireg & (TMIO_STAT_CARD_INSERT | TMIO_STAT_CARD_REMOVE)) {
593 		tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CARD_INSERT |
594 			TMIO_STAT_CARD_REMOVE);
595 		if ((((ireg & TMIO_STAT_CARD_REMOVE) && mmc->card) ||
596 		     ((ireg & TMIO_STAT_CARD_INSERT) && !mmc->card)) &&
597 		    !work_pending(&mmc->detect.work))
598 			mmc_detect_change(host->mmc, msecs_to_jiffies(100));
599 		return true;
600 	}
601 
602 	return false;
603 }
604 
605 static bool __tmio_mmc_sdcard_irq(struct tmio_mmc_host *host, int ireg,
606 				  int status)
607 {
608 	/* Command completion */
609 	if (ireg & (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT)) {
610 		tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CMDRESPEND |
611 				      TMIO_STAT_CMDTIMEOUT);
612 		tmio_mmc_cmd_irq(host, status);
613 		return true;
614 	}
615 
616 	/* Data transfer */
617 	if (ireg & (TMIO_STAT_RXRDY | TMIO_STAT_TXRQ)) {
618 		tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_RXRDY | TMIO_STAT_TXRQ);
619 		tmio_mmc_pio_irq(host);
620 		return true;
621 	}
622 
623 	/* Data transfer completion */
624 	if (ireg & TMIO_STAT_DATAEND) {
625 		tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_DATAEND);
626 		tmio_mmc_data_irq(host, status);
627 		return true;
628 	}
629 
630 	return false;
631 }
632 
633 static bool __tmio_mmc_sdio_irq(struct tmio_mmc_host *host)
634 {
635 	struct mmc_host *mmc = host->mmc;
636 	struct tmio_mmc_data *pdata = host->pdata;
637 	unsigned int ireg, status;
638 	unsigned int sdio_status;
639 
640 	if (!(pdata->flags & TMIO_MMC_SDIO_IRQ))
641 		return false;
642 
643 	status = sd_ctrl_read16(host, CTL_SDIO_STATUS);
644 	ireg = status & TMIO_SDIO_MASK_ALL & ~host->sdio_irq_mask;
645 
646 	sdio_status = status & ~TMIO_SDIO_MASK_ALL;
647 	if (pdata->flags & TMIO_MMC_SDIO_STATUS_SETBITS)
648 		sdio_status |= TMIO_SDIO_SETBITS_MASK;
649 
650 	sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status);
651 
652 	if (mmc->caps & MMC_CAP_SDIO_IRQ && ireg & TMIO_SDIO_STAT_IOIRQ)
653 		mmc_signal_sdio_irq(mmc);
654 
655 	return ireg;
656 }
657 
658 irqreturn_t tmio_mmc_irq(int irq, void *devid)
659 {
660 	struct tmio_mmc_host *host = devid;
661 	unsigned int ireg, status;
662 
663 	status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS);
664 	ireg = status & TMIO_MASK_IRQ & ~host->sdcard_irq_mask;
665 
666 	/* Clear the status except the interrupt status */
667 	sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, TMIO_MASK_IRQ);
668 
669 	if (__tmio_mmc_card_detect_irq(host, ireg, status))
670 		return IRQ_HANDLED;
671 	if (__tmio_mmc_sdcard_irq(host, ireg, status))
672 		return IRQ_HANDLED;
673 
674 	if (__tmio_mmc_sdio_irq(host))
675 		return IRQ_HANDLED;
676 
677 	return IRQ_NONE;
678 }
679 EXPORT_SYMBOL_GPL(tmio_mmc_irq);
680 
681 static int tmio_mmc_start_data(struct tmio_mmc_host *host,
682 			       struct mmc_data *data)
683 {
684 	struct tmio_mmc_data *pdata = host->pdata;
685 
686 	pr_debug("setup data transfer: blocksize %08x  nr_blocks %d\n",
687 		 data->blksz, data->blocks);
688 
689 	/* Some hardware cannot perform 2 byte requests in 4/8 bit mode */
690 	if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_4 ||
691 	    host->mmc->ios.bus_width == MMC_BUS_WIDTH_8) {
692 		int blksz_2bytes = pdata->flags & TMIO_MMC_BLKSZ_2BYTES;
693 
694 		if (data->blksz < 2 || (data->blksz < 4 && !blksz_2bytes)) {
695 			pr_err("%s: %d byte block unsupported in 4/8 bit mode\n",
696 			       mmc_hostname(host->mmc), data->blksz);
697 			return -EINVAL;
698 		}
699 	}
700 
701 	tmio_mmc_init_sg(host, data);
702 	host->data = data;
703 	host->dma_on = false;
704 
705 	/* Set transfer length / blocksize */
706 	sd_ctrl_write16(host, CTL_SD_XFER_LEN, data->blksz);
707 	if (host->mmc->max_blk_count >= SZ_64K)
708 		sd_ctrl_write32(host, CTL_XFER_BLK_COUNT, data->blocks);
709 	else
710 		sd_ctrl_write16(host, CTL_XFER_BLK_COUNT, data->blocks);
711 
712 	tmio_mmc_start_dma(host, data);
713 
714 	return 0;
715 }
716 
717 static void tmio_process_mrq(struct tmio_mmc_host *host,
718 			     struct mmc_request *mrq)
719 {
720 	struct mmc_command *cmd;
721 	int ret;
722 
723 	if (mrq->sbc && host->cmd != mrq->sbc) {
724 		cmd = mrq->sbc;
725 	} else {
726 		cmd = mrq->cmd;
727 		if (mrq->data) {
728 			ret = tmio_mmc_start_data(host, mrq->data);
729 			if (ret)
730 				goto fail;
731 		}
732 	}
733 
734 	ret = tmio_mmc_start_command(host, cmd);
735 	if (ret)
736 		goto fail;
737 
738 	schedule_delayed_work(&host->delayed_reset_work,
739 			      msecs_to_jiffies(CMDREQ_TIMEOUT));
740 	return;
741 
742 fail:
743 	host->mrq = NULL;
744 	mrq->cmd->error = ret;
745 	mmc_request_done(host->mmc, mrq);
746 }
747 
748 /* Process requests from the MMC layer */
749 static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
750 {
751 	struct tmio_mmc_host *host = mmc_priv(mmc);
752 	unsigned long flags;
753 
754 	spin_lock_irqsave(&host->lock, flags);
755 
756 	if (host->mrq) {
757 		pr_debug("request not null\n");
758 		if (IS_ERR(host->mrq)) {
759 			spin_unlock_irqrestore(&host->lock, flags);
760 			mrq->cmd->error = -EAGAIN;
761 			mmc_request_done(mmc, mrq);
762 			return;
763 		}
764 	}
765 
766 	host->last_req_ts = jiffies;
767 	wmb();
768 	host->mrq = mrq;
769 
770 	spin_unlock_irqrestore(&host->lock, flags);
771 
772 	tmio_process_mrq(host, mrq);
773 }
774 
775 static void tmio_mmc_finish_request(struct tmio_mmc_host *host)
776 {
777 	struct mmc_request *mrq;
778 	unsigned long flags;
779 
780 	spin_lock_irqsave(&host->lock, flags);
781 
782 	tmio_mmc_end_dma(host);
783 
784 	mrq = host->mrq;
785 	if (IS_ERR_OR_NULL(mrq)) {
786 		spin_unlock_irqrestore(&host->lock, flags);
787 		return;
788 	}
789 
790 	/* If not SET_BLOCK_COUNT, clear old data */
791 	if (host->cmd != mrq->sbc) {
792 		host->cmd = NULL;
793 		host->data = NULL;
794 		host->mrq = NULL;
795 	}
796 
797 	cancel_delayed_work(&host->delayed_reset_work);
798 
799 	spin_unlock_irqrestore(&host->lock, flags);
800 
801 	if (mrq->cmd->error || (mrq->data && mrq->data->error)) {
802 		tmio_mmc_ack_mmc_irqs(host, TMIO_MASK_IRQ); /* Clear all */
803 		tmio_mmc_abort_dma(host);
804 	}
805 
806 	/* Error means retune, but executed command was still successful */
807 	if (host->check_retune && host->check_retune(host, mrq))
808 		mmc_retune_needed(host->mmc);
809 
810 	/* If SET_BLOCK_COUNT, continue with main command */
811 	if (host->mrq && !mrq->cmd->error) {
812 		tmio_process_mrq(host, mrq);
813 		return;
814 	}
815 
816 	if (host->fixup_request)
817 		host->fixup_request(host, mrq);
818 
819 	mmc_request_done(host->mmc, mrq);
820 }
821 
822 static void tmio_mmc_done_work(struct work_struct *work)
823 {
824 	struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
825 						  done);
826 	tmio_mmc_finish_request(host);
827 }
828 
829 static void tmio_mmc_power_on(struct tmio_mmc_host *host, unsigned short vdd)
830 {
831 	struct mmc_host *mmc = host->mmc;
832 	int ret = 0;
833 
834 	/* .set_ios() is returning void, so, no chance to report an error */
835 
836 	if (host->set_pwr)
837 		host->set_pwr(host->pdev, 1);
838 
839 	if (!IS_ERR(mmc->supply.vmmc)) {
840 		ret = mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, vdd);
841 		/*
842 		 * Attention: empiric value. With a b43 WiFi SDIO card this
843 		 * delay proved necessary for reliable card-insertion probing.
844 		 * 100us were not enough. Is this the same 140us delay, as in
845 		 * tmio_mmc_set_ios()?
846 		 */
847 		usleep_range(200, 300);
848 	}
849 	/*
850 	 * It seems, VccQ should be switched on after Vcc, this is also what the
851 	 * omap_hsmmc.c driver does.
852 	 */
853 	if (!IS_ERR(mmc->supply.vqmmc) && !ret) {
854 		ret = regulator_enable(mmc->supply.vqmmc);
855 		usleep_range(200, 300);
856 	}
857 
858 	if (ret < 0)
859 		dev_dbg(&host->pdev->dev, "Regulators failed to power up: %d\n",
860 			ret);
861 }
862 
863 static void tmio_mmc_power_off(struct tmio_mmc_host *host)
864 {
865 	struct mmc_host *mmc = host->mmc;
866 
867 	if (!IS_ERR(mmc->supply.vqmmc))
868 		regulator_disable(mmc->supply.vqmmc);
869 
870 	if (!IS_ERR(mmc->supply.vmmc))
871 		mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0);
872 
873 	if (host->set_pwr)
874 		host->set_pwr(host->pdev, 0);
875 }
876 
877 static void tmio_mmc_set_bus_width(struct tmio_mmc_host *host,
878 				   unsigned char bus_width)
879 {
880 	u16 reg = sd_ctrl_read16(host, CTL_SD_MEM_CARD_OPT)
881 				& ~(CARD_OPT_WIDTH | CARD_OPT_WIDTH8);
882 
883 	/* reg now applies to MMC_BUS_WIDTH_4 */
884 	if (bus_width == MMC_BUS_WIDTH_1)
885 		reg |= CARD_OPT_WIDTH;
886 	else if (bus_width == MMC_BUS_WIDTH_8)
887 		reg |= CARD_OPT_WIDTH8;
888 
889 	sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, reg);
890 }
891 
892 static unsigned int tmio_mmc_get_timeout_cycles(struct tmio_mmc_host *host)
893 {
894 	u16 val = sd_ctrl_read16(host, CTL_SD_MEM_CARD_OPT);
895 
896 	val = (val & CARD_OPT_TOP_MASK) >> CARD_OPT_TOP_SHIFT;
897 	return 1 << (13 + val);
898 }
899 
900 static void tmio_mmc_max_busy_timeout(struct tmio_mmc_host *host)
901 {
902 	unsigned int clk_rate = host->mmc->actual_clock ?: host->mmc->f_max;
903 
904 	host->mmc->max_busy_timeout = host->get_timeout_cycles(host) /
905 				      (clk_rate / MSEC_PER_SEC);
906 }
907 
908 /* Set MMC clock / power.
909  * Note: This controller uses a simple divider scheme therefore it cannot
910  * run a MMC card at full speed (20MHz). The max clock is 24MHz on SD, but as
911  * MMC wont run that fast, it has to be clocked at 12MHz which is the next
912  * slowest setting.
913  */
914 static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
915 {
916 	struct tmio_mmc_host *host = mmc_priv(mmc);
917 	struct device *dev = &host->pdev->dev;
918 	unsigned long flags;
919 
920 	mutex_lock(&host->ios_lock);
921 
922 	spin_lock_irqsave(&host->lock, flags);
923 	if (host->mrq) {
924 		if (IS_ERR(host->mrq)) {
925 			dev_dbg(dev,
926 				"%s.%d: concurrent .set_ios(), clk %u, mode %u\n",
927 				current->comm, task_pid_nr(current),
928 				ios->clock, ios->power_mode);
929 			host->mrq = ERR_PTR(-EINTR);
930 		} else {
931 			dev_dbg(dev,
932 				"%s.%d: CMD%u active since %lu, now %lu!\n",
933 				current->comm, task_pid_nr(current),
934 				host->mrq->cmd->opcode, host->last_req_ts,
935 				jiffies);
936 		}
937 		spin_unlock_irqrestore(&host->lock, flags);
938 
939 		mutex_unlock(&host->ios_lock);
940 		return;
941 	}
942 
943 	host->mrq = ERR_PTR(-EBUSY);
944 
945 	spin_unlock_irqrestore(&host->lock, flags);
946 
947 	switch (ios->power_mode) {
948 	case MMC_POWER_OFF:
949 		tmio_mmc_power_off(host);
950 		/* For R-Car Gen2+, we need to reset SDHI specific SCC */
951 		if (host->pdata->flags & TMIO_MMC_MIN_RCAR2)
952 			host->reset(host);
953 		host->set_clock(host, 0);
954 		break;
955 	case MMC_POWER_UP:
956 		tmio_mmc_power_on(host, ios->vdd);
957 		host->set_clock(host, ios->clock);
958 		tmio_mmc_set_bus_width(host, ios->bus_width);
959 		break;
960 	case MMC_POWER_ON:
961 		host->set_clock(host, ios->clock);
962 		tmio_mmc_set_bus_width(host, ios->bus_width);
963 		break;
964 	}
965 
966 	if (host->pdata->flags & TMIO_MMC_USE_BUSY_TIMEOUT)
967 		tmio_mmc_max_busy_timeout(host);
968 
969 	/* Let things settle. delay taken from winCE driver */
970 	usleep_range(140, 200);
971 	if (PTR_ERR(host->mrq) == -EINTR)
972 		dev_dbg(&host->pdev->dev,
973 			"%s.%d: IOS interrupted: clk %u, mode %u",
974 			current->comm, task_pid_nr(current),
975 			ios->clock, ios->power_mode);
976 	host->mrq = NULL;
977 
978 	host->clk_cache = ios->clock;
979 
980 	mutex_unlock(&host->ios_lock);
981 }
982 
983 static int tmio_mmc_get_ro(struct mmc_host *mmc)
984 {
985 	struct tmio_mmc_host *host = mmc_priv(mmc);
986 
987 	return !(sd_ctrl_read16_and_16_as_32(host, CTL_STATUS) &
988 		 TMIO_STAT_WRPROTECT);
989 }
990 
991 static int tmio_mmc_get_cd(struct mmc_host *mmc)
992 {
993 	struct tmio_mmc_host *host = mmc_priv(mmc);
994 
995 	return !!(sd_ctrl_read16_and_16_as_32(host, CTL_STATUS) &
996 		  TMIO_STAT_SIGSTATE);
997 }
998 
999 static int tmio_multi_io_quirk(struct mmc_card *card,
1000 			       unsigned int direction, int blk_size)
1001 {
1002 	struct tmio_mmc_host *host = mmc_priv(card->host);
1003 
1004 	if (host->multi_io_quirk)
1005 		return host->multi_io_quirk(card, direction, blk_size);
1006 
1007 	return blk_size;
1008 }
1009 
1010 static struct mmc_host_ops tmio_mmc_ops = {
1011 	.request	= tmio_mmc_request,
1012 	.set_ios	= tmio_mmc_set_ios,
1013 	.get_ro         = tmio_mmc_get_ro,
1014 	.get_cd		= tmio_mmc_get_cd,
1015 	.enable_sdio_irq = tmio_mmc_enable_sdio_irq,
1016 	.multi_io_quirk	= tmio_multi_io_quirk,
1017 };
1018 
1019 static int tmio_mmc_init_ocr(struct tmio_mmc_host *host)
1020 {
1021 	struct tmio_mmc_data *pdata = host->pdata;
1022 	struct mmc_host *mmc = host->mmc;
1023 	int err;
1024 
1025 	err = mmc_regulator_get_supply(mmc);
1026 	if (err)
1027 		return err;
1028 
1029 	/* use ocr_mask if no regulator */
1030 	if (!mmc->ocr_avail)
1031 		mmc->ocr_avail = pdata->ocr_mask;
1032 
1033 	/*
1034 	 * try again.
1035 	 * There is possibility that regulator has not been probed
1036 	 */
1037 	if (!mmc->ocr_avail)
1038 		return -EPROBE_DEFER;
1039 
1040 	return 0;
1041 }
1042 
1043 static void tmio_mmc_of_parse(struct platform_device *pdev,
1044 			      struct mmc_host *mmc)
1045 {
1046 	const struct device_node *np = pdev->dev.of_node;
1047 
1048 	if (!np)
1049 		return;
1050 
1051 	/*
1052 	 * DEPRECATED:
1053 	 * For new platforms, please use "disable-wp" instead of
1054 	 * "toshiba,mmc-wrprotect-disable"
1055 	 */
1056 	if (of_get_property(np, "toshiba,mmc-wrprotect-disable", NULL))
1057 		mmc->caps2 |= MMC_CAP2_NO_WRITE_PROTECT;
1058 }
1059 
1060 struct tmio_mmc_host *tmio_mmc_host_alloc(struct platform_device *pdev,
1061 					  struct tmio_mmc_data *pdata)
1062 {
1063 	struct tmio_mmc_host *host;
1064 	struct mmc_host *mmc;
1065 	void __iomem *ctl;
1066 	int ret;
1067 
1068 	ctl = devm_platform_ioremap_resource(pdev, 0);
1069 	if (IS_ERR(ctl))
1070 		return ERR_CAST(ctl);
1071 
1072 	mmc = mmc_alloc_host(sizeof(struct tmio_mmc_host), &pdev->dev);
1073 	if (!mmc)
1074 		return ERR_PTR(-ENOMEM);
1075 
1076 	host = mmc_priv(mmc);
1077 	host->ctl = ctl;
1078 	host->mmc = mmc;
1079 	host->pdev = pdev;
1080 	host->pdata = pdata;
1081 	host->ops = tmio_mmc_ops;
1082 	mmc->ops = &host->ops;
1083 
1084 	ret = mmc_of_parse(host->mmc);
1085 	if (ret) {
1086 		host = ERR_PTR(ret);
1087 		goto free;
1088 	}
1089 
1090 	tmio_mmc_of_parse(pdev, mmc);
1091 
1092 	platform_set_drvdata(pdev, host);
1093 
1094 	return host;
1095 free:
1096 	mmc_free_host(mmc);
1097 
1098 	return host;
1099 }
1100 EXPORT_SYMBOL_GPL(tmio_mmc_host_alloc);
1101 
1102 void tmio_mmc_host_free(struct tmio_mmc_host *host)
1103 {
1104 	mmc_free_host(host->mmc);
1105 }
1106 EXPORT_SYMBOL_GPL(tmio_mmc_host_free);
1107 
1108 int tmio_mmc_host_probe(struct tmio_mmc_host *_host)
1109 {
1110 	struct platform_device *pdev = _host->pdev;
1111 	struct tmio_mmc_data *pdata = _host->pdata;
1112 	struct mmc_host *mmc = _host->mmc;
1113 	int ret;
1114 
1115 	/*
1116 	 * Check the sanity of mmc->f_min to prevent host->set_clock() from
1117 	 * looping forever...
1118 	 */
1119 	if (mmc->f_min == 0)
1120 		return -EINVAL;
1121 
1122 	if (!(pdata->flags & TMIO_MMC_HAS_IDLE_WAIT))
1123 		_host->write16_hook = NULL;
1124 
1125 	if (pdata->flags & TMIO_MMC_USE_BUSY_TIMEOUT && !_host->get_timeout_cycles)
1126 		_host->get_timeout_cycles = tmio_mmc_get_timeout_cycles;
1127 
1128 	_host->set_pwr = pdata->set_pwr;
1129 
1130 	ret = tmio_mmc_init_ocr(_host);
1131 	if (ret < 0)
1132 		return ret;
1133 
1134 	/*
1135 	 * Look for a card detect GPIO, if it fails with anything
1136 	 * else than a probe deferral, just live without it.
1137 	 */
1138 	ret = mmc_gpiod_request_cd(mmc, "cd", 0, false, 0);
1139 	if (ret == -EPROBE_DEFER)
1140 		return ret;
1141 
1142 	mmc->caps |= MMC_CAP_4_BIT_DATA | pdata->capabilities;
1143 	mmc->caps2 |= pdata->capabilities2;
1144 	mmc->max_segs = pdata->max_segs ? : 32;
1145 	mmc->max_blk_size = TMIO_MAX_BLK_SIZE;
1146 	mmc->max_blk_count = pdata->max_blk_count ? :
1147 		(PAGE_SIZE / mmc->max_blk_size) * mmc->max_segs;
1148 	mmc->max_req_size = min_t(size_t,
1149 				  mmc->max_blk_size * mmc->max_blk_count,
1150 				  dma_max_mapping_size(&pdev->dev));
1151 	mmc->max_seg_size = mmc->max_req_size;
1152 
1153 	if (mmc_can_gpio_ro(mmc))
1154 		_host->ops.get_ro = mmc_gpio_get_ro;
1155 
1156 	if (mmc_can_gpio_cd(mmc))
1157 		_host->ops.get_cd = mmc_gpio_get_cd;
1158 
1159 	_host->native_hotplug = !(mmc_can_gpio_cd(mmc) ||
1160 				  mmc->caps & MMC_CAP_NEEDS_POLL ||
1161 				  !mmc_card_is_removable(mmc));
1162 
1163 	/*
1164 	 * On Gen2+, eMMC with NONREMOVABLE currently fails because native
1165 	 * hotplug gets disabled. It seems RuntimePM related yet we need further
1166 	 * research. Since we are planning a PM overhaul anyway, let's enforce
1167 	 * for now the device being active by enabling native hotplug always.
1168 	 */
1169 	if (pdata->flags & TMIO_MMC_MIN_RCAR2)
1170 		_host->native_hotplug = true;
1171 
1172 	/*
1173 	 * While using internal tmio hardware logic for card detection, we need
1174 	 * to ensure it stays powered for it to work.
1175 	 */
1176 	if (_host->native_hotplug)
1177 		pm_runtime_get_noresume(&pdev->dev);
1178 
1179 	_host->sdio_irq_enabled = false;
1180 	if (pdata->flags & TMIO_MMC_SDIO_IRQ)
1181 		_host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
1182 
1183 	_host->set_clock(_host, 0);
1184 	tmio_mmc_reset(_host);
1185 
1186 	_host->sdcard_irq_mask = sd_ctrl_read16_and_16_as_32(_host, CTL_IRQ_MASK);
1187 	tmio_mmc_disable_mmc_irqs(_host, TMIO_MASK_ALL);
1188 
1189 	if (_host->native_hotplug)
1190 		tmio_mmc_enable_mmc_irqs(_host,
1191 				TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT);
1192 
1193 	spin_lock_init(&_host->lock);
1194 	mutex_init(&_host->ios_lock);
1195 
1196 	/* Init delayed work for request timeouts */
1197 	INIT_DELAYED_WORK(&_host->delayed_reset_work, tmio_mmc_reset_work);
1198 	INIT_WORK(&_host->done, tmio_mmc_done_work);
1199 
1200 	/* See if we also get DMA */
1201 	tmio_mmc_request_dma(_host, pdata);
1202 
1203 	pm_runtime_get_noresume(&pdev->dev);
1204 	pm_runtime_set_active(&pdev->dev);
1205 	pm_runtime_set_autosuspend_delay(&pdev->dev, 50);
1206 	pm_runtime_use_autosuspend(&pdev->dev);
1207 	pm_runtime_enable(&pdev->dev);
1208 
1209 	ret = mmc_add_host(mmc);
1210 	if (ret)
1211 		goto remove_host;
1212 
1213 	dev_pm_qos_expose_latency_limit(&pdev->dev, 100);
1214 	pm_runtime_put(&pdev->dev);
1215 
1216 	return 0;
1217 
1218 remove_host:
1219 	pm_runtime_put_noidle(&pdev->dev);
1220 	tmio_mmc_host_remove(_host);
1221 	return ret;
1222 }
1223 EXPORT_SYMBOL_GPL(tmio_mmc_host_probe);
1224 
1225 void tmio_mmc_host_remove(struct tmio_mmc_host *host)
1226 {
1227 	struct platform_device *pdev = host->pdev;
1228 	struct mmc_host *mmc = host->mmc;
1229 
1230 	pm_runtime_get_sync(&pdev->dev);
1231 
1232 	if (host->pdata->flags & TMIO_MMC_SDIO_IRQ)
1233 		sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0000);
1234 
1235 	dev_pm_qos_hide_latency_limit(&pdev->dev);
1236 
1237 	mmc_remove_host(mmc);
1238 	cancel_work_sync(&host->done);
1239 	cancel_delayed_work_sync(&host->delayed_reset_work);
1240 	tmio_mmc_release_dma(host);
1241 	tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_ALL);
1242 
1243 	if (host->native_hotplug)
1244 		pm_runtime_put_noidle(&pdev->dev);
1245 
1246 	pm_runtime_disable(&pdev->dev);
1247 	pm_runtime_dont_use_autosuspend(&pdev->dev);
1248 	pm_runtime_put_noidle(&pdev->dev);
1249 }
1250 EXPORT_SYMBOL_GPL(tmio_mmc_host_remove);
1251 
1252 #ifdef CONFIG_PM
1253 static int tmio_mmc_clk_enable(struct tmio_mmc_host *host)
1254 {
1255 	if (!host->clk_enable)
1256 		return -ENOTSUPP;
1257 
1258 	return host->clk_enable(host);
1259 }
1260 
1261 static void tmio_mmc_clk_disable(struct tmio_mmc_host *host)
1262 {
1263 	if (host->clk_disable)
1264 		host->clk_disable(host);
1265 }
1266 
1267 int tmio_mmc_host_runtime_suspend(struct device *dev)
1268 {
1269 	struct tmio_mmc_host *host = dev_get_drvdata(dev);
1270 
1271 	tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_ALL);
1272 
1273 	if (host->clk_cache)
1274 		host->set_clock(host, 0);
1275 
1276 	tmio_mmc_clk_disable(host);
1277 
1278 	return 0;
1279 }
1280 EXPORT_SYMBOL_GPL(tmio_mmc_host_runtime_suspend);
1281 
1282 int tmio_mmc_host_runtime_resume(struct device *dev)
1283 {
1284 	struct tmio_mmc_host *host = dev_get_drvdata(dev);
1285 
1286 	tmio_mmc_clk_enable(host);
1287 	tmio_mmc_reset(host);
1288 
1289 	if (host->clk_cache)
1290 		host->set_clock(host, host->clk_cache);
1291 
1292 	if (host->native_hotplug)
1293 		tmio_mmc_enable_mmc_irqs(host,
1294 				TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT);
1295 
1296 	tmio_mmc_enable_dma(host, true);
1297 
1298 	mmc_retune_needed(host->mmc);
1299 
1300 	return 0;
1301 }
1302 EXPORT_SYMBOL_GPL(tmio_mmc_host_runtime_resume);
1303 #endif
1304 
1305 MODULE_LICENSE("GPL v2");
1306