1 /* 2 * Driver for the MMC / SD / SDIO IP found in: 3 * 4 * TC6393XB, TC6391XB, TC6387XB, T7L66XB, ASIC3, SH-Mobile SoCs 5 * 6 * Copyright (C) 2015-17 Renesas Electronics Corporation 7 * Copyright (C) 2016-17 Sang Engineering, Wolfram Sang 8 * Copyright (C) 2017 Horms Solutions, Simon Horman 9 * Copyright (C) 2011 Guennadi Liakhovetski 10 * Copyright (C) 2007 Ian Molton 11 * Copyright (C) 2004 Ian Molton 12 * 13 * This program is free software; you can redistribute it and/or modify 14 * it under the terms of the GNU General Public License version 2 as 15 * published by the Free Software Foundation. 16 * 17 * This driver draws mainly on scattered spec sheets, Reverse engineering 18 * of the toshiba e800 SD driver and some parts of the 2.4 ASIC3 driver (4 bit 19 * support). (Further 4 bit support from a later datasheet). 20 * 21 * TODO: 22 * Investigate using a workqueue for PIO transfers 23 * Eliminate FIXMEs 24 * Better Power management 25 * Handle MMC errors better 26 * double buffer support 27 * 28 */ 29 30 #include <linux/delay.h> 31 #include <linux/device.h> 32 #include <linux/highmem.h> 33 #include <linux/interrupt.h> 34 #include <linux/io.h> 35 #include <linux/irq.h> 36 #include <linux/mfd/tmio.h> 37 #include <linux/mmc/card.h> 38 #include <linux/mmc/host.h> 39 #include <linux/mmc/mmc.h> 40 #include <linux/mmc/slot-gpio.h> 41 #include <linux/module.h> 42 #include <linux/pagemap.h> 43 #include <linux/platform_device.h> 44 #include <linux/pm_qos.h> 45 #include <linux/pm_runtime.h> 46 #include <linux/regulator/consumer.h> 47 #include <linux/mmc/sdio.h> 48 #include <linux/scatterlist.h> 49 #include <linux/spinlock.h> 50 #include <linux/swiotlb.h> 51 #include <linux/workqueue.h> 52 53 #include "tmio_mmc.h" 54 55 static inline void tmio_mmc_start_dma(struct tmio_mmc_host *host, 56 struct mmc_data *data) 57 { 58 if (host->dma_ops) 59 host->dma_ops->start(host, data); 60 } 61 62 static inline void tmio_mmc_enable_dma(struct tmio_mmc_host *host, bool enable) 63 { 64 if (host->dma_ops) 65 host->dma_ops->enable(host, enable); 66 } 67 68 static inline void tmio_mmc_request_dma(struct tmio_mmc_host *host, 69 struct tmio_mmc_data *pdata) 70 { 71 if (host->dma_ops) { 72 host->dma_ops->request(host, pdata); 73 } else { 74 host->chan_tx = NULL; 75 host->chan_rx = NULL; 76 } 77 } 78 79 static inline void tmio_mmc_release_dma(struct tmio_mmc_host *host) 80 { 81 if (host->dma_ops) 82 host->dma_ops->release(host); 83 } 84 85 static inline void tmio_mmc_abort_dma(struct tmio_mmc_host *host) 86 { 87 if (host->dma_ops) 88 host->dma_ops->abort(host); 89 } 90 91 static inline void tmio_mmc_dataend_dma(struct tmio_mmc_host *host) 92 { 93 if (host->dma_ops) 94 host->dma_ops->dataend(host); 95 } 96 97 void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i) 98 { 99 host->sdcard_irq_mask &= ~(i & TMIO_MASK_IRQ); 100 sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask); 101 } 102 EXPORT_SYMBOL_GPL(tmio_mmc_enable_mmc_irqs); 103 104 void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i) 105 { 106 host->sdcard_irq_mask |= (i & TMIO_MASK_IRQ); 107 sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask); 108 } 109 EXPORT_SYMBOL_GPL(tmio_mmc_disable_mmc_irqs); 110 111 static void tmio_mmc_ack_mmc_irqs(struct tmio_mmc_host *host, u32 i) 112 { 113 sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, ~i); 114 } 115 116 static void tmio_mmc_init_sg(struct tmio_mmc_host *host, struct mmc_data *data) 117 { 118 host->sg_len = data->sg_len; 119 host->sg_ptr = data->sg; 120 host->sg_orig = data->sg; 121 host->sg_off = 0; 122 } 123 124 static int tmio_mmc_next_sg(struct tmio_mmc_host *host) 125 { 126 host->sg_ptr = sg_next(host->sg_ptr); 127 host->sg_off = 0; 128 return --host->sg_len; 129 } 130 131 #define CMDREQ_TIMEOUT 5000 132 133 static void tmio_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable) 134 { 135 struct tmio_mmc_host *host = mmc_priv(mmc); 136 137 if (enable && !host->sdio_irq_enabled) { 138 u16 sdio_status; 139 140 /* Keep device active while SDIO irq is enabled */ 141 pm_runtime_get_sync(mmc_dev(mmc)); 142 143 host->sdio_irq_enabled = true; 144 host->sdio_irq_mask = TMIO_SDIO_MASK_ALL & ~TMIO_SDIO_STAT_IOIRQ; 145 146 /* Clear obsolete interrupts before enabling */ 147 sdio_status = sd_ctrl_read16(host, CTL_SDIO_STATUS) & ~TMIO_SDIO_MASK_ALL; 148 if (host->pdata->flags & TMIO_MMC_SDIO_STATUS_SETBITS) 149 sdio_status |= TMIO_SDIO_SETBITS_MASK; 150 sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status); 151 152 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask); 153 } else if (!enable && host->sdio_irq_enabled) { 154 host->sdio_irq_mask = TMIO_SDIO_MASK_ALL; 155 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask); 156 157 host->sdio_irq_enabled = false; 158 pm_runtime_mark_last_busy(mmc_dev(mmc)); 159 pm_runtime_put_autosuspend(mmc_dev(mmc)); 160 } 161 } 162 163 static void tmio_mmc_clk_start(struct tmio_mmc_host *host) 164 { 165 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, CLK_CTL_SCLKEN | 166 sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL)); 167 168 /* HW engineers overrode docs: no sleep needed on R-Car2+ */ 169 if (!(host->pdata->flags & TMIO_MMC_MIN_RCAR2)) 170 usleep_range(10000, 11000); 171 172 if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG) { 173 sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0100); 174 usleep_range(10000, 11000); 175 } 176 } 177 178 static void tmio_mmc_clk_stop(struct tmio_mmc_host *host) 179 { 180 if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG) { 181 sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0000); 182 usleep_range(10000, 11000); 183 } 184 185 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, ~CLK_CTL_SCLKEN & 186 sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL)); 187 188 /* HW engineers overrode docs: no sleep needed on R-Car2+ */ 189 if (!(host->pdata->flags & TMIO_MMC_MIN_RCAR2)) 190 usleep_range(10000, 11000); 191 } 192 193 static void tmio_mmc_set_clock(struct tmio_mmc_host *host, 194 unsigned int new_clock) 195 { 196 u32 clk = 0, clock; 197 198 if (new_clock == 0) { 199 tmio_mmc_clk_stop(host); 200 return; 201 } 202 /* 203 * Both HS400 and HS200/SD104 set 200MHz, but some devices need to 204 * set 400MHz to distinguish the CPG settings in HS400. 205 */ 206 if (host->mmc->ios.timing == MMC_TIMING_MMC_HS400 && 207 host->pdata->flags & TMIO_MMC_HAVE_4TAP_HS400 && 208 new_clock == 200000000) 209 new_clock = 400000000; 210 211 if (host->clk_update) 212 clock = host->clk_update(host, new_clock) / 512; 213 else 214 clock = host->mmc->f_min; 215 216 for (clk = 0x80000080; new_clock >= (clock << 1); clk >>= 1) 217 clock <<= 1; 218 219 /* 1/1 clock is option */ 220 if ((host->pdata->flags & TMIO_MMC_CLK_ACTUAL) && 221 ((clk >> 22) & 0x1)) { 222 if (!(host->mmc->ios.timing == MMC_TIMING_MMC_HS400)) 223 clk |= 0xff; 224 else 225 clk &= ~0xff; 226 } 227 228 if (host->set_clk_div) 229 host->set_clk_div(host->pdev, (clk >> 22) & 1); 230 231 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, ~CLK_CTL_SCLKEN & 232 sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL)); 233 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, clk & CLK_CTL_DIV_MASK); 234 if (!(host->pdata->flags & TMIO_MMC_MIN_RCAR2)) 235 usleep_range(10000, 11000); 236 237 tmio_mmc_clk_start(host); 238 } 239 240 static void tmio_mmc_reset(struct tmio_mmc_host *host) 241 { 242 /* FIXME - should we set stop clock reg here */ 243 sd_ctrl_write16(host, CTL_RESET_SD, 0x0000); 244 if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG) 245 sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0000); 246 usleep_range(10000, 11000); 247 sd_ctrl_write16(host, CTL_RESET_SD, 0x0001); 248 if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG) 249 sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0001); 250 usleep_range(10000, 11000); 251 252 if (host->pdata->flags & TMIO_MMC_SDIO_IRQ) { 253 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask); 254 sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0001); 255 } 256 257 } 258 259 static void tmio_mmc_reset_work(struct work_struct *work) 260 { 261 struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host, 262 delayed_reset_work.work); 263 struct mmc_request *mrq; 264 unsigned long flags; 265 266 spin_lock_irqsave(&host->lock, flags); 267 mrq = host->mrq; 268 269 /* 270 * is request already finished? Since we use a non-blocking 271 * cancel_delayed_work(), it can happen, that a .set_ios() call preempts 272 * us, so, have to check for IS_ERR(host->mrq) 273 */ 274 if (IS_ERR_OR_NULL(mrq) || 275 time_is_after_jiffies(host->last_req_ts + 276 msecs_to_jiffies(CMDREQ_TIMEOUT))) { 277 spin_unlock_irqrestore(&host->lock, flags); 278 return; 279 } 280 281 dev_warn(&host->pdev->dev, 282 "timeout waiting for hardware interrupt (CMD%u)\n", 283 mrq->cmd->opcode); 284 285 if (host->data) 286 host->data->error = -ETIMEDOUT; 287 else if (host->cmd) 288 host->cmd->error = -ETIMEDOUT; 289 else 290 mrq->cmd->error = -ETIMEDOUT; 291 292 host->cmd = NULL; 293 host->data = NULL; 294 295 spin_unlock_irqrestore(&host->lock, flags); 296 297 tmio_mmc_reset(host); 298 299 /* Ready for new calls */ 300 host->mrq = NULL; 301 302 tmio_mmc_abort_dma(host); 303 mmc_request_done(host->mmc, mrq); 304 } 305 306 /* These are the bitmasks the tmio chip requires to implement the MMC response 307 * types. Note that R1 and R6 are the same in this scheme. */ 308 #define APP_CMD 0x0040 309 #define RESP_NONE 0x0300 310 #define RESP_R1 0x0400 311 #define RESP_R1B 0x0500 312 #define RESP_R2 0x0600 313 #define RESP_R3 0x0700 314 #define DATA_PRESENT 0x0800 315 #define TRANSFER_READ 0x1000 316 #define TRANSFER_MULTI 0x2000 317 #define SECURITY_CMD 0x4000 318 #define NO_CMD12_ISSUE 0x4000 /* TMIO_MMC_HAVE_CMD12_CTRL */ 319 320 static int tmio_mmc_start_command(struct tmio_mmc_host *host, 321 struct mmc_command *cmd) 322 { 323 struct mmc_data *data = host->data; 324 int c = cmd->opcode; 325 326 switch (mmc_resp_type(cmd)) { 327 case MMC_RSP_NONE: c |= RESP_NONE; break; 328 case MMC_RSP_R1: 329 case MMC_RSP_R1_NO_CRC: 330 c |= RESP_R1; break; 331 case MMC_RSP_R1B: c |= RESP_R1B; break; 332 case MMC_RSP_R2: c |= RESP_R2; break; 333 case MMC_RSP_R3: c |= RESP_R3; break; 334 default: 335 pr_debug("Unknown response type %d\n", mmc_resp_type(cmd)); 336 return -EINVAL; 337 } 338 339 host->cmd = cmd; 340 341 /* FIXME - this seems to be ok commented out but the spec suggest this bit 342 * should be set when issuing app commands. 343 * if(cmd->flags & MMC_FLAG_ACMD) 344 * c |= APP_CMD; 345 */ 346 if (data) { 347 c |= DATA_PRESENT; 348 if (data->blocks > 1) { 349 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, TMIO_STOP_SEC); 350 c |= TRANSFER_MULTI; 351 352 /* 353 * Disable auto CMD12 at IO_RW_EXTENDED and 354 * SET_BLOCK_COUNT when doing multiple block transfer 355 */ 356 if ((host->pdata->flags & TMIO_MMC_HAVE_CMD12_CTRL) && 357 (cmd->opcode == SD_IO_RW_EXTENDED || host->mrq->sbc)) 358 c |= NO_CMD12_ISSUE; 359 } 360 if (data->flags & MMC_DATA_READ) 361 c |= TRANSFER_READ; 362 } 363 364 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_CMD); 365 366 /* Fire off the command */ 367 sd_ctrl_write32_as_16_and_16(host, CTL_ARG_REG, cmd->arg); 368 sd_ctrl_write16(host, CTL_SD_CMD, c); 369 370 return 0; 371 } 372 373 static void tmio_mmc_transfer_data(struct tmio_mmc_host *host, 374 unsigned short *buf, 375 unsigned int count) 376 { 377 int is_read = host->data->flags & MMC_DATA_READ; 378 u8 *buf8; 379 380 /* 381 * Transfer the data 382 */ 383 if (host->pdata->flags & TMIO_MMC_32BIT_DATA_PORT) { 384 u32 data = 0; 385 u32 *buf32 = (u32 *)buf; 386 387 if (is_read) 388 sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT, buf32, 389 count >> 2); 390 else 391 sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT, buf32, 392 count >> 2); 393 394 /* if count was multiple of 4 */ 395 if (!(count & 0x3)) 396 return; 397 398 buf32 += count >> 2; 399 count %= 4; 400 401 if (is_read) { 402 sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT, &data, 1); 403 memcpy(buf32, &data, count); 404 } else { 405 memcpy(&data, buf32, count); 406 sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT, &data, 1); 407 } 408 409 return; 410 } 411 412 if (is_read) 413 sd_ctrl_read16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1); 414 else 415 sd_ctrl_write16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1); 416 417 /* if count was even number */ 418 if (!(count & 0x1)) 419 return; 420 421 /* if count was odd number */ 422 buf8 = (u8 *)(buf + (count >> 1)); 423 424 /* 425 * FIXME 426 * 427 * driver and this function are assuming that 428 * it is used as little endian 429 */ 430 if (is_read) 431 *buf8 = sd_ctrl_read16(host, CTL_SD_DATA_PORT) & 0xff; 432 else 433 sd_ctrl_write16(host, CTL_SD_DATA_PORT, *buf8); 434 } 435 436 /* 437 * This chip always returns (at least?) as much data as you ask for. 438 * I'm unsure what happens if you ask for less than a block. This should be 439 * looked into to ensure that a funny length read doesn't hose the controller. 440 */ 441 static void tmio_mmc_pio_irq(struct tmio_mmc_host *host) 442 { 443 struct mmc_data *data = host->data; 444 void *sg_virt; 445 unsigned short *buf; 446 unsigned int count; 447 unsigned long flags; 448 449 if ((host->chan_tx || host->chan_rx) && !host->force_pio) { 450 pr_err("PIO IRQ in DMA mode!\n"); 451 return; 452 } else if (!data) { 453 pr_debug("Spurious PIO IRQ\n"); 454 return; 455 } 456 457 sg_virt = tmio_mmc_kmap_atomic(host->sg_ptr, &flags); 458 buf = (unsigned short *)(sg_virt + host->sg_off); 459 460 count = host->sg_ptr->length - host->sg_off; 461 if (count > data->blksz) 462 count = data->blksz; 463 464 pr_debug("count: %08x offset: %08x flags %08x\n", 465 count, host->sg_off, data->flags); 466 467 /* Transfer the data */ 468 tmio_mmc_transfer_data(host, buf, count); 469 470 host->sg_off += count; 471 472 tmio_mmc_kunmap_atomic(host->sg_ptr, &flags, sg_virt); 473 474 if (host->sg_off == host->sg_ptr->length) 475 tmio_mmc_next_sg(host); 476 } 477 478 static void tmio_mmc_check_bounce_buffer(struct tmio_mmc_host *host) 479 { 480 if (host->sg_ptr == &host->bounce_sg) { 481 unsigned long flags; 482 void *sg_vaddr = tmio_mmc_kmap_atomic(host->sg_orig, &flags); 483 484 memcpy(sg_vaddr, host->bounce_buf, host->bounce_sg.length); 485 tmio_mmc_kunmap_atomic(host->sg_orig, &flags, sg_vaddr); 486 } 487 } 488 489 /* needs to be called with host->lock held */ 490 void tmio_mmc_do_data_irq(struct tmio_mmc_host *host) 491 { 492 struct mmc_data *data = host->data; 493 struct mmc_command *stop; 494 495 host->data = NULL; 496 497 if (!data) { 498 dev_warn(&host->pdev->dev, "Spurious data end IRQ\n"); 499 return; 500 } 501 stop = data->stop; 502 503 /* FIXME - return correct transfer count on errors */ 504 if (!data->error) 505 data->bytes_xfered = data->blocks * data->blksz; 506 else 507 data->bytes_xfered = 0; 508 509 pr_debug("Completed data request\n"); 510 511 /* 512 * FIXME: other drivers allow an optional stop command of any given type 513 * which we dont do, as the chip can auto generate them. 514 * Perhaps we can be smarter about when to use auto CMD12 and 515 * only issue the auto request when we know this is the desired 516 * stop command, allowing fallback to the stop command the 517 * upper layers expect. For now, we do what works. 518 */ 519 520 if (data->flags & MMC_DATA_READ) { 521 if (host->chan_rx && !host->force_pio) 522 tmio_mmc_check_bounce_buffer(host); 523 dev_dbg(&host->pdev->dev, "Complete Rx request %p\n", 524 host->mrq); 525 } else { 526 dev_dbg(&host->pdev->dev, "Complete Tx request %p\n", 527 host->mrq); 528 } 529 530 if (stop && !host->mrq->sbc) { 531 if (stop->opcode != MMC_STOP_TRANSMISSION || stop->arg) 532 dev_err(&host->pdev->dev, "unsupported stop: CMD%u,0x%x. We did CMD12,0\n", 533 stop->opcode, stop->arg); 534 535 /* fill in response from auto CMD12 */ 536 stop->resp[0] = sd_ctrl_read16_and_16_as_32(host, CTL_RESPONSE); 537 538 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0); 539 } 540 541 schedule_work(&host->done); 542 } 543 EXPORT_SYMBOL_GPL(tmio_mmc_do_data_irq); 544 545 static void tmio_mmc_data_irq(struct tmio_mmc_host *host, unsigned int stat) 546 { 547 struct mmc_data *data; 548 549 spin_lock(&host->lock); 550 data = host->data; 551 552 if (!data) 553 goto out; 554 555 if (stat & TMIO_STAT_CRCFAIL || stat & TMIO_STAT_STOPBIT_ERR || 556 stat & TMIO_STAT_TXUNDERRUN) 557 data->error = -EILSEQ; 558 if (host->chan_tx && (data->flags & MMC_DATA_WRITE) && !host->force_pio) { 559 u32 status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS); 560 bool done = false; 561 562 /* 563 * Has all data been written out yet? Testing on SuperH showed, 564 * that in most cases the first interrupt comes already with the 565 * BUSY status bit clear, but on some operations, like mount or 566 * in the beginning of a write / sync / umount, there is one 567 * DATAEND interrupt with the BUSY bit set, in this cases 568 * waiting for one more interrupt fixes the problem. 569 */ 570 if (host->pdata->flags & TMIO_MMC_HAS_IDLE_WAIT) { 571 if (status & TMIO_STAT_SCLKDIVEN) 572 done = true; 573 } else { 574 if (!(status & TMIO_STAT_CMD_BUSY)) 575 done = true; 576 } 577 578 if (done) { 579 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND); 580 tmio_mmc_dataend_dma(host); 581 } 582 } else if (host->chan_rx && (data->flags & MMC_DATA_READ) && !host->force_pio) { 583 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND); 584 tmio_mmc_dataend_dma(host); 585 } else { 586 tmio_mmc_do_data_irq(host); 587 tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_READOP | TMIO_MASK_WRITEOP); 588 } 589 out: 590 spin_unlock(&host->lock); 591 } 592 593 static void tmio_mmc_cmd_irq(struct tmio_mmc_host *host, unsigned int stat) 594 { 595 struct mmc_command *cmd = host->cmd; 596 int i, addr; 597 598 spin_lock(&host->lock); 599 600 if (!host->cmd) { 601 pr_debug("Spurious CMD irq\n"); 602 goto out; 603 } 604 605 /* This controller is sicker than the PXA one. Not only do we need to 606 * drop the top 8 bits of the first response word, we also need to 607 * modify the order of the response for short response command types. 608 */ 609 610 for (i = 3, addr = CTL_RESPONSE ; i >= 0 ; i--, addr += 4) 611 cmd->resp[i] = sd_ctrl_read16_and_16_as_32(host, addr); 612 613 if (cmd->flags & MMC_RSP_136) { 614 cmd->resp[0] = (cmd->resp[0] << 8) | (cmd->resp[1] >> 24); 615 cmd->resp[1] = (cmd->resp[1] << 8) | (cmd->resp[2] >> 24); 616 cmd->resp[2] = (cmd->resp[2] << 8) | (cmd->resp[3] >> 24); 617 cmd->resp[3] <<= 8; 618 } else if (cmd->flags & MMC_RSP_R3) { 619 cmd->resp[0] = cmd->resp[3]; 620 } 621 622 if (stat & TMIO_STAT_CMDTIMEOUT) 623 cmd->error = -ETIMEDOUT; 624 else if ((stat & TMIO_STAT_CRCFAIL && cmd->flags & MMC_RSP_CRC) || 625 stat & TMIO_STAT_STOPBIT_ERR || 626 stat & TMIO_STAT_CMD_IDX_ERR) 627 cmd->error = -EILSEQ; 628 629 /* If there is data to handle we enable data IRQs here, and 630 * we will ultimatley finish the request in the data_end handler. 631 * If theres no data or we encountered an error, finish now. 632 */ 633 if (host->data && (!cmd->error || cmd->error == -EILSEQ)) { 634 if (host->data->flags & MMC_DATA_READ) { 635 if (host->force_pio || !host->chan_rx) { 636 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_READOP); 637 } else { 638 tmio_mmc_disable_mmc_irqs(host, 639 TMIO_MASK_READOP); 640 tasklet_schedule(&host->dma_issue); 641 } 642 } else { 643 if (host->force_pio || !host->chan_tx) { 644 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_WRITEOP); 645 } else { 646 tmio_mmc_disable_mmc_irqs(host, 647 TMIO_MASK_WRITEOP); 648 tasklet_schedule(&host->dma_issue); 649 } 650 } 651 } else { 652 schedule_work(&host->done); 653 } 654 655 out: 656 spin_unlock(&host->lock); 657 } 658 659 static bool __tmio_mmc_card_detect_irq(struct tmio_mmc_host *host, 660 int ireg, int status) 661 { 662 struct mmc_host *mmc = host->mmc; 663 664 /* Card insert / remove attempts */ 665 if (ireg & (TMIO_STAT_CARD_INSERT | TMIO_STAT_CARD_REMOVE)) { 666 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CARD_INSERT | 667 TMIO_STAT_CARD_REMOVE); 668 if ((((ireg & TMIO_STAT_CARD_REMOVE) && mmc->card) || 669 ((ireg & TMIO_STAT_CARD_INSERT) && !mmc->card)) && 670 !work_pending(&mmc->detect.work)) 671 mmc_detect_change(host->mmc, msecs_to_jiffies(100)); 672 return true; 673 } 674 675 return false; 676 } 677 678 static bool __tmio_mmc_sdcard_irq(struct tmio_mmc_host *host, int ireg, 679 int status) 680 { 681 /* Command completion */ 682 if (ireg & (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT)) { 683 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CMDRESPEND | 684 TMIO_STAT_CMDTIMEOUT); 685 tmio_mmc_cmd_irq(host, status); 686 return true; 687 } 688 689 /* Data transfer */ 690 if (ireg & (TMIO_STAT_RXRDY | TMIO_STAT_TXRQ)) { 691 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_RXRDY | TMIO_STAT_TXRQ); 692 tmio_mmc_pio_irq(host); 693 return true; 694 } 695 696 /* Data transfer completion */ 697 if (ireg & TMIO_STAT_DATAEND) { 698 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_DATAEND); 699 tmio_mmc_data_irq(host, status); 700 return true; 701 } 702 703 return false; 704 } 705 706 static void __tmio_mmc_sdio_irq(struct tmio_mmc_host *host) 707 { 708 struct mmc_host *mmc = host->mmc; 709 struct tmio_mmc_data *pdata = host->pdata; 710 unsigned int ireg, status; 711 unsigned int sdio_status; 712 713 if (!(pdata->flags & TMIO_MMC_SDIO_IRQ)) 714 return; 715 716 status = sd_ctrl_read16(host, CTL_SDIO_STATUS); 717 ireg = status & TMIO_SDIO_MASK_ALL & ~host->sdio_irq_mask; 718 719 sdio_status = status & ~TMIO_SDIO_MASK_ALL; 720 if (pdata->flags & TMIO_MMC_SDIO_STATUS_SETBITS) 721 sdio_status |= TMIO_SDIO_SETBITS_MASK; 722 723 sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status); 724 725 if (mmc->caps & MMC_CAP_SDIO_IRQ && ireg & TMIO_SDIO_STAT_IOIRQ) 726 mmc_signal_sdio_irq(mmc); 727 } 728 729 irqreturn_t tmio_mmc_irq(int irq, void *devid) 730 { 731 struct tmio_mmc_host *host = devid; 732 unsigned int ireg, status; 733 734 status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS); 735 ireg = status & TMIO_MASK_IRQ & ~host->sdcard_irq_mask; 736 737 /* Clear the status except the interrupt status */ 738 sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, TMIO_MASK_IRQ); 739 740 if (__tmio_mmc_card_detect_irq(host, ireg, status)) 741 return IRQ_HANDLED; 742 if (__tmio_mmc_sdcard_irq(host, ireg, status)) 743 return IRQ_HANDLED; 744 745 __tmio_mmc_sdio_irq(host); 746 747 return IRQ_HANDLED; 748 } 749 EXPORT_SYMBOL_GPL(tmio_mmc_irq); 750 751 static int tmio_mmc_start_data(struct tmio_mmc_host *host, 752 struct mmc_data *data) 753 { 754 struct tmio_mmc_data *pdata = host->pdata; 755 756 pr_debug("setup data transfer: blocksize %08x nr_blocks %d\n", 757 data->blksz, data->blocks); 758 759 /* Some hardware cannot perform 2 byte requests in 4/8 bit mode */ 760 if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_4 || 761 host->mmc->ios.bus_width == MMC_BUS_WIDTH_8) { 762 int blksz_2bytes = pdata->flags & TMIO_MMC_BLKSZ_2BYTES; 763 764 if (data->blksz < 2 || (data->blksz < 4 && !blksz_2bytes)) { 765 pr_err("%s: %d byte block unsupported in 4/8 bit mode\n", 766 mmc_hostname(host->mmc), data->blksz); 767 return -EINVAL; 768 } 769 } 770 771 tmio_mmc_init_sg(host, data); 772 host->data = data; 773 host->force_pio = false; 774 775 /* Set transfer length / blocksize */ 776 sd_ctrl_write16(host, CTL_SD_XFER_LEN, data->blksz); 777 sd_ctrl_write16(host, CTL_XFER_BLK_COUNT, data->blocks); 778 779 tmio_mmc_start_dma(host, data); 780 781 return 0; 782 } 783 784 static void tmio_mmc_hw_reset(struct mmc_host *mmc) 785 { 786 struct tmio_mmc_host *host = mmc_priv(mmc); 787 788 if (host->hw_reset) 789 host->hw_reset(host); 790 } 791 792 static int tmio_mmc_execute_tuning(struct mmc_host *mmc, u32 opcode) 793 { 794 struct tmio_mmc_host *host = mmc_priv(mmc); 795 int i, ret = 0; 796 797 if (!host->init_tuning || !host->select_tuning) 798 /* Tuning is not supported */ 799 goto out; 800 801 host->tap_num = host->init_tuning(host); 802 if (!host->tap_num) 803 /* Tuning is not supported */ 804 goto out; 805 806 if (host->tap_num * 2 >= sizeof(host->taps) * BITS_PER_BYTE) { 807 dev_warn_once(&host->pdev->dev, 808 "Too many taps, skipping tuning. Please consider updating size of taps field of tmio_mmc_host\n"); 809 goto out; 810 } 811 812 bitmap_zero(host->taps, host->tap_num * 2); 813 814 /* Issue CMD19 twice for each tap */ 815 for (i = 0; i < 2 * host->tap_num; i++) { 816 if (host->prepare_tuning) 817 host->prepare_tuning(host, i % host->tap_num); 818 819 ret = mmc_send_tuning(mmc, opcode, NULL); 820 if (ret == 0) 821 set_bit(i, host->taps); 822 823 usleep_range(1000, 1200); 824 } 825 826 ret = host->select_tuning(host); 827 828 out: 829 if (ret < 0) { 830 dev_warn(&host->pdev->dev, "Tuning procedure failed\n"); 831 tmio_mmc_hw_reset(mmc); 832 } 833 834 return ret; 835 } 836 837 static void tmio_process_mrq(struct tmio_mmc_host *host, 838 struct mmc_request *mrq) 839 { 840 struct mmc_command *cmd; 841 int ret; 842 843 if (mrq->sbc && host->cmd != mrq->sbc) { 844 cmd = mrq->sbc; 845 } else { 846 cmd = mrq->cmd; 847 if (mrq->data) { 848 ret = tmio_mmc_start_data(host, mrq->data); 849 if (ret) 850 goto fail; 851 } 852 } 853 854 ret = tmio_mmc_start_command(host, cmd); 855 if (ret) 856 goto fail; 857 858 schedule_delayed_work(&host->delayed_reset_work, 859 msecs_to_jiffies(CMDREQ_TIMEOUT)); 860 return; 861 862 fail: 863 host->mrq = NULL; 864 mrq->cmd->error = ret; 865 mmc_request_done(host->mmc, mrq); 866 } 867 868 /* Process requests from the MMC layer */ 869 static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq) 870 { 871 struct tmio_mmc_host *host = mmc_priv(mmc); 872 unsigned long flags; 873 874 spin_lock_irqsave(&host->lock, flags); 875 876 if (host->mrq) { 877 pr_debug("request not null\n"); 878 if (IS_ERR(host->mrq)) { 879 spin_unlock_irqrestore(&host->lock, flags); 880 mrq->cmd->error = -EAGAIN; 881 mmc_request_done(mmc, mrq); 882 return; 883 } 884 } 885 886 host->last_req_ts = jiffies; 887 wmb(); 888 host->mrq = mrq; 889 890 spin_unlock_irqrestore(&host->lock, flags); 891 892 tmio_process_mrq(host, mrq); 893 } 894 895 static void tmio_mmc_finish_request(struct tmio_mmc_host *host) 896 { 897 struct mmc_request *mrq; 898 unsigned long flags; 899 900 spin_lock_irqsave(&host->lock, flags); 901 902 mrq = host->mrq; 903 if (IS_ERR_OR_NULL(mrq)) { 904 spin_unlock_irqrestore(&host->lock, flags); 905 return; 906 } 907 908 /* If not SET_BLOCK_COUNT, clear old data */ 909 if (host->cmd != mrq->sbc) { 910 host->cmd = NULL; 911 host->data = NULL; 912 host->mrq = NULL; 913 } 914 915 cancel_delayed_work(&host->delayed_reset_work); 916 917 spin_unlock_irqrestore(&host->lock, flags); 918 919 if (mrq->cmd->error || (mrq->data && mrq->data->error)) 920 tmio_mmc_abort_dma(host); 921 922 if (host->check_scc_error) 923 host->check_scc_error(host); 924 925 /* If SET_BLOCK_COUNT, continue with main command */ 926 if (host->mrq && !mrq->cmd->error) { 927 tmio_process_mrq(host, mrq); 928 return; 929 } 930 931 mmc_request_done(host->mmc, mrq); 932 } 933 934 static void tmio_mmc_done_work(struct work_struct *work) 935 { 936 struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host, 937 done); 938 tmio_mmc_finish_request(host); 939 } 940 941 static void tmio_mmc_power_on(struct tmio_mmc_host *host, unsigned short vdd) 942 { 943 struct mmc_host *mmc = host->mmc; 944 int ret = 0; 945 946 /* .set_ios() is returning void, so, no chance to report an error */ 947 948 if (host->set_pwr) 949 host->set_pwr(host->pdev, 1); 950 951 if (!IS_ERR(mmc->supply.vmmc)) { 952 ret = mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, vdd); 953 /* 954 * Attention: empiric value. With a b43 WiFi SDIO card this 955 * delay proved necessary for reliable card-insertion probing. 956 * 100us were not enough. Is this the same 140us delay, as in 957 * tmio_mmc_set_ios()? 958 */ 959 usleep_range(200, 300); 960 } 961 /* 962 * It seems, VccQ should be switched on after Vcc, this is also what the 963 * omap_hsmmc.c driver does. 964 */ 965 if (!IS_ERR(mmc->supply.vqmmc) && !ret) { 966 ret = regulator_enable(mmc->supply.vqmmc); 967 usleep_range(200, 300); 968 } 969 970 if (ret < 0) 971 dev_dbg(&host->pdev->dev, "Regulators failed to power up: %d\n", 972 ret); 973 } 974 975 static void tmio_mmc_power_off(struct tmio_mmc_host *host) 976 { 977 struct mmc_host *mmc = host->mmc; 978 979 if (!IS_ERR(mmc->supply.vqmmc)) 980 regulator_disable(mmc->supply.vqmmc); 981 982 if (!IS_ERR(mmc->supply.vmmc)) 983 mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0); 984 985 if (host->set_pwr) 986 host->set_pwr(host->pdev, 0); 987 } 988 989 static void tmio_mmc_set_bus_width(struct tmio_mmc_host *host, 990 unsigned char bus_width) 991 { 992 u16 reg = sd_ctrl_read16(host, CTL_SD_MEM_CARD_OPT) 993 & ~(CARD_OPT_WIDTH | CARD_OPT_WIDTH8); 994 995 /* reg now applies to MMC_BUS_WIDTH_4 */ 996 if (bus_width == MMC_BUS_WIDTH_1) 997 reg |= CARD_OPT_WIDTH; 998 else if (bus_width == MMC_BUS_WIDTH_8) 999 reg |= CARD_OPT_WIDTH8; 1000 1001 sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, reg); 1002 } 1003 1004 /* Set MMC clock / power. 1005 * Note: This controller uses a simple divider scheme therefore it cannot 1006 * run a MMC card at full speed (20MHz). The max clock is 24MHz on SD, but as 1007 * MMC wont run that fast, it has to be clocked at 12MHz which is the next 1008 * slowest setting. 1009 */ 1010 static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) 1011 { 1012 struct tmio_mmc_host *host = mmc_priv(mmc); 1013 struct device *dev = &host->pdev->dev; 1014 unsigned long flags; 1015 1016 mutex_lock(&host->ios_lock); 1017 1018 spin_lock_irqsave(&host->lock, flags); 1019 if (host->mrq) { 1020 if (IS_ERR(host->mrq)) { 1021 dev_dbg(dev, 1022 "%s.%d: concurrent .set_ios(), clk %u, mode %u\n", 1023 current->comm, task_pid_nr(current), 1024 ios->clock, ios->power_mode); 1025 host->mrq = ERR_PTR(-EINTR); 1026 } else { 1027 dev_dbg(dev, 1028 "%s.%d: CMD%u active since %lu, now %lu!\n", 1029 current->comm, task_pid_nr(current), 1030 host->mrq->cmd->opcode, host->last_req_ts, 1031 jiffies); 1032 } 1033 spin_unlock_irqrestore(&host->lock, flags); 1034 1035 mutex_unlock(&host->ios_lock); 1036 return; 1037 } 1038 1039 host->mrq = ERR_PTR(-EBUSY); 1040 1041 spin_unlock_irqrestore(&host->lock, flags); 1042 1043 switch (ios->power_mode) { 1044 case MMC_POWER_OFF: 1045 tmio_mmc_power_off(host); 1046 tmio_mmc_clk_stop(host); 1047 break; 1048 case MMC_POWER_UP: 1049 tmio_mmc_power_on(host, ios->vdd); 1050 tmio_mmc_set_clock(host, ios->clock); 1051 tmio_mmc_set_bus_width(host, ios->bus_width); 1052 break; 1053 case MMC_POWER_ON: 1054 tmio_mmc_set_clock(host, ios->clock); 1055 tmio_mmc_set_bus_width(host, ios->bus_width); 1056 break; 1057 } 1058 1059 /* Let things settle. delay taken from winCE driver */ 1060 usleep_range(140, 200); 1061 if (PTR_ERR(host->mrq) == -EINTR) 1062 dev_dbg(&host->pdev->dev, 1063 "%s.%d: IOS interrupted: clk %u, mode %u", 1064 current->comm, task_pid_nr(current), 1065 ios->clock, ios->power_mode); 1066 host->mrq = NULL; 1067 1068 host->clk_cache = ios->clock; 1069 1070 mutex_unlock(&host->ios_lock); 1071 } 1072 1073 static int tmio_mmc_get_ro(struct mmc_host *mmc) 1074 { 1075 struct tmio_mmc_host *host = mmc_priv(mmc); 1076 1077 return !(sd_ctrl_read16_and_16_as_32(host, CTL_STATUS) & 1078 TMIO_STAT_WRPROTECT); 1079 } 1080 1081 static int tmio_mmc_get_cd(struct mmc_host *mmc) 1082 { 1083 struct tmio_mmc_host *host = mmc_priv(mmc); 1084 1085 return !!(sd_ctrl_read16_and_16_as_32(host, CTL_STATUS) & 1086 TMIO_STAT_SIGSTATE); 1087 } 1088 1089 static int tmio_multi_io_quirk(struct mmc_card *card, 1090 unsigned int direction, int blk_size) 1091 { 1092 struct tmio_mmc_host *host = mmc_priv(card->host); 1093 1094 if (host->multi_io_quirk) 1095 return host->multi_io_quirk(card, direction, blk_size); 1096 1097 return blk_size; 1098 } 1099 1100 static int tmio_mmc_prepare_hs400_tuning(struct mmc_host *mmc, 1101 struct mmc_ios *ios) 1102 { 1103 struct tmio_mmc_host *host = mmc_priv(mmc); 1104 1105 if (host->prepare_hs400_tuning) 1106 host->prepare_hs400_tuning(host); 1107 1108 return 0; 1109 } 1110 1111 static void tmio_mmc_hs400_downgrade(struct mmc_host *mmc) 1112 { 1113 struct tmio_mmc_host *host = mmc_priv(mmc); 1114 1115 if (host->hs400_downgrade) 1116 host->hs400_downgrade(host); 1117 } 1118 1119 static void tmio_mmc_hs400_complete(struct mmc_host *mmc) 1120 { 1121 struct tmio_mmc_host *host = mmc_priv(mmc); 1122 1123 if (host->hs400_complete) 1124 host->hs400_complete(host); 1125 } 1126 1127 static const struct mmc_host_ops tmio_mmc_ops = { 1128 .request = tmio_mmc_request, 1129 .set_ios = tmio_mmc_set_ios, 1130 .get_ro = tmio_mmc_get_ro, 1131 .get_cd = tmio_mmc_get_cd, 1132 .enable_sdio_irq = tmio_mmc_enable_sdio_irq, 1133 .multi_io_quirk = tmio_multi_io_quirk, 1134 .hw_reset = tmio_mmc_hw_reset, 1135 .execute_tuning = tmio_mmc_execute_tuning, 1136 .prepare_hs400_tuning = tmio_mmc_prepare_hs400_tuning, 1137 .hs400_downgrade = tmio_mmc_hs400_downgrade, 1138 .hs400_complete = tmio_mmc_hs400_complete, 1139 }; 1140 1141 static int tmio_mmc_init_ocr(struct tmio_mmc_host *host) 1142 { 1143 struct tmio_mmc_data *pdata = host->pdata; 1144 struct mmc_host *mmc = host->mmc; 1145 int err; 1146 1147 err = mmc_regulator_get_supply(mmc); 1148 if (err) 1149 return err; 1150 1151 /* use ocr_mask if no regulator */ 1152 if (!mmc->ocr_avail) 1153 mmc->ocr_avail = pdata->ocr_mask; 1154 1155 /* 1156 * try again. 1157 * There is possibility that regulator has not been probed 1158 */ 1159 if (!mmc->ocr_avail) 1160 return -EPROBE_DEFER; 1161 1162 return 0; 1163 } 1164 1165 static void tmio_mmc_of_parse(struct platform_device *pdev, 1166 struct mmc_host *mmc) 1167 { 1168 const struct device_node *np = pdev->dev.of_node; 1169 1170 if (!np) 1171 return; 1172 1173 /* 1174 * DEPRECATED: 1175 * For new platforms, please use "disable-wp" instead of 1176 * "toshiba,mmc-wrprotect-disable" 1177 */ 1178 if (of_get_property(np, "toshiba,mmc-wrprotect-disable", NULL)) 1179 mmc->caps2 |= MMC_CAP2_NO_WRITE_PROTECT; 1180 } 1181 1182 struct tmio_mmc_host *tmio_mmc_host_alloc(struct platform_device *pdev, 1183 struct tmio_mmc_data *pdata) 1184 { 1185 struct tmio_mmc_host *host; 1186 struct mmc_host *mmc; 1187 struct resource *res; 1188 void __iomem *ctl; 1189 int ret; 1190 1191 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1192 ctl = devm_ioremap_resource(&pdev->dev, res); 1193 if (IS_ERR(ctl)) 1194 return ERR_CAST(ctl); 1195 1196 mmc = mmc_alloc_host(sizeof(struct tmio_mmc_host), &pdev->dev); 1197 if (!mmc) 1198 return ERR_PTR(-ENOMEM); 1199 1200 host = mmc_priv(mmc); 1201 host->ctl = ctl; 1202 host->mmc = mmc; 1203 host->pdev = pdev; 1204 host->pdata = pdata; 1205 host->ops = tmio_mmc_ops; 1206 mmc->ops = &host->ops; 1207 1208 ret = mmc_of_parse(host->mmc); 1209 if (ret) { 1210 host = ERR_PTR(ret); 1211 goto free; 1212 } 1213 1214 tmio_mmc_of_parse(pdev, mmc); 1215 1216 platform_set_drvdata(pdev, host); 1217 1218 return host; 1219 free: 1220 mmc_free_host(mmc); 1221 1222 return host; 1223 } 1224 EXPORT_SYMBOL_GPL(tmio_mmc_host_alloc); 1225 1226 void tmio_mmc_host_free(struct tmio_mmc_host *host) 1227 { 1228 mmc_free_host(host->mmc); 1229 } 1230 EXPORT_SYMBOL_GPL(tmio_mmc_host_free); 1231 1232 int tmio_mmc_host_probe(struct tmio_mmc_host *_host) 1233 { 1234 struct platform_device *pdev = _host->pdev; 1235 struct tmio_mmc_data *pdata = _host->pdata; 1236 struct mmc_host *mmc = _host->mmc; 1237 int ret; 1238 1239 /* 1240 * Check the sanity of mmc->f_min to prevent tmio_mmc_set_clock() from 1241 * looping forever... 1242 */ 1243 if (mmc->f_min == 0) 1244 return -EINVAL; 1245 1246 if (!(pdata->flags & TMIO_MMC_HAS_IDLE_WAIT)) 1247 _host->write16_hook = NULL; 1248 1249 _host->set_pwr = pdata->set_pwr; 1250 _host->set_clk_div = pdata->set_clk_div; 1251 1252 ret = tmio_mmc_init_ocr(_host); 1253 if (ret < 0) 1254 return ret; 1255 1256 if (pdata->flags & TMIO_MMC_USE_GPIO_CD) { 1257 ret = mmc_gpio_request_cd(mmc, pdata->cd_gpio, 0); 1258 if (ret) 1259 return ret; 1260 } 1261 1262 mmc->caps |= MMC_CAP_4_BIT_DATA | pdata->capabilities; 1263 mmc->caps2 |= pdata->capabilities2; 1264 mmc->max_segs = pdata->max_segs ? : 32; 1265 mmc->max_blk_size = 512; 1266 mmc->max_blk_count = pdata->max_blk_count ? : 1267 (PAGE_SIZE / mmc->max_blk_size) * mmc->max_segs; 1268 mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count; 1269 /* 1270 * Since swiotlb has memory size limitation, this will calculate 1271 * the maximum size locally (because we don't have any APIs for it now) 1272 * and check the current max_req_size. And then, this will update 1273 * the max_req_size if needed as a workaround. 1274 */ 1275 if (swiotlb_max_segment()) { 1276 unsigned int max_size = (1 << IO_TLB_SHIFT) * IO_TLB_SEGSIZE; 1277 1278 if (mmc->max_req_size > max_size) 1279 mmc->max_req_size = max_size; 1280 } 1281 mmc->max_seg_size = mmc->max_req_size; 1282 1283 if (mmc_can_gpio_ro(mmc)) 1284 _host->ops.get_ro = mmc_gpio_get_ro; 1285 1286 if (mmc_can_gpio_cd(mmc)) 1287 _host->ops.get_cd = mmc_gpio_get_cd; 1288 1289 _host->native_hotplug = !(mmc_can_gpio_cd(mmc) || 1290 mmc->caps & MMC_CAP_NEEDS_POLL || 1291 !mmc_card_is_removable(mmc)); 1292 1293 /* 1294 * On Gen2+, eMMC with NONREMOVABLE currently fails because native 1295 * hotplug gets disabled. It seems RuntimePM related yet we need further 1296 * research. Since we are planning a PM overhaul anyway, let's enforce 1297 * for now the device being active by enabling native hotplug always. 1298 */ 1299 if (pdata->flags & TMIO_MMC_MIN_RCAR2) 1300 _host->native_hotplug = true; 1301 1302 /* 1303 * While using internal tmio hardware logic for card detection, we need 1304 * to ensure it stays powered for it to work. 1305 */ 1306 if (_host->native_hotplug) 1307 pm_runtime_get_noresume(&pdev->dev); 1308 1309 _host->sdio_irq_enabled = false; 1310 if (pdata->flags & TMIO_MMC_SDIO_IRQ) 1311 _host->sdio_irq_mask = TMIO_SDIO_MASK_ALL; 1312 1313 tmio_mmc_clk_stop(_host); 1314 tmio_mmc_reset(_host); 1315 1316 _host->sdcard_irq_mask = sd_ctrl_read16_and_16_as_32(_host, CTL_IRQ_MASK); 1317 tmio_mmc_disable_mmc_irqs(_host, TMIO_MASK_ALL); 1318 1319 if (_host->native_hotplug) 1320 tmio_mmc_enable_mmc_irqs(_host, 1321 TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT); 1322 1323 spin_lock_init(&_host->lock); 1324 mutex_init(&_host->ios_lock); 1325 1326 /* Init delayed work for request timeouts */ 1327 INIT_DELAYED_WORK(&_host->delayed_reset_work, tmio_mmc_reset_work); 1328 INIT_WORK(&_host->done, tmio_mmc_done_work); 1329 1330 /* See if we also get DMA */ 1331 tmio_mmc_request_dma(_host, pdata); 1332 1333 pm_runtime_set_active(&pdev->dev); 1334 pm_runtime_set_autosuspend_delay(&pdev->dev, 50); 1335 pm_runtime_use_autosuspend(&pdev->dev); 1336 pm_runtime_enable(&pdev->dev); 1337 1338 ret = mmc_add_host(mmc); 1339 if (ret) 1340 goto remove_host; 1341 1342 dev_pm_qos_expose_latency_limit(&pdev->dev, 100); 1343 1344 return 0; 1345 1346 remove_host: 1347 tmio_mmc_host_remove(_host); 1348 return ret; 1349 } 1350 EXPORT_SYMBOL_GPL(tmio_mmc_host_probe); 1351 1352 void tmio_mmc_host_remove(struct tmio_mmc_host *host) 1353 { 1354 struct platform_device *pdev = host->pdev; 1355 struct mmc_host *mmc = host->mmc; 1356 1357 if (host->pdata->flags & TMIO_MMC_SDIO_IRQ) 1358 sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0000); 1359 1360 if (!host->native_hotplug) 1361 pm_runtime_get_sync(&pdev->dev); 1362 1363 dev_pm_qos_hide_latency_limit(&pdev->dev); 1364 1365 mmc_remove_host(mmc); 1366 cancel_work_sync(&host->done); 1367 cancel_delayed_work_sync(&host->delayed_reset_work); 1368 tmio_mmc_release_dma(host); 1369 1370 pm_runtime_put_sync(&pdev->dev); 1371 pm_runtime_disable(&pdev->dev); 1372 } 1373 EXPORT_SYMBOL_GPL(tmio_mmc_host_remove); 1374 1375 #ifdef CONFIG_PM 1376 static int tmio_mmc_clk_enable(struct tmio_mmc_host *host) 1377 { 1378 if (!host->clk_enable) 1379 return -ENOTSUPP; 1380 1381 return host->clk_enable(host); 1382 } 1383 1384 static void tmio_mmc_clk_disable(struct tmio_mmc_host *host) 1385 { 1386 if (host->clk_disable) 1387 host->clk_disable(host); 1388 } 1389 1390 int tmio_mmc_host_runtime_suspend(struct device *dev) 1391 { 1392 struct tmio_mmc_host *host = dev_get_drvdata(dev); 1393 1394 tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_ALL); 1395 1396 if (host->clk_cache) 1397 tmio_mmc_clk_stop(host); 1398 1399 tmio_mmc_clk_disable(host); 1400 1401 return 0; 1402 } 1403 EXPORT_SYMBOL_GPL(tmio_mmc_host_runtime_suspend); 1404 1405 static bool tmio_mmc_can_retune(struct tmio_mmc_host *host) 1406 { 1407 return host->tap_num && mmc_can_retune(host->mmc); 1408 } 1409 1410 int tmio_mmc_host_runtime_resume(struct device *dev) 1411 { 1412 struct tmio_mmc_host *host = dev_get_drvdata(dev); 1413 1414 tmio_mmc_reset(host); 1415 tmio_mmc_clk_enable(host); 1416 1417 if (host->clk_cache) 1418 tmio_mmc_set_clock(host, host->clk_cache); 1419 1420 if (host->native_hotplug) 1421 tmio_mmc_enable_mmc_irqs(host, 1422 TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT); 1423 1424 tmio_mmc_enable_dma(host, true); 1425 1426 if (tmio_mmc_can_retune(host) && host->select_tuning(host)) 1427 dev_warn(&host->pdev->dev, "Tuning selection failed\n"); 1428 1429 return 0; 1430 } 1431 EXPORT_SYMBOL_GPL(tmio_mmc_host_runtime_resume); 1432 #endif 1433 1434 MODULE_LICENSE("GPL v2"); 1435