1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Driver for the MMC / SD / SDIO IP found in: 4 * 5 * TC6393XB, TC6391XB, TC6387XB, T7L66XB, ASIC3, SH-Mobile SoCs 6 * 7 * Copyright (C) 2015-19 Renesas Electronics Corporation 8 * Copyright (C) 2016-19 Sang Engineering, Wolfram Sang 9 * Copyright (C) 2017 Horms Solutions, Simon Horman 10 * Copyright (C) 2011 Guennadi Liakhovetski 11 * Copyright (C) 2007 Ian Molton 12 * Copyright (C) 2004 Ian Molton 13 * 14 * This driver draws mainly on scattered spec sheets, Reverse engineering 15 * of the toshiba e800 SD driver and some parts of the 2.4 ASIC3 driver (4 bit 16 * support). (Further 4 bit support from a later datasheet). 17 * 18 * TODO: 19 * Investigate using a workqueue for PIO transfers 20 * Eliminate FIXMEs 21 * Better Power management 22 * Handle MMC errors better 23 * double buffer support 24 * 25 */ 26 27 #include <linux/delay.h> 28 #include <linux/device.h> 29 #include <linux/dma-mapping.h> 30 #include <linux/highmem.h> 31 #include <linux/interrupt.h> 32 #include <linux/io.h> 33 #include <linux/irq.h> 34 #include <linux/mfd/tmio.h> 35 #include <linux/mmc/card.h> 36 #include <linux/mmc/host.h> 37 #include <linux/mmc/mmc.h> 38 #include <linux/mmc/slot-gpio.h> 39 #include <linux/module.h> 40 #include <linux/pagemap.h> 41 #include <linux/platform_device.h> 42 #include <linux/pm_qos.h> 43 #include <linux/pm_runtime.h> 44 #include <linux/regulator/consumer.h> 45 #include <linux/mmc/sdio.h> 46 #include <linux/scatterlist.h> 47 #include <linux/sizes.h> 48 #include <linux/spinlock.h> 49 #include <linux/workqueue.h> 50 51 #include "tmio_mmc.h" 52 53 static inline void tmio_mmc_start_dma(struct tmio_mmc_host *host, 54 struct mmc_data *data) 55 { 56 if (host->dma_ops) 57 host->dma_ops->start(host, data); 58 } 59 60 static inline void tmio_mmc_end_dma(struct tmio_mmc_host *host) 61 { 62 if (host->dma_ops && host->dma_ops->end) 63 host->dma_ops->end(host); 64 } 65 66 static inline void tmio_mmc_enable_dma(struct tmio_mmc_host *host, bool enable) 67 { 68 if (host->dma_ops) 69 host->dma_ops->enable(host, enable); 70 } 71 72 static inline void tmio_mmc_request_dma(struct tmio_mmc_host *host, 73 struct tmio_mmc_data *pdata) 74 { 75 if (host->dma_ops) { 76 host->dma_ops->request(host, pdata); 77 } else { 78 host->chan_tx = NULL; 79 host->chan_rx = NULL; 80 } 81 } 82 83 static inline void tmio_mmc_release_dma(struct tmio_mmc_host *host) 84 { 85 if (host->dma_ops) 86 host->dma_ops->release(host); 87 } 88 89 static inline void tmio_mmc_abort_dma(struct tmio_mmc_host *host) 90 { 91 if (host->dma_ops) 92 host->dma_ops->abort(host); 93 } 94 95 static inline void tmio_mmc_dataend_dma(struct tmio_mmc_host *host) 96 { 97 if (host->dma_ops) 98 host->dma_ops->dataend(host); 99 } 100 101 void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i) 102 { 103 host->sdcard_irq_mask &= ~(i & TMIO_MASK_IRQ); 104 sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask); 105 } 106 EXPORT_SYMBOL_GPL(tmio_mmc_enable_mmc_irqs); 107 108 void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i) 109 { 110 host->sdcard_irq_mask |= (i & TMIO_MASK_IRQ); 111 sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask); 112 } 113 EXPORT_SYMBOL_GPL(tmio_mmc_disable_mmc_irqs); 114 115 static void tmio_mmc_ack_mmc_irqs(struct tmio_mmc_host *host, u32 i) 116 { 117 sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, ~i); 118 } 119 120 static void tmio_mmc_init_sg(struct tmio_mmc_host *host, struct mmc_data *data) 121 { 122 host->sg_len = data->sg_len; 123 host->sg_ptr = data->sg; 124 host->sg_orig = data->sg; 125 host->sg_off = 0; 126 } 127 128 static int tmio_mmc_next_sg(struct tmio_mmc_host *host) 129 { 130 host->sg_ptr = sg_next(host->sg_ptr); 131 host->sg_off = 0; 132 return --host->sg_len; 133 } 134 135 #define CMDREQ_TIMEOUT 5000 136 137 static void tmio_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable) 138 { 139 struct tmio_mmc_host *host = mmc_priv(mmc); 140 141 if (enable && !host->sdio_irq_enabled) { 142 u16 sdio_status; 143 144 /* Keep device active while SDIO irq is enabled */ 145 pm_runtime_get_sync(mmc_dev(mmc)); 146 147 host->sdio_irq_enabled = true; 148 host->sdio_irq_mask = TMIO_SDIO_MASK_ALL & ~TMIO_SDIO_STAT_IOIRQ; 149 150 /* Clear obsolete interrupts before enabling */ 151 sdio_status = sd_ctrl_read16(host, CTL_SDIO_STATUS) & ~TMIO_SDIO_MASK_ALL; 152 if (host->pdata->flags & TMIO_MMC_SDIO_STATUS_SETBITS) 153 sdio_status |= TMIO_SDIO_SETBITS_MASK; 154 sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status); 155 156 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask); 157 } else if (!enable && host->sdio_irq_enabled) { 158 host->sdio_irq_mask = TMIO_SDIO_MASK_ALL; 159 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask); 160 161 host->sdio_irq_enabled = false; 162 pm_runtime_mark_last_busy(mmc_dev(mmc)); 163 pm_runtime_put_autosuspend(mmc_dev(mmc)); 164 } 165 } 166 167 static void tmio_mmc_set_bus_width(struct tmio_mmc_host *host, 168 unsigned char bus_width) 169 { 170 u16 reg = sd_ctrl_read16(host, CTL_SD_MEM_CARD_OPT) 171 & ~(CARD_OPT_WIDTH | CARD_OPT_WIDTH8); 172 173 /* reg now applies to MMC_BUS_WIDTH_4 */ 174 if (bus_width == MMC_BUS_WIDTH_1) 175 reg |= CARD_OPT_WIDTH; 176 else if (bus_width == MMC_BUS_WIDTH_8) 177 reg |= CARD_OPT_WIDTH8; 178 179 sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, reg); 180 } 181 182 static void tmio_mmc_reset(struct tmio_mmc_host *host) 183 { 184 /* FIXME - should we set stop clock reg here */ 185 sd_ctrl_write16(host, CTL_RESET_SD, 0x0000); 186 usleep_range(10000, 11000); 187 sd_ctrl_write16(host, CTL_RESET_SD, 0x0001); 188 usleep_range(10000, 11000); 189 190 tmio_mmc_abort_dma(host); 191 192 if (host->reset) 193 host->reset(host); 194 195 sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask_all); 196 host->sdcard_irq_mask = host->sdcard_irq_mask_all; 197 198 tmio_mmc_set_bus_width(host, host->mmc->ios.bus_width); 199 200 if (host->pdata->flags & TMIO_MMC_SDIO_IRQ) { 201 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask); 202 sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0001); 203 } 204 205 if (host->mmc->card) 206 mmc_retune_needed(host->mmc); 207 } 208 209 static void tmio_mmc_reset_work(struct work_struct *work) 210 { 211 struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host, 212 delayed_reset_work.work); 213 struct mmc_request *mrq; 214 unsigned long flags; 215 216 spin_lock_irqsave(&host->lock, flags); 217 mrq = host->mrq; 218 219 /* 220 * is request already finished? Since we use a non-blocking 221 * cancel_delayed_work(), it can happen, that a .set_ios() call preempts 222 * us, so, have to check for IS_ERR(host->mrq) 223 */ 224 if (IS_ERR_OR_NULL(mrq) || 225 time_is_after_jiffies(host->last_req_ts + 226 msecs_to_jiffies(CMDREQ_TIMEOUT))) { 227 spin_unlock_irqrestore(&host->lock, flags); 228 return; 229 } 230 231 dev_warn(&host->pdev->dev, 232 "timeout waiting for hardware interrupt (CMD%u)\n", 233 mrq->cmd->opcode); 234 235 if (host->data) 236 host->data->error = -ETIMEDOUT; 237 else if (host->cmd) 238 host->cmd->error = -ETIMEDOUT; 239 else 240 mrq->cmd->error = -ETIMEDOUT; 241 242 host->cmd = NULL; 243 host->data = NULL; 244 245 spin_unlock_irqrestore(&host->lock, flags); 246 247 tmio_mmc_reset(host); 248 249 /* Ready for new calls */ 250 host->mrq = NULL; 251 mmc_request_done(host->mmc, mrq); 252 } 253 254 /* These are the bitmasks the tmio chip requires to implement the MMC response 255 * types. Note that R1 and R6 are the same in this scheme. */ 256 #define APP_CMD 0x0040 257 #define RESP_NONE 0x0300 258 #define RESP_R1 0x0400 259 #define RESP_R1B 0x0500 260 #define RESP_R2 0x0600 261 #define RESP_R3 0x0700 262 #define DATA_PRESENT 0x0800 263 #define TRANSFER_READ 0x1000 264 #define TRANSFER_MULTI 0x2000 265 #define SECURITY_CMD 0x4000 266 #define NO_CMD12_ISSUE 0x4000 /* TMIO_MMC_HAVE_CMD12_CTRL */ 267 268 static int tmio_mmc_start_command(struct tmio_mmc_host *host, 269 struct mmc_command *cmd) 270 { 271 struct mmc_data *data = host->data; 272 int c = cmd->opcode; 273 274 switch (mmc_resp_type(cmd)) { 275 case MMC_RSP_NONE: c |= RESP_NONE; break; 276 case MMC_RSP_R1: 277 case MMC_RSP_R1_NO_CRC: 278 c |= RESP_R1; break; 279 case MMC_RSP_R1B: c |= RESP_R1B; break; 280 case MMC_RSP_R2: c |= RESP_R2; break; 281 case MMC_RSP_R3: c |= RESP_R3; break; 282 default: 283 pr_debug("Unknown response type %d\n", mmc_resp_type(cmd)); 284 return -EINVAL; 285 } 286 287 host->cmd = cmd; 288 289 /* FIXME - this seems to be ok commented out but the spec suggest this bit 290 * should be set when issuing app commands. 291 * if(cmd->flags & MMC_FLAG_ACMD) 292 * c |= APP_CMD; 293 */ 294 if (data) { 295 c |= DATA_PRESENT; 296 if (data->blocks > 1) { 297 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, TMIO_STOP_SEC); 298 c |= TRANSFER_MULTI; 299 300 /* 301 * Disable auto CMD12 at IO_RW_EXTENDED and 302 * SET_BLOCK_COUNT when doing multiple block transfer 303 */ 304 if ((host->pdata->flags & TMIO_MMC_HAVE_CMD12_CTRL) && 305 (cmd->opcode == SD_IO_RW_EXTENDED || host->mrq->sbc)) 306 c |= NO_CMD12_ISSUE; 307 } 308 if (data->flags & MMC_DATA_READ) 309 c |= TRANSFER_READ; 310 } 311 312 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_CMD); 313 314 /* Fire off the command */ 315 sd_ctrl_write32_as_16_and_16(host, CTL_ARG_REG, cmd->arg); 316 sd_ctrl_write16(host, CTL_SD_CMD, c); 317 318 return 0; 319 } 320 321 static void tmio_mmc_transfer_data(struct tmio_mmc_host *host, 322 unsigned short *buf, 323 unsigned int count) 324 { 325 int is_read = host->data->flags & MMC_DATA_READ; 326 u8 *buf8; 327 328 /* 329 * Transfer the data 330 */ 331 if (host->pdata->flags & TMIO_MMC_32BIT_DATA_PORT) { 332 u32 data = 0; 333 u32 *buf32 = (u32 *)buf; 334 335 if (is_read) 336 sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT, buf32, 337 count >> 2); 338 else 339 sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT, buf32, 340 count >> 2); 341 342 /* if count was multiple of 4 */ 343 if (!(count & 0x3)) 344 return; 345 346 buf32 += count >> 2; 347 count %= 4; 348 349 if (is_read) { 350 sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT, &data, 1); 351 memcpy(buf32, &data, count); 352 } else { 353 memcpy(&data, buf32, count); 354 sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT, &data, 1); 355 } 356 357 return; 358 } 359 360 if (is_read) 361 sd_ctrl_read16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1); 362 else 363 sd_ctrl_write16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1); 364 365 /* if count was even number */ 366 if (!(count & 0x1)) 367 return; 368 369 /* if count was odd number */ 370 buf8 = (u8 *)(buf + (count >> 1)); 371 372 /* 373 * FIXME 374 * 375 * driver and this function are assuming that 376 * it is used as little endian 377 */ 378 if (is_read) 379 *buf8 = sd_ctrl_read16(host, CTL_SD_DATA_PORT) & 0xff; 380 else 381 sd_ctrl_write16(host, CTL_SD_DATA_PORT, *buf8); 382 } 383 384 /* 385 * This chip always returns (at least?) as much data as you ask for. 386 * I'm unsure what happens if you ask for less than a block. This should be 387 * looked into to ensure that a funny length read doesn't hose the controller. 388 */ 389 static void tmio_mmc_pio_irq(struct tmio_mmc_host *host) 390 { 391 struct mmc_data *data = host->data; 392 void *sg_virt; 393 unsigned short *buf; 394 unsigned int count; 395 unsigned long flags; 396 397 if (host->dma_on) { 398 pr_err("PIO IRQ in DMA mode!\n"); 399 return; 400 } else if (!data) { 401 pr_debug("Spurious PIO IRQ\n"); 402 return; 403 } 404 405 sg_virt = tmio_mmc_kmap_atomic(host->sg_ptr, &flags); 406 buf = (unsigned short *)(sg_virt + host->sg_off); 407 408 count = host->sg_ptr->length - host->sg_off; 409 if (count > data->blksz) 410 count = data->blksz; 411 412 pr_debug("count: %08x offset: %08x flags %08x\n", 413 count, host->sg_off, data->flags); 414 415 /* Transfer the data */ 416 tmio_mmc_transfer_data(host, buf, count); 417 418 host->sg_off += count; 419 420 tmio_mmc_kunmap_atomic(host->sg_ptr, &flags, sg_virt); 421 422 if (host->sg_off == host->sg_ptr->length) 423 tmio_mmc_next_sg(host); 424 } 425 426 static void tmio_mmc_check_bounce_buffer(struct tmio_mmc_host *host) 427 { 428 if (host->sg_ptr == &host->bounce_sg) { 429 unsigned long flags; 430 void *sg_vaddr = tmio_mmc_kmap_atomic(host->sg_orig, &flags); 431 432 memcpy(sg_vaddr, host->bounce_buf, host->bounce_sg.length); 433 tmio_mmc_kunmap_atomic(host->sg_orig, &flags, sg_vaddr); 434 } 435 } 436 437 /* needs to be called with host->lock held */ 438 void tmio_mmc_do_data_irq(struct tmio_mmc_host *host) 439 { 440 struct mmc_data *data = host->data; 441 struct mmc_command *stop; 442 443 host->data = NULL; 444 445 if (!data) { 446 dev_warn(&host->pdev->dev, "Spurious data end IRQ\n"); 447 return; 448 } 449 stop = data->stop; 450 451 /* FIXME - return correct transfer count on errors */ 452 if (!data->error) 453 data->bytes_xfered = data->blocks * data->blksz; 454 else 455 data->bytes_xfered = 0; 456 457 pr_debug("Completed data request\n"); 458 459 /* 460 * FIXME: other drivers allow an optional stop command of any given type 461 * which we dont do, as the chip can auto generate them. 462 * Perhaps we can be smarter about when to use auto CMD12 and 463 * only issue the auto request when we know this is the desired 464 * stop command, allowing fallback to the stop command the 465 * upper layers expect. For now, we do what works. 466 */ 467 468 if (data->flags & MMC_DATA_READ) { 469 if (host->dma_on) 470 tmio_mmc_check_bounce_buffer(host); 471 dev_dbg(&host->pdev->dev, "Complete Rx request %p\n", 472 host->mrq); 473 } else { 474 dev_dbg(&host->pdev->dev, "Complete Tx request %p\n", 475 host->mrq); 476 } 477 478 if (stop && !host->mrq->sbc) { 479 if (stop->opcode != MMC_STOP_TRANSMISSION || stop->arg) 480 dev_err(&host->pdev->dev, "unsupported stop: CMD%u,0x%x. We did CMD12,0\n", 481 stop->opcode, stop->arg); 482 483 /* fill in response from auto CMD12 */ 484 stop->resp[0] = sd_ctrl_read16_and_16_as_32(host, CTL_RESPONSE); 485 486 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0); 487 } 488 489 schedule_work(&host->done); 490 } 491 EXPORT_SYMBOL_GPL(tmio_mmc_do_data_irq); 492 493 static void tmio_mmc_data_irq(struct tmio_mmc_host *host, unsigned int stat) 494 { 495 struct mmc_data *data; 496 497 spin_lock(&host->lock); 498 data = host->data; 499 500 if (!data) 501 goto out; 502 503 if (stat & TMIO_STAT_DATATIMEOUT) 504 data->error = -ETIMEDOUT; 505 else if (stat & TMIO_STAT_CRCFAIL || stat & TMIO_STAT_STOPBIT_ERR || 506 stat & TMIO_STAT_TXUNDERRUN) 507 data->error = -EILSEQ; 508 if (host->dma_on && (data->flags & MMC_DATA_WRITE)) { 509 u32 status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS); 510 bool done = false; 511 512 /* 513 * Has all data been written out yet? Testing on SuperH showed, 514 * that in most cases the first interrupt comes already with the 515 * BUSY status bit clear, but on some operations, like mount or 516 * in the beginning of a write / sync / umount, there is one 517 * DATAEND interrupt with the BUSY bit set, in this cases 518 * waiting for one more interrupt fixes the problem. 519 */ 520 if (host->pdata->flags & TMIO_MMC_HAS_IDLE_WAIT) { 521 if (status & TMIO_STAT_SCLKDIVEN) 522 done = true; 523 } else { 524 if (!(status & TMIO_STAT_CMD_BUSY)) 525 done = true; 526 } 527 528 if (done) { 529 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND); 530 tmio_mmc_dataend_dma(host); 531 } 532 } else if (host->dma_on && (data->flags & MMC_DATA_READ)) { 533 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND); 534 tmio_mmc_dataend_dma(host); 535 } else { 536 tmio_mmc_do_data_irq(host); 537 tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_READOP | TMIO_MASK_WRITEOP); 538 } 539 out: 540 spin_unlock(&host->lock); 541 } 542 543 static void tmio_mmc_cmd_irq(struct tmio_mmc_host *host, unsigned int stat) 544 { 545 struct mmc_command *cmd = host->cmd; 546 int i, addr; 547 548 spin_lock(&host->lock); 549 550 if (!host->cmd) { 551 pr_debug("Spurious CMD irq\n"); 552 goto out; 553 } 554 555 /* This controller is sicker than the PXA one. Not only do we need to 556 * drop the top 8 bits of the first response word, we also need to 557 * modify the order of the response for short response command types. 558 */ 559 560 for (i = 3, addr = CTL_RESPONSE ; i >= 0 ; i--, addr += 4) 561 cmd->resp[i] = sd_ctrl_read16_and_16_as_32(host, addr); 562 563 if (cmd->flags & MMC_RSP_136) { 564 cmd->resp[0] = (cmd->resp[0] << 8) | (cmd->resp[1] >> 24); 565 cmd->resp[1] = (cmd->resp[1] << 8) | (cmd->resp[2] >> 24); 566 cmd->resp[2] = (cmd->resp[2] << 8) | (cmd->resp[3] >> 24); 567 cmd->resp[3] <<= 8; 568 } else if (cmd->flags & MMC_RSP_R3) { 569 cmd->resp[0] = cmd->resp[3]; 570 } 571 572 if (stat & TMIO_STAT_CMDTIMEOUT) 573 cmd->error = -ETIMEDOUT; 574 else if ((stat & TMIO_STAT_CRCFAIL && cmd->flags & MMC_RSP_CRC) || 575 stat & TMIO_STAT_STOPBIT_ERR || 576 stat & TMIO_STAT_CMD_IDX_ERR) 577 cmd->error = -EILSEQ; 578 579 /* If there is data to handle we enable data IRQs here, and 580 * we will ultimatley finish the request in the data_end handler. 581 * If theres no data or we encountered an error, finish now. 582 */ 583 if (host->data && (!cmd->error || cmd->error == -EILSEQ)) { 584 if (host->data->flags & MMC_DATA_READ) { 585 if (!host->dma_on) { 586 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_READOP); 587 } else { 588 tmio_mmc_disable_mmc_irqs(host, 589 TMIO_MASK_READOP); 590 tasklet_schedule(&host->dma_issue); 591 } 592 } else { 593 if (!host->dma_on) { 594 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_WRITEOP); 595 } else { 596 tmio_mmc_disable_mmc_irqs(host, 597 TMIO_MASK_WRITEOP); 598 tasklet_schedule(&host->dma_issue); 599 } 600 } 601 } else { 602 schedule_work(&host->done); 603 } 604 605 out: 606 spin_unlock(&host->lock); 607 } 608 609 static bool __tmio_mmc_card_detect_irq(struct tmio_mmc_host *host, 610 int ireg, int status) 611 { 612 struct mmc_host *mmc = host->mmc; 613 614 /* Card insert / remove attempts */ 615 if (ireg & (TMIO_STAT_CARD_INSERT | TMIO_STAT_CARD_REMOVE)) { 616 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CARD_INSERT | 617 TMIO_STAT_CARD_REMOVE); 618 if ((((ireg & TMIO_STAT_CARD_REMOVE) && mmc->card) || 619 ((ireg & TMIO_STAT_CARD_INSERT) && !mmc->card)) && 620 !work_pending(&mmc->detect.work)) 621 mmc_detect_change(host->mmc, msecs_to_jiffies(100)); 622 return true; 623 } 624 625 return false; 626 } 627 628 static bool __tmio_mmc_sdcard_irq(struct tmio_mmc_host *host, int ireg, 629 int status) 630 { 631 /* Command completion */ 632 if (ireg & (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT)) { 633 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CMDRESPEND | 634 TMIO_STAT_CMDTIMEOUT); 635 tmio_mmc_cmd_irq(host, status); 636 return true; 637 } 638 639 /* Data transfer */ 640 if (ireg & (TMIO_STAT_RXRDY | TMIO_STAT_TXRQ)) { 641 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_RXRDY | TMIO_STAT_TXRQ); 642 tmio_mmc_pio_irq(host); 643 return true; 644 } 645 646 /* Data transfer completion */ 647 if (ireg & TMIO_STAT_DATAEND) { 648 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_DATAEND); 649 tmio_mmc_data_irq(host, status); 650 return true; 651 } 652 653 return false; 654 } 655 656 static bool __tmio_mmc_sdio_irq(struct tmio_mmc_host *host) 657 { 658 struct mmc_host *mmc = host->mmc; 659 struct tmio_mmc_data *pdata = host->pdata; 660 unsigned int ireg, status; 661 unsigned int sdio_status; 662 663 if (!(pdata->flags & TMIO_MMC_SDIO_IRQ)) 664 return false; 665 666 status = sd_ctrl_read16(host, CTL_SDIO_STATUS); 667 ireg = status & TMIO_SDIO_MASK_ALL & ~host->sdio_irq_mask; 668 669 sdio_status = status & ~TMIO_SDIO_MASK_ALL; 670 if (pdata->flags & TMIO_MMC_SDIO_STATUS_SETBITS) 671 sdio_status |= TMIO_SDIO_SETBITS_MASK; 672 673 sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status); 674 675 if (mmc->caps & MMC_CAP_SDIO_IRQ && ireg & TMIO_SDIO_STAT_IOIRQ) 676 mmc_signal_sdio_irq(mmc); 677 678 return ireg; 679 } 680 681 irqreturn_t tmio_mmc_irq(int irq, void *devid) 682 { 683 struct tmio_mmc_host *host = devid; 684 unsigned int ireg, status; 685 686 status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS); 687 ireg = status & TMIO_MASK_IRQ & ~host->sdcard_irq_mask; 688 689 /* Clear the status except the interrupt status */ 690 sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, TMIO_MASK_IRQ); 691 692 if (__tmio_mmc_card_detect_irq(host, ireg, status)) 693 return IRQ_HANDLED; 694 if (__tmio_mmc_sdcard_irq(host, ireg, status)) 695 return IRQ_HANDLED; 696 697 if (__tmio_mmc_sdio_irq(host)) 698 return IRQ_HANDLED; 699 700 return IRQ_NONE; 701 } 702 EXPORT_SYMBOL_GPL(tmio_mmc_irq); 703 704 static int tmio_mmc_start_data(struct tmio_mmc_host *host, 705 struct mmc_data *data) 706 { 707 struct tmio_mmc_data *pdata = host->pdata; 708 709 pr_debug("setup data transfer: blocksize %08x nr_blocks %d\n", 710 data->blksz, data->blocks); 711 712 /* Some hardware cannot perform 2 byte requests in 4/8 bit mode */ 713 if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_4 || 714 host->mmc->ios.bus_width == MMC_BUS_WIDTH_8) { 715 int blksz_2bytes = pdata->flags & TMIO_MMC_BLKSZ_2BYTES; 716 717 if (data->blksz < 2 || (data->blksz < 4 && !blksz_2bytes)) { 718 pr_err("%s: %d byte block unsupported in 4/8 bit mode\n", 719 mmc_hostname(host->mmc), data->blksz); 720 return -EINVAL; 721 } 722 } 723 724 tmio_mmc_init_sg(host, data); 725 host->data = data; 726 host->dma_on = false; 727 728 /* Set transfer length / blocksize */ 729 sd_ctrl_write16(host, CTL_SD_XFER_LEN, data->blksz); 730 if (host->mmc->max_blk_count >= SZ_64K) 731 sd_ctrl_write32(host, CTL_XFER_BLK_COUNT, data->blocks); 732 else 733 sd_ctrl_write16(host, CTL_XFER_BLK_COUNT, data->blocks); 734 735 tmio_mmc_start_dma(host, data); 736 737 return 0; 738 } 739 740 static void tmio_process_mrq(struct tmio_mmc_host *host, 741 struct mmc_request *mrq) 742 { 743 struct mmc_command *cmd; 744 int ret; 745 746 if (mrq->sbc && host->cmd != mrq->sbc) { 747 cmd = mrq->sbc; 748 } else { 749 cmd = mrq->cmd; 750 if (mrq->data) { 751 ret = tmio_mmc_start_data(host, mrq->data); 752 if (ret) 753 goto fail; 754 } 755 } 756 757 ret = tmio_mmc_start_command(host, cmd); 758 if (ret) 759 goto fail; 760 761 schedule_delayed_work(&host->delayed_reset_work, 762 msecs_to_jiffies(CMDREQ_TIMEOUT)); 763 return; 764 765 fail: 766 host->mrq = NULL; 767 mrq->cmd->error = ret; 768 mmc_request_done(host->mmc, mrq); 769 } 770 771 /* Process requests from the MMC layer */ 772 static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq) 773 { 774 struct tmio_mmc_host *host = mmc_priv(mmc); 775 unsigned long flags; 776 777 spin_lock_irqsave(&host->lock, flags); 778 779 if (host->mrq) { 780 pr_debug("request not null\n"); 781 if (IS_ERR(host->mrq)) { 782 spin_unlock_irqrestore(&host->lock, flags); 783 mrq->cmd->error = -EAGAIN; 784 mmc_request_done(mmc, mrq); 785 return; 786 } 787 } 788 789 host->last_req_ts = jiffies; 790 wmb(); 791 host->mrq = mrq; 792 793 spin_unlock_irqrestore(&host->lock, flags); 794 795 tmio_process_mrq(host, mrq); 796 } 797 798 static void tmio_mmc_finish_request(struct tmio_mmc_host *host) 799 { 800 struct mmc_request *mrq; 801 unsigned long flags; 802 803 spin_lock_irqsave(&host->lock, flags); 804 805 tmio_mmc_end_dma(host); 806 807 mrq = host->mrq; 808 if (IS_ERR_OR_NULL(mrq)) { 809 spin_unlock_irqrestore(&host->lock, flags); 810 return; 811 } 812 813 /* If not SET_BLOCK_COUNT, clear old data */ 814 if (host->cmd != mrq->sbc) { 815 host->cmd = NULL; 816 host->data = NULL; 817 host->mrq = NULL; 818 } 819 820 cancel_delayed_work(&host->delayed_reset_work); 821 822 spin_unlock_irqrestore(&host->lock, flags); 823 824 if (mrq->cmd->error || (mrq->data && mrq->data->error)) { 825 tmio_mmc_ack_mmc_irqs(host, TMIO_MASK_IRQ); /* Clear all */ 826 tmio_mmc_abort_dma(host); 827 } 828 829 /* Error means retune, but executed command was still successful */ 830 if (host->check_retune && host->check_retune(host, mrq)) 831 mmc_retune_needed(host->mmc); 832 833 /* If SET_BLOCK_COUNT, continue with main command */ 834 if (host->mrq && !mrq->cmd->error) { 835 tmio_process_mrq(host, mrq); 836 return; 837 } 838 839 if (host->fixup_request) 840 host->fixup_request(host, mrq); 841 842 mmc_request_done(host->mmc, mrq); 843 } 844 845 static void tmio_mmc_done_work(struct work_struct *work) 846 { 847 struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host, 848 done); 849 tmio_mmc_finish_request(host); 850 } 851 852 static void tmio_mmc_power_on(struct tmio_mmc_host *host, unsigned short vdd) 853 { 854 struct mmc_host *mmc = host->mmc; 855 int ret = 0; 856 857 /* .set_ios() is returning void, so, no chance to report an error */ 858 859 if (host->set_pwr) 860 host->set_pwr(host->pdev, 1); 861 862 if (!IS_ERR(mmc->supply.vmmc)) { 863 ret = mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, vdd); 864 /* 865 * Attention: empiric value. With a b43 WiFi SDIO card this 866 * delay proved necessary for reliable card-insertion probing. 867 * 100us were not enough. Is this the same 140us delay, as in 868 * tmio_mmc_set_ios()? 869 */ 870 usleep_range(200, 300); 871 } 872 /* 873 * It seems, VccQ should be switched on after Vcc, this is also what the 874 * omap_hsmmc.c driver does. 875 */ 876 if (!IS_ERR(mmc->supply.vqmmc) && !ret) { 877 ret = regulator_enable(mmc->supply.vqmmc); 878 usleep_range(200, 300); 879 } 880 881 if (ret < 0) 882 dev_dbg(&host->pdev->dev, "Regulators failed to power up: %d\n", 883 ret); 884 } 885 886 static void tmio_mmc_power_off(struct tmio_mmc_host *host) 887 { 888 struct mmc_host *mmc = host->mmc; 889 890 if (!IS_ERR(mmc->supply.vqmmc)) 891 regulator_disable(mmc->supply.vqmmc); 892 893 if (!IS_ERR(mmc->supply.vmmc)) 894 mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0); 895 896 if (host->set_pwr) 897 host->set_pwr(host->pdev, 0); 898 } 899 900 static unsigned int tmio_mmc_get_timeout_cycles(struct tmio_mmc_host *host) 901 { 902 u16 val = sd_ctrl_read16(host, CTL_SD_MEM_CARD_OPT); 903 904 val = (val & CARD_OPT_TOP_MASK) >> CARD_OPT_TOP_SHIFT; 905 return 1 << (13 + val); 906 } 907 908 static void tmio_mmc_max_busy_timeout(struct tmio_mmc_host *host) 909 { 910 unsigned int clk_rate = host->mmc->actual_clock ?: host->mmc->f_max; 911 912 host->mmc->max_busy_timeout = host->get_timeout_cycles(host) / 913 (clk_rate / MSEC_PER_SEC); 914 } 915 916 /* Set MMC clock / power. 917 * Note: This controller uses a simple divider scheme therefore it cannot 918 * run a MMC card at full speed (20MHz). The max clock is 24MHz on SD, but as 919 * MMC wont run that fast, it has to be clocked at 12MHz which is the next 920 * slowest setting. 921 */ 922 static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) 923 { 924 struct tmio_mmc_host *host = mmc_priv(mmc); 925 struct device *dev = &host->pdev->dev; 926 unsigned long flags; 927 928 mutex_lock(&host->ios_lock); 929 930 spin_lock_irqsave(&host->lock, flags); 931 if (host->mrq) { 932 if (IS_ERR(host->mrq)) { 933 dev_dbg(dev, 934 "%s.%d: concurrent .set_ios(), clk %u, mode %u\n", 935 current->comm, task_pid_nr(current), 936 ios->clock, ios->power_mode); 937 host->mrq = ERR_PTR(-EINTR); 938 } else { 939 dev_dbg(dev, 940 "%s.%d: CMD%u active since %lu, now %lu!\n", 941 current->comm, task_pid_nr(current), 942 host->mrq->cmd->opcode, host->last_req_ts, 943 jiffies); 944 } 945 spin_unlock_irqrestore(&host->lock, flags); 946 947 mutex_unlock(&host->ios_lock); 948 return; 949 } 950 951 host->mrq = ERR_PTR(-EBUSY); 952 953 spin_unlock_irqrestore(&host->lock, flags); 954 955 switch (ios->power_mode) { 956 case MMC_POWER_OFF: 957 tmio_mmc_power_off(host); 958 /* For R-Car Gen2+, we need to reset SDHI specific SCC */ 959 if (host->pdata->flags & TMIO_MMC_MIN_RCAR2) 960 host->reset(host); 961 host->set_clock(host, 0); 962 break; 963 case MMC_POWER_UP: 964 tmio_mmc_power_on(host, ios->vdd); 965 host->set_clock(host, ios->clock); 966 tmio_mmc_set_bus_width(host, ios->bus_width); 967 break; 968 case MMC_POWER_ON: 969 host->set_clock(host, ios->clock); 970 tmio_mmc_set_bus_width(host, ios->bus_width); 971 break; 972 } 973 974 if (host->pdata->flags & TMIO_MMC_USE_BUSY_TIMEOUT) 975 tmio_mmc_max_busy_timeout(host); 976 977 /* Let things settle. delay taken from winCE driver */ 978 usleep_range(140, 200); 979 if (PTR_ERR(host->mrq) == -EINTR) 980 dev_dbg(&host->pdev->dev, 981 "%s.%d: IOS interrupted: clk %u, mode %u", 982 current->comm, task_pid_nr(current), 983 ios->clock, ios->power_mode); 984 host->mrq = NULL; 985 986 host->clk_cache = ios->clock; 987 988 mutex_unlock(&host->ios_lock); 989 } 990 991 static int tmio_mmc_get_ro(struct mmc_host *mmc) 992 { 993 struct tmio_mmc_host *host = mmc_priv(mmc); 994 995 return !(sd_ctrl_read16_and_16_as_32(host, CTL_STATUS) & 996 TMIO_STAT_WRPROTECT); 997 } 998 999 static int tmio_mmc_get_cd(struct mmc_host *mmc) 1000 { 1001 struct tmio_mmc_host *host = mmc_priv(mmc); 1002 1003 return !!(sd_ctrl_read16_and_16_as_32(host, CTL_STATUS) & 1004 TMIO_STAT_SIGSTATE); 1005 } 1006 1007 static int tmio_multi_io_quirk(struct mmc_card *card, 1008 unsigned int direction, int blk_size) 1009 { 1010 struct tmio_mmc_host *host = mmc_priv(card->host); 1011 1012 if (host->multi_io_quirk) 1013 return host->multi_io_quirk(card, direction, blk_size); 1014 1015 return blk_size; 1016 } 1017 1018 static struct mmc_host_ops tmio_mmc_ops = { 1019 .request = tmio_mmc_request, 1020 .set_ios = tmio_mmc_set_ios, 1021 .get_ro = tmio_mmc_get_ro, 1022 .get_cd = tmio_mmc_get_cd, 1023 .enable_sdio_irq = tmio_mmc_enable_sdio_irq, 1024 .multi_io_quirk = tmio_multi_io_quirk, 1025 }; 1026 1027 static int tmio_mmc_init_ocr(struct tmio_mmc_host *host) 1028 { 1029 struct tmio_mmc_data *pdata = host->pdata; 1030 struct mmc_host *mmc = host->mmc; 1031 int err; 1032 1033 err = mmc_regulator_get_supply(mmc); 1034 if (err) 1035 return err; 1036 1037 /* use ocr_mask if no regulator */ 1038 if (!mmc->ocr_avail) 1039 mmc->ocr_avail = pdata->ocr_mask; 1040 1041 /* 1042 * try again. 1043 * There is possibility that regulator has not been probed 1044 */ 1045 if (!mmc->ocr_avail) 1046 return -EPROBE_DEFER; 1047 1048 return 0; 1049 } 1050 1051 static void tmio_mmc_of_parse(struct platform_device *pdev, 1052 struct mmc_host *mmc) 1053 { 1054 const struct device_node *np = pdev->dev.of_node; 1055 1056 if (!np) 1057 return; 1058 1059 /* 1060 * DEPRECATED: 1061 * For new platforms, please use "disable-wp" instead of 1062 * "toshiba,mmc-wrprotect-disable" 1063 */ 1064 if (of_get_property(np, "toshiba,mmc-wrprotect-disable", NULL)) 1065 mmc->caps2 |= MMC_CAP2_NO_WRITE_PROTECT; 1066 } 1067 1068 struct tmio_mmc_host *tmio_mmc_host_alloc(struct platform_device *pdev, 1069 struct tmio_mmc_data *pdata) 1070 { 1071 struct tmio_mmc_host *host; 1072 struct mmc_host *mmc; 1073 void __iomem *ctl; 1074 int ret; 1075 1076 ctl = devm_platform_ioremap_resource(pdev, 0); 1077 if (IS_ERR(ctl)) 1078 return ERR_CAST(ctl); 1079 1080 mmc = mmc_alloc_host(sizeof(struct tmio_mmc_host), &pdev->dev); 1081 if (!mmc) 1082 return ERR_PTR(-ENOMEM); 1083 1084 host = mmc_priv(mmc); 1085 host->ctl = ctl; 1086 host->mmc = mmc; 1087 host->pdev = pdev; 1088 host->pdata = pdata; 1089 host->ops = tmio_mmc_ops; 1090 mmc->ops = &host->ops; 1091 1092 ret = mmc_of_parse(host->mmc); 1093 if (ret) { 1094 host = ERR_PTR(ret); 1095 goto free; 1096 } 1097 1098 tmio_mmc_of_parse(pdev, mmc); 1099 1100 platform_set_drvdata(pdev, host); 1101 1102 return host; 1103 free: 1104 mmc_free_host(mmc); 1105 1106 return host; 1107 } 1108 EXPORT_SYMBOL_GPL(tmio_mmc_host_alloc); 1109 1110 void tmio_mmc_host_free(struct tmio_mmc_host *host) 1111 { 1112 mmc_free_host(host->mmc); 1113 } 1114 EXPORT_SYMBOL_GPL(tmio_mmc_host_free); 1115 1116 int tmio_mmc_host_probe(struct tmio_mmc_host *_host) 1117 { 1118 struct platform_device *pdev = _host->pdev; 1119 struct tmio_mmc_data *pdata = _host->pdata; 1120 struct mmc_host *mmc = _host->mmc; 1121 int ret; 1122 1123 /* 1124 * Check the sanity of mmc->f_min to prevent host->set_clock() from 1125 * looping forever... 1126 */ 1127 if (mmc->f_min == 0) 1128 return -EINVAL; 1129 1130 if (!(pdata->flags & TMIO_MMC_HAS_IDLE_WAIT)) 1131 _host->write16_hook = NULL; 1132 1133 if (pdata->flags & TMIO_MMC_USE_BUSY_TIMEOUT && !_host->get_timeout_cycles) 1134 _host->get_timeout_cycles = tmio_mmc_get_timeout_cycles; 1135 1136 _host->set_pwr = pdata->set_pwr; 1137 1138 ret = tmio_mmc_init_ocr(_host); 1139 if (ret < 0) 1140 return ret; 1141 1142 /* 1143 * Look for a card detect GPIO, if it fails with anything 1144 * else than a probe deferral, just live without it. 1145 */ 1146 ret = mmc_gpiod_request_cd(mmc, "cd", 0, false, 0); 1147 if (ret == -EPROBE_DEFER) 1148 return ret; 1149 1150 mmc->caps |= MMC_CAP_4_BIT_DATA | pdata->capabilities; 1151 mmc->caps2 |= pdata->capabilities2; 1152 mmc->max_segs = pdata->max_segs ? : 32; 1153 mmc->max_blk_size = TMIO_MAX_BLK_SIZE; 1154 mmc->max_blk_count = pdata->max_blk_count ? : 1155 (PAGE_SIZE / mmc->max_blk_size) * mmc->max_segs; 1156 mmc->max_req_size = min_t(size_t, 1157 mmc->max_blk_size * mmc->max_blk_count, 1158 dma_max_mapping_size(&pdev->dev)); 1159 mmc->max_seg_size = mmc->max_req_size; 1160 1161 if (mmc_can_gpio_ro(mmc)) 1162 _host->ops.get_ro = mmc_gpio_get_ro; 1163 1164 if (mmc_can_gpio_cd(mmc)) 1165 _host->ops.get_cd = mmc_gpio_get_cd; 1166 1167 _host->native_hotplug = !(mmc_can_gpio_cd(mmc) || 1168 mmc->caps & MMC_CAP_NEEDS_POLL || 1169 !mmc_card_is_removable(mmc)); 1170 1171 /* 1172 * While using internal tmio hardware logic for card detection, we need 1173 * to ensure it stays powered for it to work. 1174 */ 1175 if (_host->native_hotplug) 1176 pm_runtime_get_noresume(&pdev->dev); 1177 1178 _host->sdio_irq_enabled = false; 1179 if (pdata->flags & TMIO_MMC_SDIO_IRQ) 1180 _host->sdio_irq_mask = TMIO_SDIO_MASK_ALL; 1181 1182 if (!_host->sdcard_irq_mask_all) 1183 _host->sdcard_irq_mask_all = TMIO_MASK_ALL; 1184 1185 _host->set_clock(_host, 0); 1186 tmio_mmc_reset(_host); 1187 1188 if (_host->native_hotplug) 1189 tmio_mmc_enable_mmc_irqs(_host, 1190 TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT); 1191 1192 spin_lock_init(&_host->lock); 1193 mutex_init(&_host->ios_lock); 1194 1195 /* Init delayed work for request timeouts */ 1196 INIT_DELAYED_WORK(&_host->delayed_reset_work, tmio_mmc_reset_work); 1197 INIT_WORK(&_host->done, tmio_mmc_done_work); 1198 1199 /* See if we also get DMA */ 1200 tmio_mmc_request_dma(_host, pdata); 1201 1202 pm_runtime_get_noresume(&pdev->dev); 1203 pm_runtime_set_active(&pdev->dev); 1204 pm_runtime_set_autosuspend_delay(&pdev->dev, 50); 1205 pm_runtime_use_autosuspend(&pdev->dev); 1206 pm_runtime_enable(&pdev->dev); 1207 1208 ret = mmc_add_host(mmc); 1209 if (ret) 1210 goto remove_host; 1211 1212 dev_pm_qos_expose_latency_limit(&pdev->dev, 100); 1213 pm_runtime_put(&pdev->dev); 1214 1215 return 0; 1216 1217 remove_host: 1218 pm_runtime_put_noidle(&pdev->dev); 1219 tmio_mmc_host_remove(_host); 1220 return ret; 1221 } 1222 EXPORT_SYMBOL_GPL(tmio_mmc_host_probe); 1223 1224 void tmio_mmc_host_remove(struct tmio_mmc_host *host) 1225 { 1226 struct platform_device *pdev = host->pdev; 1227 struct mmc_host *mmc = host->mmc; 1228 1229 pm_runtime_get_sync(&pdev->dev); 1230 1231 if (host->pdata->flags & TMIO_MMC_SDIO_IRQ) 1232 sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0000); 1233 1234 dev_pm_qos_hide_latency_limit(&pdev->dev); 1235 1236 mmc_remove_host(mmc); 1237 cancel_work_sync(&host->done); 1238 cancel_delayed_work_sync(&host->delayed_reset_work); 1239 tmio_mmc_release_dma(host); 1240 tmio_mmc_disable_mmc_irqs(host, host->sdcard_irq_mask_all); 1241 1242 if (host->native_hotplug) 1243 pm_runtime_put_noidle(&pdev->dev); 1244 1245 pm_runtime_disable(&pdev->dev); 1246 pm_runtime_dont_use_autosuspend(&pdev->dev); 1247 pm_runtime_put_noidle(&pdev->dev); 1248 } 1249 EXPORT_SYMBOL_GPL(tmio_mmc_host_remove); 1250 1251 #ifdef CONFIG_PM 1252 static int tmio_mmc_clk_enable(struct tmio_mmc_host *host) 1253 { 1254 if (!host->clk_enable) 1255 return -ENOTSUPP; 1256 1257 return host->clk_enable(host); 1258 } 1259 1260 static void tmio_mmc_clk_disable(struct tmio_mmc_host *host) 1261 { 1262 if (host->clk_disable) 1263 host->clk_disable(host); 1264 } 1265 1266 int tmio_mmc_host_runtime_suspend(struct device *dev) 1267 { 1268 struct tmio_mmc_host *host = dev_get_drvdata(dev); 1269 1270 tmio_mmc_disable_mmc_irqs(host, host->sdcard_irq_mask_all); 1271 1272 if (host->clk_cache) 1273 host->set_clock(host, 0); 1274 1275 tmio_mmc_clk_disable(host); 1276 1277 return 0; 1278 } 1279 EXPORT_SYMBOL_GPL(tmio_mmc_host_runtime_suspend); 1280 1281 int tmio_mmc_host_runtime_resume(struct device *dev) 1282 { 1283 struct tmio_mmc_host *host = dev_get_drvdata(dev); 1284 1285 tmio_mmc_clk_enable(host); 1286 tmio_mmc_reset(host); 1287 1288 if (host->clk_cache) 1289 host->set_clock(host, host->clk_cache); 1290 1291 if (host->native_hotplug) 1292 tmio_mmc_enable_mmc_irqs(host, 1293 TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT); 1294 1295 tmio_mmc_enable_dma(host, true); 1296 1297 return 0; 1298 } 1299 EXPORT_SYMBOL_GPL(tmio_mmc_host_runtime_resume); 1300 #endif 1301 1302 MODULE_LICENSE("GPL v2"); 1303