1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Driver for the MMC / SD / SDIO IP found in: 4 * 5 * TC6393XB, TC6391XB, TC6387XB, T7L66XB, ASIC3, SH-Mobile SoCs 6 * 7 * Copyright (C) 2015-19 Renesas Electronics Corporation 8 * Copyright (C) 2016-19 Sang Engineering, Wolfram Sang 9 * Copyright (C) 2017 Horms Solutions, Simon Horman 10 * Copyright (C) 2011 Guennadi Liakhovetski 11 * Copyright (C) 2007 Ian Molton 12 * Copyright (C) 2004 Ian Molton 13 * 14 * This driver draws mainly on scattered spec sheets, Reverse engineering 15 * of the toshiba e800 SD driver and some parts of the 2.4 ASIC3 driver (4 bit 16 * support). (Further 4 bit support from a later datasheet). 17 * 18 * TODO: 19 * Investigate using a workqueue for PIO transfers 20 * Eliminate FIXMEs 21 * Better Power management 22 * Handle MMC errors better 23 * double buffer support 24 * 25 */ 26 27 #include <linux/delay.h> 28 #include <linux/device.h> 29 #include <linux/dma-mapping.h> 30 #include <linux/highmem.h> 31 #include <linux/interrupt.h> 32 #include <linux/io.h> 33 #include <linux/irq.h> 34 #include <linux/mfd/tmio.h> 35 #include <linux/mmc/card.h> 36 #include <linux/mmc/host.h> 37 #include <linux/mmc/mmc.h> 38 #include <linux/mmc/slot-gpio.h> 39 #include <linux/module.h> 40 #include <linux/pagemap.h> 41 #include <linux/platform_device.h> 42 #include <linux/pm_qos.h> 43 #include <linux/pm_runtime.h> 44 #include <linux/regulator/consumer.h> 45 #include <linux/mmc/sdio.h> 46 #include <linux/scatterlist.h> 47 #include <linux/sizes.h> 48 #include <linux/spinlock.h> 49 #include <linux/workqueue.h> 50 51 #include "tmio_mmc.h" 52 53 static inline void tmio_mmc_start_dma(struct tmio_mmc_host *host, 54 struct mmc_data *data) 55 { 56 if (host->dma_ops) 57 host->dma_ops->start(host, data); 58 } 59 60 static inline void tmio_mmc_end_dma(struct tmio_mmc_host *host) 61 { 62 if (host->dma_ops && host->dma_ops->end) 63 host->dma_ops->end(host); 64 } 65 66 static inline void tmio_mmc_enable_dma(struct tmio_mmc_host *host, bool enable) 67 { 68 if (host->dma_ops) 69 host->dma_ops->enable(host, enable); 70 } 71 72 static inline void tmio_mmc_request_dma(struct tmio_mmc_host *host, 73 struct tmio_mmc_data *pdata) 74 { 75 if (host->dma_ops) { 76 host->dma_ops->request(host, pdata); 77 } else { 78 host->chan_tx = NULL; 79 host->chan_rx = NULL; 80 } 81 } 82 83 static inline void tmio_mmc_release_dma(struct tmio_mmc_host *host) 84 { 85 if (host->dma_ops) 86 host->dma_ops->release(host); 87 } 88 89 static inline void tmio_mmc_abort_dma(struct tmio_mmc_host *host) 90 { 91 if (host->dma_ops) 92 host->dma_ops->abort(host); 93 } 94 95 static inline void tmio_mmc_dataend_dma(struct tmio_mmc_host *host) 96 { 97 if (host->dma_ops) 98 host->dma_ops->dataend(host); 99 } 100 101 void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i) 102 { 103 host->sdcard_irq_mask &= ~(i & TMIO_MASK_IRQ); 104 sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask); 105 } 106 EXPORT_SYMBOL_GPL(tmio_mmc_enable_mmc_irqs); 107 108 void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i) 109 { 110 host->sdcard_irq_mask |= (i & TMIO_MASK_IRQ); 111 sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask); 112 } 113 EXPORT_SYMBOL_GPL(tmio_mmc_disable_mmc_irqs); 114 115 static void tmio_mmc_ack_mmc_irqs(struct tmio_mmc_host *host, u32 i) 116 { 117 sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, ~i); 118 } 119 120 static void tmio_mmc_init_sg(struct tmio_mmc_host *host, struct mmc_data *data) 121 { 122 host->sg_len = data->sg_len; 123 host->sg_ptr = data->sg; 124 host->sg_orig = data->sg; 125 host->sg_off = 0; 126 } 127 128 static int tmio_mmc_next_sg(struct tmio_mmc_host *host) 129 { 130 host->sg_ptr = sg_next(host->sg_ptr); 131 host->sg_off = 0; 132 return --host->sg_len; 133 } 134 135 #define CMDREQ_TIMEOUT 5000 136 137 static void tmio_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable) 138 { 139 struct tmio_mmc_host *host = mmc_priv(mmc); 140 141 if (enable && !host->sdio_irq_enabled) { 142 u16 sdio_status; 143 144 /* Keep device active while SDIO irq is enabled */ 145 pm_runtime_get_sync(mmc_dev(mmc)); 146 147 host->sdio_irq_enabled = true; 148 host->sdio_irq_mask = TMIO_SDIO_MASK_ALL & ~TMIO_SDIO_STAT_IOIRQ; 149 150 /* Clear obsolete interrupts before enabling */ 151 sdio_status = sd_ctrl_read16(host, CTL_SDIO_STATUS) & ~TMIO_SDIO_MASK_ALL; 152 if (host->pdata->flags & TMIO_MMC_SDIO_STATUS_SETBITS) 153 sdio_status |= TMIO_SDIO_SETBITS_MASK; 154 sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status); 155 156 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask); 157 } else if (!enable && host->sdio_irq_enabled) { 158 host->sdio_irq_mask = TMIO_SDIO_MASK_ALL; 159 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask); 160 161 host->sdio_irq_enabled = false; 162 pm_runtime_mark_last_busy(mmc_dev(mmc)); 163 pm_runtime_put_autosuspend(mmc_dev(mmc)); 164 } 165 } 166 167 static void tmio_mmc_reset(struct tmio_mmc_host *host) 168 { 169 /* FIXME - should we set stop clock reg here */ 170 sd_ctrl_write16(host, CTL_RESET_SD, 0x0000); 171 usleep_range(10000, 11000); 172 sd_ctrl_write16(host, CTL_RESET_SD, 0x0001); 173 usleep_range(10000, 11000); 174 175 if (host->reset) 176 host->reset(host); 177 178 if (host->pdata->flags & TMIO_MMC_SDIO_IRQ) { 179 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask); 180 sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0001); 181 } 182 } 183 184 static void tmio_mmc_reset_work(struct work_struct *work) 185 { 186 struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host, 187 delayed_reset_work.work); 188 struct mmc_request *mrq; 189 unsigned long flags; 190 191 spin_lock_irqsave(&host->lock, flags); 192 mrq = host->mrq; 193 194 /* 195 * is request already finished? Since we use a non-blocking 196 * cancel_delayed_work(), it can happen, that a .set_ios() call preempts 197 * us, so, have to check for IS_ERR(host->mrq) 198 */ 199 if (IS_ERR_OR_NULL(mrq) || 200 time_is_after_jiffies(host->last_req_ts + 201 msecs_to_jiffies(CMDREQ_TIMEOUT))) { 202 spin_unlock_irqrestore(&host->lock, flags); 203 return; 204 } 205 206 dev_warn(&host->pdev->dev, 207 "timeout waiting for hardware interrupt (CMD%u)\n", 208 mrq->cmd->opcode); 209 210 if (host->data) 211 host->data->error = -ETIMEDOUT; 212 else if (host->cmd) 213 host->cmd->error = -ETIMEDOUT; 214 else 215 mrq->cmd->error = -ETIMEDOUT; 216 217 host->cmd = NULL; 218 host->data = NULL; 219 220 spin_unlock_irqrestore(&host->lock, flags); 221 222 tmio_mmc_reset(host); 223 224 /* Ready for new calls */ 225 host->mrq = NULL; 226 227 tmio_mmc_abort_dma(host); 228 mmc_request_done(host->mmc, mrq); 229 } 230 231 /* These are the bitmasks the tmio chip requires to implement the MMC response 232 * types. Note that R1 and R6 are the same in this scheme. */ 233 #define APP_CMD 0x0040 234 #define RESP_NONE 0x0300 235 #define RESP_R1 0x0400 236 #define RESP_R1B 0x0500 237 #define RESP_R2 0x0600 238 #define RESP_R3 0x0700 239 #define DATA_PRESENT 0x0800 240 #define TRANSFER_READ 0x1000 241 #define TRANSFER_MULTI 0x2000 242 #define SECURITY_CMD 0x4000 243 #define NO_CMD12_ISSUE 0x4000 /* TMIO_MMC_HAVE_CMD12_CTRL */ 244 245 static int tmio_mmc_start_command(struct tmio_mmc_host *host, 246 struct mmc_command *cmd) 247 { 248 struct mmc_data *data = host->data; 249 int c = cmd->opcode; 250 251 switch (mmc_resp_type(cmd)) { 252 case MMC_RSP_NONE: c |= RESP_NONE; break; 253 case MMC_RSP_R1: 254 case MMC_RSP_R1_NO_CRC: 255 c |= RESP_R1; break; 256 case MMC_RSP_R1B: c |= RESP_R1B; break; 257 case MMC_RSP_R2: c |= RESP_R2; break; 258 case MMC_RSP_R3: c |= RESP_R3; break; 259 default: 260 pr_debug("Unknown response type %d\n", mmc_resp_type(cmd)); 261 return -EINVAL; 262 } 263 264 host->cmd = cmd; 265 266 /* FIXME - this seems to be ok commented out but the spec suggest this bit 267 * should be set when issuing app commands. 268 * if(cmd->flags & MMC_FLAG_ACMD) 269 * c |= APP_CMD; 270 */ 271 if (data) { 272 c |= DATA_PRESENT; 273 if (data->blocks > 1) { 274 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, TMIO_STOP_SEC); 275 c |= TRANSFER_MULTI; 276 277 /* 278 * Disable auto CMD12 at IO_RW_EXTENDED and 279 * SET_BLOCK_COUNT when doing multiple block transfer 280 */ 281 if ((host->pdata->flags & TMIO_MMC_HAVE_CMD12_CTRL) && 282 (cmd->opcode == SD_IO_RW_EXTENDED || host->mrq->sbc)) 283 c |= NO_CMD12_ISSUE; 284 } 285 if (data->flags & MMC_DATA_READ) 286 c |= TRANSFER_READ; 287 } 288 289 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_CMD); 290 291 /* Fire off the command */ 292 sd_ctrl_write32_as_16_and_16(host, CTL_ARG_REG, cmd->arg); 293 sd_ctrl_write16(host, CTL_SD_CMD, c); 294 295 return 0; 296 } 297 298 static void tmio_mmc_transfer_data(struct tmio_mmc_host *host, 299 unsigned short *buf, 300 unsigned int count) 301 { 302 int is_read = host->data->flags & MMC_DATA_READ; 303 u8 *buf8; 304 305 /* 306 * Transfer the data 307 */ 308 if (host->pdata->flags & TMIO_MMC_32BIT_DATA_PORT) { 309 u32 data = 0; 310 u32 *buf32 = (u32 *)buf; 311 312 if (is_read) 313 sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT, buf32, 314 count >> 2); 315 else 316 sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT, buf32, 317 count >> 2); 318 319 /* if count was multiple of 4 */ 320 if (!(count & 0x3)) 321 return; 322 323 buf32 += count >> 2; 324 count %= 4; 325 326 if (is_read) { 327 sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT, &data, 1); 328 memcpy(buf32, &data, count); 329 } else { 330 memcpy(&data, buf32, count); 331 sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT, &data, 1); 332 } 333 334 return; 335 } 336 337 if (is_read) 338 sd_ctrl_read16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1); 339 else 340 sd_ctrl_write16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1); 341 342 /* if count was even number */ 343 if (!(count & 0x1)) 344 return; 345 346 /* if count was odd number */ 347 buf8 = (u8 *)(buf + (count >> 1)); 348 349 /* 350 * FIXME 351 * 352 * driver and this function are assuming that 353 * it is used as little endian 354 */ 355 if (is_read) 356 *buf8 = sd_ctrl_read16(host, CTL_SD_DATA_PORT) & 0xff; 357 else 358 sd_ctrl_write16(host, CTL_SD_DATA_PORT, *buf8); 359 } 360 361 /* 362 * This chip always returns (at least?) as much data as you ask for. 363 * I'm unsure what happens if you ask for less than a block. This should be 364 * looked into to ensure that a funny length read doesn't hose the controller. 365 */ 366 static void tmio_mmc_pio_irq(struct tmio_mmc_host *host) 367 { 368 struct mmc_data *data = host->data; 369 void *sg_virt; 370 unsigned short *buf; 371 unsigned int count; 372 unsigned long flags; 373 374 if (host->dma_on) { 375 pr_err("PIO IRQ in DMA mode!\n"); 376 return; 377 } else if (!data) { 378 pr_debug("Spurious PIO IRQ\n"); 379 return; 380 } 381 382 sg_virt = tmio_mmc_kmap_atomic(host->sg_ptr, &flags); 383 buf = (unsigned short *)(sg_virt + host->sg_off); 384 385 count = host->sg_ptr->length - host->sg_off; 386 if (count > data->blksz) 387 count = data->blksz; 388 389 pr_debug("count: %08x offset: %08x flags %08x\n", 390 count, host->sg_off, data->flags); 391 392 /* Transfer the data */ 393 tmio_mmc_transfer_data(host, buf, count); 394 395 host->sg_off += count; 396 397 tmio_mmc_kunmap_atomic(host->sg_ptr, &flags, sg_virt); 398 399 if (host->sg_off == host->sg_ptr->length) 400 tmio_mmc_next_sg(host); 401 } 402 403 static void tmio_mmc_check_bounce_buffer(struct tmio_mmc_host *host) 404 { 405 if (host->sg_ptr == &host->bounce_sg) { 406 unsigned long flags; 407 void *sg_vaddr = tmio_mmc_kmap_atomic(host->sg_orig, &flags); 408 409 memcpy(sg_vaddr, host->bounce_buf, host->bounce_sg.length); 410 tmio_mmc_kunmap_atomic(host->sg_orig, &flags, sg_vaddr); 411 } 412 } 413 414 /* needs to be called with host->lock held */ 415 void tmio_mmc_do_data_irq(struct tmio_mmc_host *host) 416 { 417 struct mmc_data *data = host->data; 418 struct mmc_command *stop; 419 420 host->data = NULL; 421 422 if (!data) { 423 dev_warn(&host->pdev->dev, "Spurious data end IRQ\n"); 424 return; 425 } 426 stop = data->stop; 427 428 /* FIXME - return correct transfer count on errors */ 429 if (!data->error) 430 data->bytes_xfered = data->blocks * data->blksz; 431 else 432 data->bytes_xfered = 0; 433 434 pr_debug("Completed data request\n"); 435 436 /* 437 * FIXME: other drivers allow an optional stop command of any given type 438 * which we dont do, as the chip can auto generate them. 439 * Perhaps we can be smarter about when to use auto CMD12 and 440 * only issue the auto request when we know this is the desired 441 * stop command, allowing fallback to the stop command the 442 * upper layers expect. For now, we do what works. 443 */ 444 445 if (data->flags & MMC_DATA_READ) { 446 if (host->dma_on) 447 tmio_mmc_check_bounce_buffer(host); 448 dev_dbg(&host->pdev->dev, "Complete Rx request %p\n", 449 host->mrq); 450 } else { 451 dev_dbg(&host->pdev->dev, "Complete Tx request %p\n", 452 host->mrq); 453 } 454 455 if (stop && !host->mrq->sbc) { 456 if (stop->opcode != MMC_STOP_TRANSMISSION || stop->arg) 457 dev_err(&host->pdev->dev, "unsupported stop: CMD%u,0x%x. We did CMD12,0\n", 458 stop->opcode, stop->arg); 459 460 /* fill in response from auto CMD12 */ 461 stop->resp[0] = sd_ctrl_read16_and_16_as_32(host, CTL_RESPONSE); 462 463 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0); 464 } 465 466 schedule_work(&host->done); 467 } 468 EXPORT_SYMBOL_GPL(tmio_mmc_do_data_irq); 469 470 static void tmio_mmc_data_irq(struct tmio_mmc_host *host, unsigned int stat) 471 { 472 struct mmc_data *data; 473 474 spin_lock(&host->lock); 475 data = host->data; 476 477 if (!data) 478 goto out; 479 480 if (stat & TMIO_STAT_CRCFAIL || stat & TMIO_STAT_STOPBIT_ERR || 481 stat & TMIO_STAT_TXUNDERRUN) 482 data->error = -EILSEQ; 483 if (host->dma_on && (data->flags & MMC_DATA_WRITE)) { 484 u32 status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS); 485 bool done = false; 486 487 /* 488 * Has all data been written out yet? Testing on SuperH showed, 489 * that in most cases the first interrupt comes already with the 490 * BUSY status bit clear, but on some operations, like mount or 491 * in the beginning of a write / sync / umount, there is one 492 * DATAEND interrupt with the BUSY bit set, in this cases 493 * waiting for one more interrupt fixes the problem. 494 */ 495 if (host->pdata->flags & TMIO_MMC_HAS_IDLE_WAIT) { 496 if (status & TMIO_STAT_SCLKDIVEN) 497 done = true; 498 } else { 499 if (!(status & TMIO_STAT_CMD_BUSY)) 500 done = true; 501 } 502 503 if (done) { 504 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND); 505 tmio_mmc_dataend_dma(host); 506 } 507 } else if (host->dma_on && (data->flags & MMC_DATA_READ)) { 508 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND); 509 tmio_mmc_dataend_dma(host); 510 } else { 511 tmio_mmc_do_data_irq(host); 512 tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_READOP | TMIO_MASK_WRITEOP); 513 } 514 out: 515 spin_unlock(&host->lock); 516 } 517 518 static void tmio_mmc_cmd_irq(struct tmio_mmc_host *host, unsigned int stat) 519 { 520 struct mmc_command *cmd = host->cmd; 521 int i, addr; 522 523 spin_lock(&host->lock); 524 525 if (!host->cmd) { 526 pr_debug("Spurious CMD irq\n"); 527 goto out; 528 } 529 530 /* This controller is sicker than the PXA one. Not only do we need to 531 * drop the top 8 bits of the first response word, we also need to 532 * modify the order of the response for short response command types. 533 */ 534 535 for (i = 3, addr = CTL_RESPONSE ; i >= 0 ; i--, addr += 4) 536 cmd->resp[i] = sd_ctrl_read16_and_16_as_32(host, addr); 537 538 if (cmd->flags & MMC_RSP_136) { 539 cmd->resp[0] = (cmd->resp[0] << 8) | (cmd->resp[1] >> 24); 540 cmd->resp[1] = (cmd->resp[1] << 8) | (cmd->resp[2] >> 24); 541 cmd->resp[2] = (cmd->resp[2] << 8) | (cmd->resp[3] >> 24); 542 cmd->resp[3] <<= 8; 543 } else if (cmd->flags & MMC_RSP_R3) { 544 cmd->resp[0] = cmd->resp[3]; 545 } 546 547 if (stat & TMIO_STAT_CMDTIMEOUT) 548 cmd->error = -ETIMEDOUT; 549 else if ((stat & TMIO_STAT_CRCFAIL && cmd->flags & MMC_RSP_CRC) || 550 stat & TMIO_STAT_STOPBIT_ERR || 551 stat & TMIO_STAT_CMD_IDX_ERR) 552 cmd->error = -EILSEQ; 553 554 /* If there is data to handle we enable data IRQs here, and 555 * we will ultimatley finish the request in the data_end handler. 556 * If theres no data or we encountered an error, finish now. 557 */ 558 if (host->data && (!cmd->error || cmd->error == -EILSEQ)) { 559 if (host->data->flags & MMC_DATA_READ) { 560 if (!host->dma_on) { 561 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_READOP); 562 } else { 563 tmio_mmc_disable_mmc_irqs(host, 564 TMIO_MASK_READOP); 565 tasklet_schedule(&host->dma_issue); 566 } 567 } else { 568 if (!host->dma_on) { 569 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_WRITEOP); 570 } else { 571 tmio_mmc_disable_mmc_irqs(host, 572 TMIO_MASK_WRITEOP); 573 tasklet_schedule(&host->dma_issue); 574 } 575 } 576 } else { 577 schedule_work(&host->done); 578 } 579 580 out: 581 spin_unlock(&host->lock); 582 } 583 584 static bool __tmio_mmc_card_detect_irq(struct tmio_mmc_host *host, 585 int ireg, int status) 586 { 587 struct mmc_host *mmc = host->mmc; 588 589 /* Card insert / remove attempts */ 590 if (ireg & (TMIO_STAT_CARD_INSERT | TMIO_STAT_CARD_REMOVE)) { 591 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CARD_INSERT | 592 TMIO_STAT_CARD_REMOVE); 593 if ((((ireg & TMIO_STAT_CARD_REMOVE) && mmc->card) || 594 ((ireg & TMIO_STAT_CARD_INSERT) && !mmc->card)) && 595 !work_pending(&mmc->detect.work)) 596 mmc_detect_change(host->mmc, msecs_to_jiffies(100)); 597 return true; 598 } 599 600 return false; 601 } 602 603 static bool __tmio_mmc_sdcard_irq(struct tmio_mmc_host *host, int ireg, 604 int status) 605 { 606 /* Command completion */ 607 if (ireg & (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT)) { 608 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CMDRESPEND | 609 TMIO_STAT_CMDTIMEOUT); 610 tmio_mmc_cmd_irq(host, status); 611 return true; 612 } 613 614 /* Data transfer */ 615 if (ireg & (TMIO_STAT_RXRDY | TMIO_STAT_TXRQ)) { 616 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_RXRDY | TMIO_STAT_TXRQ); 617 tmio_mmc_pio_irq(host); 618 return true; 619 } 620 621 /* Data transfer completion */ 622 if (ireg & TMIO_STAT_DATAEND) { 623 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_DATAEND); 624 tmio_mmc_data_irq(host, status); 625 return true; 626 } 627 628 return false; 629 } 630 631 static bool __tmio_mmc_sdio_irq(struct tmio_mmc_host *host) 632 { 633 struct mmc_host *mmc = host->mmc; 634 struct tmio_mmc_data *pdata = host->pdata; 635 unsigned int ireg, status; 636 unsigned int sdio_status; 637 638 if (!(pdata->flags & TMIO_MMC_SDIO_IRQ)) 639 return false; 640 641 status = sd_ctrl_read16(host, CTL_SDIO_STATUS); 642 ireg = status & TMIO_SDIO_MASK_ALL & ~host->sdio_irq_mask; 643 644 sdio_status = status & ~TMIO_SDIO_MASK_ALL; 645 if (pdata->flags & TMIO_MMC_SDIO_STATUS_SETBITS) 646 sdio_status |= TMIO_SDIO_SETBITS_MASK; 647 648 sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status); 649 650 if (mmc->caps & MMC_CAP_SDIO_IRQ && ireg & TMIO_SDIO_STAT_IOIRQ) 651 mmc_signal_sdio_irq(mmc); 652 653 return ireg; 654 } 655 656 irqreturn_t tmio_mmc_irq(int irq, void *devid) 657 { 658 struct tmio_mmc_host *host = devid; 659 unsigned int ireg, status; 660 661 status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS); 662 ireg = status & TMIO_MASK_IRQ & ~host->sdcard_irq_mask; 663 664 /* Clear the status except the interrupt status */ 665 sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, TMIO_MASK_IRQ); 666 667 if (__tmio_mmc_card_detect_irq(host, ireg, status)) 668 return IRQ_HANDLED; 669 if (__tmio_mmc_sdcard_irq(host, ireg, status)) 670 return IRQ_HANDLED; 671 672 if (__tmio_mmc_sdio_irq(host)) 673 return IRQ_HANDLED; 674 675 return IRQ_NONE; 676 } 677 EXPORT_SYMBOL_GPL(tmio_mmc_irq); 678 679 static int tmio_mmc_start_data(struct tmio_mmc_host *host, 680 struct mmc_data *data) 681 { 682 struct tmio_mmc_data *pdata = host->pdata; 683 684 pr_debug("setup data transfer: blocksize %08x nr_blocks %d\n", 685 data->blksz, data->blocks); 686 687 /* Some hardware cannot perform 2 byte requests in 4/8 bit mode */ 688 if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_4 || 689 host->mmc->ios.bus_width == MMC_BUS_WIDTH_8) { 690 int blksz_2bytes = pdata->flags & TMIO_MMC_BLKSZ_2BYTES; 691 692 if (data->blksz < 2 || (data->blksz < 4 && !blksz_2bytes)) { 693 pr_err("%s: %d byte block unsupported in 4/8 bit mode\n", 694 mmc_hostname(host->mmc), data->blksz); 695 return -EINVAL; 696 } 697 } 698 699 tmio_mmc_init_sg(host, data); 700 host->data = data; 701 host->dma_on = false; 702 703 /* Set transfer length / blocksize */ 704 sd_ctrl_write16(host, CTL_SD_XFER_LEN, data->blksz); 705 if (host->mmc->max_blk_count >= SZ_64K) 706 sd_ctrl_write32(host, CTL_XFER_BLK_COUNT, data->blocks); 707 else 708 sd_ctrl_write16(host, CTL_XFER_BLK_COUNT, data->blocks); 709 710 tmio_mmc_start_dma(host, data); 711 712 return 0; 713 } 714 715 static void tmio_process_mrq(struct tmio_mmc_host *host, 716 struct mmc_request *mrq) 717 { 718 struct mmc_command *cmd; 719 int ret; 720 721 if (mrq->sbc && host->cmd != mrq->sbc) { 722 cmd = mrq->sbc; 723 } else { 724 cmd = mrq->cmd; 725 if (mrq->data) { 726 ret = tmio_mmc_start_data(host, mrq->data); 727 if (ret) 728 goto fail; 729 } 730 } 731 732 ret = tmio_mmc_start_command(host, cmd); 733 if (ret) 734 goto fail; 735 736 schedule_delayed_work(&host->delayed_reset_work, 737 msecs_to_jiffies(CMDREQ_TIMEOUT)); 738 return; 739 740 fail: 741 host->mrq = NULL; 742 mrq->cmd->error = ret; 743 mmc_request_done(host->mmc, mrq); 744 } 745 746 /* Process requests from the MMC layer */ 747 static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq) 748 { 749 struct tmio_mmc_host *host = mmc_priv(mmc); 750 unsigned long flags; 751 752 spin_lock_irqsave(&host->lock, flags); 753 754 if (host->mrq) { 755 pr_debug("request not null\n"); 756 if (IS_ERR(host->mrq)) { 757 spin_unlock_irqrestore(&host->lock, flags); 758 mrq->cmd->error = -EAGAIN; 759 mmc_request_done(mmc, mrq); 760 return; 761 } 762 } 763 764 host->last_req_ts = jiffies; 765 wmb(); 766 host->mrq = mrq; 767 768 spin_unlock_irqrestore(&host->lock, flags); 769 770 tmio_process_mrq(host, mrq); 771 } 772 773 static void tmio_mmc_finish_request(struct tmio_mmc_host *host) 774 { 775 struct mmc_request *mrq; 776 unsigned long flags; 777 778 spin_lock_irqsave(&host->lock, flags); 779 780 tmio_mmc_end_dma(host); 781 782 mrq = host->mrq; 783 if (IS_ERR_OR_NULL(mrq)) { 784 spin_unlock_irqrestore(&host->lock, flags); 785 return; 786 } 787 788 /* If not SET_BLOCK_COUNT, clear old data */ 789 if (host->cmd != mrq->sbc) { 790 host->cmd = NULL; 791 host->data = NULL; 792 host->mrq = NULL; 793 } 794 795 cancel_delayed_work(&host->delayed_reset_work); 796 797 spin_unlock_irqrestore(&host->lock, flags); 798 799 if (mrq->cmd->error || (mrq->data && mrq->data->error)) 800 tmio_mmc_abort_dma(host); 801 802 /* Error means retune, but executed command was still successful */ 803 if (host->check_retune && host->check_retune(host)) 804 mmc_retune_needed(host->mmc); 805 806 /* If SET_BLOCK_COUNT, continue with main command */ 807 if (host->mrq && !mrq->cmd->error) { 808 tmio_process_mrq(host, mrq); 809 return; 810 } 811 812 if (host->fixup_request) 813 host->fixup_request(host, mrq); 814 815 mmc_request_done(host->mmc, mrq); 816 } 817 818 static void tmio_mmc_done_work(struct work_struct *work) 819 { 820 struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host, 821 done); 822 tmio_mmc_finish_request(host); 823 } 824 825 static void tmio_mmc_power_on(struct tmio_mmc_host *host, unsigned short vdd) 826 { 827 struct mmc_host *mmc = host->mmc; 828 int ret = 0; 829 830 /* .set_ios() is returning void, so, no chance to report an error */ 831 832 if (host->set_pwr) 833 host->set_pwr(host->pdev, 1); 834 835 if (!IS_ERR(mmc->supply.vmmc)) { 836 ret = mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, vdd); 837 /* 838 * Attention: empiric value. With a b43 WiFi SDIO card this 839 * delay proved necessary for reliable card-insertion probing. 840 * 100us were not enough. Is this the same 140us delay, as in 841 * tmio_mmc_set_ios()? 842 */ 843 usleep_range(200, 300); 844 } 845 /* 846 * It seems, VccQ should be switched on after Vcc, this is also what the 847 * omap_hsmmc.c driver does. 848 */ 849 if (!IS_ERR(mmc->supply.vqmmc) && !ret) { 850 ret = regulator_enable(mmc->supply.vqmmc); 851 usleep_range(200, 300); 852 } 853 854 if (ret < 0) 855 dev_dbg(&host->pdev->dev, "Regulators failed to power up: %d\n", 856 ret); 857 } 858 859 static void tmio_mmc_power_off(struct tmio_mmc_host *host) 860 { 861 struct mmc_host *mmc = host->mmc; 862 863 if (!IS_ERR(mmc->supply.vqmmc)) 864 regulator_disable(mmc->supply.vqmmc); 865 866 if (!IS_ERR(mmc->supply.vmmc)) 867 mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0); 868 869 if (host->set_pwr) 870 host->set_pwr(host->pdev, 0); 871 } 872 873 static void tmio_mmc_set_bus_width(struct tmio_mmc_host *host, 874 unsigned char bus_width) 875 { 876 u16 reg = sd_ctrl_read16(host, CTL_SD_MEM_CARD_OPT) 877 & ~(CARD_OPT_WIDTH | CARD_OPT_WIDTH8); 878 879 /* reg now applies to MMC_BUS_WIDTH_4 */ 880 if (bus_width == MMC_BUS_WIDTH_1) 881 reg |= CARD_OPT_WIDTH; 882 else if (bus_width == MMC_BUS_WIDTH_8) 883 reg |= CARD_OPT_WIDTH8; 884 885 sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, reg); 886 } 887 888 /* Set MMC clock / power. 889 * Note: This controller uses a simple divider scheme therefore it cannot 890 * run a MMC card at full speed (20MHz). The max clock is 24MHz on SD, but as 891 * MMC wont run that fast, it has to be clocked at 12MHz which is the next 892 * slowest setting. 893 */ 894 static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) 895 { 896 struct tmio_mmc_host *host = mmc_priv(mmc); 897 struct device *dev = &host->pdev->dev; 898 unsigned long flags; 899 900 mutex_lock(&host->ios_lock); 901 902 spin_lock_irqsave(&host->lock, flags); 903 if (host->mrq) { 904 if (IS_ERR(host->mrq)) { 905 dev_dbg(dev, 906 "%s.%d: concurrent .set_ios(), clk %u, mode %u\n", 907 current->comm, task_pid_nr(current), 908 ios->clock, ios->power_mode); 909 host->mrq = ERR_PTR(-EINTR); 910 } else { 911 dev_dbg(dev, 912 "%s.%d: CMD%u active since %lu, now %lu!\n", 913 current->comm, task_pid_nr(current), 914 host->mrq->cmd->opcode, host->last_req_ts, 915 jiffies); 916 } 917 spin_unlock_irqrestore(&host->lock, flags); 918 919 mutex_unlock(&host->ios_lock); 920 return; 921 } 922 923 host->mrq = ERR_PTR(-EBUSY); 924 925 spin_unlock_irqrestore(&host->lock, flags); 926 927 switch (ios->power_mode) { 928 case MMC_POWER_OFF: 929 tmio_mmc_power_off(host); 930 host->set_clock(host, 0); 931 break; 932 case MMC_POWER_UP: 933 tmio_mmc_power_on(host, ios->vdd); 934 host->set_clock(host, ios->clock); 935 tmio_mmc_set_bus_width(host, ios->bus_width); 936 break; 937 case MMC_POWER_ON: 938 host->set_clock(host, ios->clock); 939 tmio_mmc_set_bus_width(host, ios->bus_width); 940 break; 941 } 942 943 /* Let things settle. delay taken from winCE driver */ 944 usleep_range(140, 200); 945 if (PTR_ERR(host->mrq) == -EINTR) 946 dev_dbg(&host->pdev->dev, 947 "%s.%d: IOS interrupted: clk %u, mode %u", 948 current->comm, task_pid_nr(current), 949 ios->clock, ios->power_mode); 950 host->mrq = NULL; 951 952 host->clk_cache = ios->clock; 953 954 mutex_unlock(&host->ios_lock); 955 } 956 957 static int tmio_mmc_get_ro(struct mmc_host *mmc) 958 { 959 struct tmio_mmc_host *host = mmc_priv(mmc); 960 961 return !(sd_ctrl_read16_and_16_as_32(host, CTL_STATUS) & 962 TMIO_STAT_WRPROTECT); 963 } 964 965 static int tmio_mmc_get_cd(struct mmc_host *mmc) 966 { 967 struct tmio_mmc_host *host = mmc_priv(mmc); 968 969 return !!(sd_ctrl_read16_and_16_as_32(host, CTL_STATUS) & 970 TMIO_STAT_SIGSTATE); 971 } 972 973 static int tmio_multi_io_quirk(struct mmc_card *card, 974 unsigned int direction, int blk_size) 975 { 976 struct tmio_mmc_host *host = mmc_priv(card->host); 977 978 if (host->multi_io_quirk) 979 return host->multi_io_quirk(card, direction, blk_size); 980 981 return blk_size; 982 } 983 984 static struct mmc_host_ops tmio_mmc_ops = { 985 .request = tmio_mmc_request, 986 .set_ios = tmio_mmc_set_ios, 987 .get_ro = tmio_mmc_get_ro, 988 .get_cd = tmio_mmc_get_cd, 989 .enable_sdio_irq = tmio_mmc_enable_sdio_irq, 990 .multi_io_quirk = tmio_multi_io_quirk, 991 }; 992 993 static int tmio_mmc_init_ocr(struct tmio_mmc_host *host) 994 { 995 struct tmio_mmc_data *pdata = host->pdata; 996 struct mmc_host *mmc = host->mmc; 997 int err; 998 999 err = mmc_regulator_get_supply(mmc); 1000 if (err) 1001 return err; 1002 1003 /* use ocr_mask if no regulator */ 1004 if (!mmc->ocr_avail) 1005 mmc->ocr_avail = pdata->ocr_mask; 1006 1007 /* 1008 * try again. 1009 * There is possibility that regulator has not been probed 1010 */ 1011 if (!mmc->ocr_avail) 1012 return -EPROBE_DEFER; 1013 1014 return 0; 1015 } 1016 1017 static void tmio_mmc_of_parse(struct platform_device *pdev, 1018 struct mmc_host *mmc) 1019 { 1020 const struct device_node *np = pdev->dev.of_node; 1021 1022 if (!np) 1023 return; 1024 1025 /* 1026 * DEPRECATED: 1027 * For new platforms, please use "disable-wp" instead of 1028 * "toshiba,mmc-wrprotect-disable" 1029 */ 1030 if (of_get_property(np, "toshiba,mmc-wrprotect-disable", NULL)) 1031 mmc->caps2 |= MMC_CAP2_NO_WRITE_PROTECT; 1032 } 1033 1034 struct tmio_mmc_host *tmio_mmc_host_alloc(struct platform_device *pdev, 1035 struct tmio_mmc_data *pdata) 1036 { 1037 struct tmio_mmc_host *host; 1038 struct mmc_host *mmc; 1039 void __iomem *ctl; 1040 int ret; 1041 1042 ctl = devm_platform_ioremap_resource(pdev, 0); 1043 if (IS_ERR(ctl)) 1044 return ERR_CAST(ctl); 1045 1046 mmc = mmc_alloc_host(sizeof(struct tmio_mmc_host), &pdev->dev); 1047 if (!mmc) 1048 return ERR_PTR(-ENOMEM); 1049 1050 host = mmc_priv(mmc); 1051 host->ctl = ctl; 1052 host->mmc = mmc; 1053 host->pdev = pdev; 1054 host->pdata = pdata; 1055 host->ops = tmio_mmc_ops; 1056 mmc->ops = &host->ops; 1057 1058 ret = mmc_of_parse(host->mmc); 1059 if (ret) { 1060 host = ERR_PTR(ret); 1061 goto free; 1062 } 1063 1064 tmio_mmc_of_parse(pdev, mmc); 1065 1066 platform_set_drvdata(pdev, host); 1067 1068 return host; 1069 free: 1070 mmc_free_host(mmc); 1071 1072 return host; 1073 } 1074 EXPORT_SYMBOL_GPL(tmio_mmc_host_alloc); 1075 1076 void tmio_mmc_host_free(struct tmio_mmc_host *host) 1077 { 1078 mmc_free_host(host->mmc); 1079 } 1080 EXPORT_SYMBOL_GPL(tmio_mmc_host_free); 1081 1082 int tmio_mmc_host_probe(struct tmio_mmc_host *_host) 1083 { 1084 struct platform_device *pdev = _host->pdev; 1085 struct tmio_mmc_data *pdata = _host->pdata; 1086 struct mmc_host *mmc = _host->mmc; 1087 int ret; 1088 1089 /* 1090 * Check the sanity of mmc->f_min to prevent host->set_clock() from 1091 * looping forever... 1092 */ 1093 if (mmc->f_min == 0) 1094 return -EINVAL; 1095 1096 if (!(pdata->flags & TMIO_MMC_HAS_IDLE_WAIT)) 1097 _host->write16_hook = NULL; 1098 1099 _host->set_pwr = pdata->set_pwr; 1100 1101 ret = tmio_mmc_init_ocr(_host); 1102 if (ret < 0) 1103 return ret; 1104 1105 /* 1106 * Look for a card detect GPIO, if it fails with anything 1107 * else than a probe deferral, just live without it. 1108 */ 1109 ret = mmc_gpiod_request_cd(mmc, "cd", 0, false, 0); 1110 if (ret == -EPROBE_DEFER) 1111 return ret; 1112 1113 mmc->caps |= MMC_CAP_4_BIT_DATA | pdata->capabilities; 1114 mmc->caps2 |= pdata->capabilities2; 1115 mmc->max_segs = pdata->max_segs ? : 32; 1116 mmc->max_blk_size = TMIO_MAX_BLK_SIZE; 1117 mmc->max_blk_count = pdata->max_blk_count ? : 1118 (PAGE_SIZE / mmc->max_blk_size) * mmc->max_segs; 1119 mmc->max_req_size = min_t(size_t, 1120 mmc->max_blk_size * mmc->max_blk_count, 1121 dma_max_mapping_size(&pdev->dev)); 1122 mmc->max_seg_size = mmc->max_req_size; 1123 1124 if (mmc_can_gpio_ro(mmc)) 1125 _host->ops.get_ro = mmc_gpio_get_ro; 1126 1127 if (mmc_can_gpio_cd(mmc)) 1128 _host->ops.get_cd = mmc_gpio_get_cd; 1129 1130 _host->native_hotplug = !(mmc_can_gpio_cd(mmc) || 1131 mmc->caps & MMC_CAP_NEEDS_POLL || 1132 !mmc_card_is_removable(mmc)); 1133 1134 /* 1135 * On Gen2+, eMMC with NONREMOVABLE currently fails because native 1136 * hotplug gets disabled. It seems RuntimePM related yet we need further 1137 * research. Since we are planning a PM overhaul anyway, let's enforce 1138 * for now the device being active by enabling native hotplug always. 1139 */ 1140 if (pdata->flags & TMIO_MMC_MIN_RCAR2) 1141 _host->native_hotplug = true; 1142 1143 /* 1144 * While using internal tmio hardware logic for card detection, we need 1145 * to ensure it stays powered for it to work. 1146 */ 1147 if (_host->native_hotplug) 1148 pm_runtime_get_noresume(&pdev->dev); 1149 1150 _host->sdio_irq_enabled = false; 1151 if (pdata->flags & TMIO_MMC_SDIO_IRQ) 1152 _host->sdio_irq_mask = TMIO_SDIO_MASK_ALL; 1153 1154 _host->set_clock(_host, 0); 1155 tmio_mmc_reset(_host); 1156 1157 _host->sdcard_irq_mask = sd_ctrl_read16_and_16_as_32(_host, CTL_IRQ_MASK); 1158 tmio_mmc_disable_mmc_irqs(_host, TMIO_MASK_ALL); 1159 1160 if (_host->native_hotplug) 1161 tmio_mmc_enable_mmc_irqs(_host, 1162 TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT); 1163 1164 spin_lock_init(&_host->lock); 1165 mutex_init(&_host->ios_lock); 1166 1167 /* Init delayed work for request timeouts */ 1168 INIT_DELAYED_WORK(&_host->delayed_reset_work, tmio_mmc_reset_work); 1169 INIT_WORK(&_host->done, tmio_mmc_done_work); 1170 1171 /* See if we also get DMA */ 1172 tmio_mmc_request_dma(_host, pdata); 1173 1174 pm_runtime_get_noresume(&pdev->dev); 1175 pm_runtime_set_active(&pdev->dev); 1176 pm_runtime_set_autosuspend_delay(&pdev->dev, 50); 1177 pm_runtime_use_autosuspend(&pdev->dev); 1178 pm_runtime_enable(&pdev->dev); 1179 1180 ret = mmc_add_host(mmc); 1181 if (ret) 1182 goto remove_host; 1183 1184 dev_pm_qos_expose_latency_limit(&pdev->dev, 100); 1185 pm_runtime_put(&pdev->dev); 1186 1187 return 0; 1188 1189 remove_host: 1190 pm_runtime_put_noidle(&pdev->dev); 1191 tmio_mmc_host_remove(_host); 1192 return ret; 1193 } 1194 EXPORT_SYMBOL_GPL(tmio_mmc_host_probe); 1195 1196 void tmio_mmc_host_remove(struct tmio_mmc_host *host) 1197 { 1198 struct platform_device *pdev = host->pdev; 1199 struct mmc_host *mmc = host->mmc; 1200 1201 pm_runtime_get_sync(&pdev->dev); 1202 1203 if (host->pdata->flags & TMIO_MMC_SDIO_IRQ) 1204 sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0000); 1205 1206 dev_pm_qos_hide_latency_limit(&pdev->dev); 1207 1208 mmc_remove_host(mmc); 1209 cancel_work_sync(&host->done); 1210 cancel_delayed_work_sync(&host->delayed_reset_work); 1211 tmio_mmc_release_dma(host); 1212 tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_ALL); 1213 1214 if (host->native_hotplug) 1215 pm_runtime_put_noidle(&pdev->dev); 1216 1217 pm_runtime_disable(&pdev->dev); 1218 pm_runtime_dont_use_autosuspend(&pdev->dev); 1219 pm_runtime_put_noidle(&pdev->dev); 1220 } 1221 EXPORT_SYMBOL_GPL(tmio_mmc_host_remove); 1222 1223 #ifdef CONFIG_PM 1224 static int tmio_mmc_clk_enable(struct tmio_mmc_host *host) 1225 { 1226 if (!host->clk_enable) 1227 return -ENOTSUPP; 1228 1229 return host->clk_enable(host); 1230 } 1231 1232 static void tmio_mmc_clk_disable(struct tmio_mmc_host *host) 1233 { 1234 if (host->clk_disable) 1235 host->clk_disable(host); 1236 } 1237 1238 int tmio_mmc_host_runtime_suspend(struct device *dev) 1239 { 1240 struct tmio_mmc_host *host = dev_get_drvdata(dev); 1241 1242 tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_ALL); 1243 1244 if (host->clk_cache) 1245 host->set_clock(host, 0); 1246 1247 tmio_mmc_clk_disable(host); 1248 1249 return 0; 1250 } 1251 EXPORT_SYMBOL_GPL(tmio_mmc_host_runtime_suspend); 1252 1253 int tmio_mmc_host_runtime_resume(struct device *dev) 1254 { 1255 struct tmio_mmc_host *host = dev_get_drvdata(dev); 1256 1257 tmio_mmc_clk_enable(host); 1258 tmio_mmc_reset(host); 1259 1260 if (host->clk_cache) 1261 host->set_clock(host, host->clk_cache); 1262 1263 if (host->native_hotplug) 1264 tmio_mmc_enable_mmc_irqs(host, 1265 TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT); 1266 1267 tmio_mmc_enable_dma(host, true); 1268 1269 mmc_retune_needed(host->mmc); 1270 1271 return 0; 1272 } 1273 EXPORT_SYMBOL_GPL(tmio_mmc_host_runtime_resume); 1274 #endif 1275 1276 MODULE_LICENSE("GPL v2"); 1277