xref: /openbmc/linux/drivers/mmc/host/tmio_mmc_core.c (revision 05cf4fe738242183f1237f1b3a28b4479348c0a1)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Driver for the MMC / SD / SDIO IP found in:
4  *
5  * TC6393XB, TC6391XB, TC6387XB, T7L66XB, ASIC3, SH-Mobile SoCs
6  *
7  * Copyright (C) 2015-17 Renesas Electronics Corporation
8  * Copyright (C) 2016-17 Sang Engineering, Wolfram Sang
9  * Copyright (C) 2017 Horms Solutions, Simon Horman
10  * Copyright (C) 2011 Guennadi Liakhovetski
11  * Copyright (C) 2007 Ian Molton
12  * Copyright (C) 2004 Ian Molton
13  *
14  * This driver draws mainly on scattered spec sheets, Reverse engineering
15  * of the toshiba e800  SD driver and some parts of the 2.4 ASIC3 driver (4 bit
16  * support). (Further 4 bit support from a later datasheet).
17  *
18  * TODO:
19  *   Investigate using a workqueue for PIO transfers
20  *   Eliminate FIXMEs
21  *   Better Power management
22  *   Handle MMC errors better
23  *   double buffer support
24  *
25  */
26 
27 #include <linux/delay.h>
28 #include <linux/device.h>
29 #include <linux/highmem.h>
30 #include <linux/interrupt.h>
31 #include <linux/io.h>
32 #include <linux/irq.h>
33 #include <linux/mfd/tmio.h>
34 #include <linux/mmc/card.h>
35 #include <linux/mmc/host.h>
36 #include <linux/mmc/mmc.h>
37 #include <linux/mmc/slot-gpio.h>
38 #include <linux/module.h>
39 #include <linux/pagemap.h>
40 #include <linux/platform_device.h>
41 #include <linux/pm_qos.h>
42 #include <linux/pm_runtime.h>
43 #include <linux/regulator/consumer.h>
44 #include <linux/mmc/sdio.h>
45 #include <linux/scatterlist.h>
46 #include <linux/spinlock.h>
47 #include <linux/swiotlb.h>
48 #include <linux/workqueue.h>
49 
50 #include "tmio_mmc.h"
51 
52 static inline void tmio_mmc_start_dma(struct tmio_mmc_host *host,
53 				      struct mmc_data *data)
54 {
55 	if (host->dma_ops)
56 		host->dma_ops->start(host, data);
57 }
58 
59 static inline void tmio_mmc_enable_dma(struct tmio_mmc_host *host, bool enable)
60 {
61 	if (host->dma_ops)
62 		host->dma_ops->enable(host, enable);
63 }
64 
65 static inline void tmio_mmc_request_dma(struct tmio_mmc_host *host,
66 					struct tmio_mmc_data *pdata)
67 {
68 	if (host->dma_ops) {
69 		host->dma_ops->request(host, pdata);
70 	} else {
71 		host->chan_tx = NULL;
72 		host->chan_rx = NULL;
73 	}
74 }
75 
76 static inline void tmio_mmc_release_dma(struct tmio_mmc_host *host)
77 {
78 	if (host->dma_ops)
79 		host->dma_ops->release(host);
80 }
81 
82 static inline void tmio_mmc_abort_dma(struct tmio_mmc_host *host)
83 {
84 	if (host->dma_ops)
85 		host->dma_ops->abort(host);
86 }
87 
88 static inline void tmio_mmc_dataend_dma(struct tmio_mmc_host *host)
89 {
90 	if (host->dma_ops)
91 		host->dma_ops->dataend(host);
92 }
93 
94 void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
95 {
96 	host->sdcard_irq_mask &= ~(i & TMIO_MASK_IRQ);
97 	sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
98 }
99 EXPORT_SYMBOL_GPL(tmio_mmc_enable_mmc_irqs);
100 
101 void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
102 {
103 	host->sdcard_irq_mask |= (i & TMIO_MASK_IRQ);
104 	sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
105 }
106 EXPORT_SYMBOL_GPL(tmio_mmc_disable_mmc_irqs);
107 
108 static void tmio_mmc_ack_mmc_irqs(struct tmio_mmc_host *host, u32 i)
109 {
110 	sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, ~i);
111 }
112 
113 static void tmio_mmc_init_sg(struct tmio_mmc_host *host, struct mmc_data *data)
114 {
115 	host->sg_len = data->sg_len;
116 	host->sg_ptr = data->sg;
117 	host->sg_orig = data->sg;
118 	host->sg_off = 0;
119 }
120 
121 static int tmio_mmc_next_sg(struct tmio_mmc_host *host)
122 {
123 	host->sg_ptr = sg_next(host->sg_ptr);
124 	host->sg_off = 0;
125 	return --host->sg_len;
126 }
127 
128 #define CMDREQ_TIMEOUT	5000
129 
130 static void tmio_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable)
131 {
132 	struct tmio_mmc_host *host = mmc_priv(mmc);
133 
134 	if (enable && !host->sdio_irq_enabled) {
135 		u16 sdio_status;
136 
137 		/* Keep device active while SDIO irq is enabled */
138 		pm_runtime_get_sync(mmc_dev(mmc));
139 
140 		host->sdio_irq_enabled = true;
141 		host->sdio_irq_mask = TMIO_SDIO_MASK_ALL & ~TMIO_SDIO_STAT_IOIRQ;
142 
143 		/* Clear obsolete interrupts before enabling */
144 		sdio_status = sd_ctrl_read16(host, CTL_SDIO_STATUS) & ~TMIO_SDIO_MASK_ALL;
145 		if (host->pdata->flags & TMIO_MMC_SDIO_STATUS_SETBITS)
146 			sdio_status |= TMIO_SDIO_SETBITS_MASK;
147 		sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status);
148 
149 		sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
150 	} else if (!enable && host->sdio_irq_enabled) {
151 		host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
152 		sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
153 
154 		host->sdio_irq_enabled = false;
155 		pm_runtime_mark_last_busy(mmc_dev(mmc));
156 		pm_runtime_put_autosuspend(mmc_dev(mmc));
157 	}
158 }
159 
160 static void tmio_mmc_reset(struct tmio_mmc_host *host)
161 {
162 	/* FIXME - should we set stop clock reg here */
163 	sd_ctrl_write16(host, CTL_RESET_SD, 0x0000);
164 	usleep_range(10000, 11000);
165 	sd_ctrl_write16(host, CTL_RESET_SD, 0x0001);
166 	usleep_range(10000, 11000);
167 
168 	if (host->pdata->flags & TMIO_MMC_SDIO_IRQ) {
169 		sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
170 		sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0001);
171 	}
172 }
173 
174 static void tmio_mmc_reset_work(struct work_struct *work)
175 {
176 	struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
177 						  delayed_reset_work.work);
178 	struct mmc_request *mrq;
179 	unsigned long flags;
180 
181 	spin_lock_irqsave(&host->lock, flags);
182 	mrq = host->mrq;
183 
184 	/*
185 	 * is request already finished? Since we use a non-blocking
186 	 * cancel_delayed_work(), it can happen, that a .set_ios() call preempts
187 	 * us, so, have to check for IS_ERR(host->mrq)
188 	 */
189 	if (IS_ERR_OR_NULL(mrq) ||
190 	    time_is_after_jiffies(host->last_req_ts +
191 				  msecs_to_jiffies(CMDREQ_TIMEOUT))) {
192 		spin_unlock_irqrestore(&host->lock, flags);
193 		return;
194 	}
195 
196 	dev_warn(&host->pdev->dev,
197 		 "timeout waiting for hardware interrupt (CMD%u)\n",
198 		 mrq->cmd->opcode);
199 
200 	if (host->data)
201 		host->data->error = -ETIMEDOUT;
202 	else if (host->cmd)
203 		host->cmd->error = -ETIMEDOUT;
204 	else
205 		mrq->cmd->error = -ETIMEDOUT;
206 
207 	host->cmd = NULL;
208 	host->data = NULL;
209 
210 	spin_unlock_irqrestore(&host->lock, flags);
211 
212 	host->reset(host);
213 
214 	/* Ready for new calls */
215 	host->mrq = NULL;
216 
217 	tmio_mmc_abort_dma(host);
218 	mmc_request_done(host->mmc, mrq);
219 }
220 
221 /* These are the bitmasks the tmio chip requires to implement the MMC response
222  * types. Note that R1 and R6 are the same in this scheme. */
223 #define APP_CMD        0x0040
224 #define RESP_NONE      0x0300
225 #define RESP_R1        0x0400
226 #define RESP_R1B       0x0500
227 #define RESP_R2        0x0600
228 #define RESP_R3        0x0700
229 #define DATA_PRESENT   0x0800
230 #define TRANSFER_READ  0x1000
231 #define TRANSFER_MULTI 0x2000
232 #define SECURITY_CMD   0x4000
233 #define NO_CMD12_ISSUE 0x4000 /* TMIO_MMC_HAVE_CMD12_CTRL */
234 
235 static int tmio_mmc_start_command(struct tmio_mmc_host *host,
236 				  struct mmc_command *cmd)
237 {
238 	struct mmc_data *data = host->data;
239 	int c = cmd->opcode;
240 
241 	switch (mmc_resp_type(cmd)) {
242 	case MMC_RSP_NONE: c |= RESP_NONE; break;
243 	case MMC_RSP_R1:
244 	case MMC_RSP_R1_NO_CRC:
245 			   c |= RESP_R1;   break;
246 	case MMC_RSP_R1B:  c |= RESP_R1B;  break;
247 	case MMC_RSP_R2:   c |= RESP_R2;   break;
248 	case MMC_RSP_R3:   c |= RESP_R3;   break;
249 	default:
250 		pr_debug("Unknown response type %d\n", mmc_resp_type(cmd));
251 		return -EINVAL;
252 	}
253 
254 	host->cmd = cmd;
255 
256 /* FIXME - this seems to be ok commented out but the spec suggest this bit
257  *         should be set when issuing app commands.
258  *	if(cmd->flags & MMC_FLAG_ACMD)
259  *		c |= APP_CMD;
260  */
261 	if (data) {
262 		c |= DATA_PRESENT;
263 		if (data->blocks > 1) {
264 			sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, TMIO_STOP_SEC);
265 			c |= TRANSFER_MULTI;
266 
267 			/*
268 			 * Disable auto CMD12 at IO_RW_EXTENDED and
269 			 * SET_BLOCK_COUNT when doing multiple block transfer
270 			 */
271 			if ((host->pdata->flags & TMIO_MMC_HAVE_CMD12_CTRL) &&
272 			    (cmd->opcode == SD_IO_RW_EXTENDED || host->mrq->sbc))
273 				c |= NO_CMD12_ISSUE;
274 		}
275 		if (data->flags & MMC_DATA_READ)
276 			c |= TRANSFER_READ;
277 	}
278 
279 	tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_CMD);
280 
281 	/* Fire off the command */
282 	sd_ctrl_write32_as_16_and_16(host, CTL_ARG_REG, cmd->arg);
283 	sd_ctrl_write16(host, CTL_SD_CMD, c);
284 
285 	return 0;
286 }
287 
288 static void tmio_mmc_transfer_data(struct tmio_mmc_host *host,
289 				   unsigned short *buf,
290 				   unsigned int count)
291 {
292 	int is_read = host->data->flags & MMC_DATA_READ;
293 	u8  *buf8;
294 
295 	/*
296 	 * Transfer the data
297 	 */
298 	if (host->pdata->flags & TMIO_MMC_32BIT_DATA_PORT) {
299 		u32 data = 0;
300 		u32 *buf32 = (u32 *)buf;
301 
302 		if (is_read)
303 			sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT, buf32,
304 					   count >> 2);
305 		else
306 			sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT, buf32,
307 					    count >> 2);
308 
309 		/* if count was multiple of 4 */
310 		if (!(count & 0x3))
311 			return;
312 
313 		buf32 += count >> 2;
314 		count %= 4;
315 
316 		if (is_read) {
317 			sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT, &data, 1);
318 			memcpy(buf32, &data, count);
319 		} else {
320 			memcpy(&data, buf32, count);
321 			sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT, &data, 1);
322 		}
323 
324 		return;
325 	}
326 
327 	if (is_read)
328 		sd_ctrl_read16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
329 	else
330 		sd_ctrl_write16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
331 
332 	/* if count was even number */
333 	if (!(count & 0x1))
334 		return;
335 
336 	/* if count was odd number */
337 	buf8 = (u8 *)(buf + (count >> 1));
338 
339 	/*
340 	 * FIXME
341 	 *
342 	 * driver and this function are assuming that
343 	 * it is used as little endian
344 	 */
345 	if (is_read)
346 		*buf8 = sd_ctrl_read16(host, CTL_SD_DATA_PORT) & 0xff;
347 	else
348 		sd_ctrl_write16(host, CTL_SD_DATA_PORT, *buf8);
349 }
350 
351 /*
352  * This chip always returns (at least?) as much data as you ask for.
353  * I'm unsure what happens if you ask for less than a block. This should be
354  * looked into to ensure that a funny length read doesn't hose the controller.
355  */
356 static void tmio_mmc_pio_irq(struct tmio_mmc_host *host)
357 {
358 	struct mmc_data *data = host->data;
359 	void *sg_virt;
360 	unsigned short *buf;
361 	unsigned int count;
362 	unsigned long flags;
363 
364 	if (host->dma_on) {
365 		pr_err("PIO IRQ in DMA mode!\n");
366 		return;
367 	} else if (!data) {
368 		pr_debug("Spurious PIO IRQ\n");
369 		return;
370 	}
371 
372 	sg_virt = tmio_mmc_kmap_atomic(host->sg_ptr, &flags);
373 	buf = (unsigned short *)(sg_virt + host->sg_off);
374 
375 	count = host->sg_ptr->length - host->sg_off;
376 	if (count > data->blksz)
377 		count = data->blksz;
378 
379 	pr_debug("count: %08x offset: %08x flags %08x\n",
380 		 count, host->sg_off, data->flags);
381 
382 	/* Transfer the data */
383 	tmio_mmc_transfer_data(host, buf, count);
384 
385 	host->sg_off += count;
386 
387 	tmio_mmc_kunmap_atomic(host->sg_ptr, &flags, sg_virt);
388 
389 	if (host->sg_off == host->sg_ptr->length)
390 		tmio_mmc_next_sg(host);
391 }
392 
393 static void tmio_mmc_check_bounce_buffer(struct tmio_mmc_host *host)
394 {
395 	if (host->sg_ptr == &host->bounce_sg) {
396 		unsigned long flags;
397 		void *sg_vaddr = tmio_mmc_kmap_atomic(host->sg_orig, &flags);
398 
399 		memcpy(sg_vaddr, host->bounce_buf, host->bounce_sg.length);
400 		tmio_mmc_kunmap_atomic(host->sg_orig, &flags, sg_vaddr);
401 	}
402 }
403 
404 /* needs to be called with host->lock held */
405 void tmio_mmc_do_data_irq(struct tmio_mmc_host *host)
406 {
407 	struct mmc_data *data = host->data;
408 	struct mmc_command *stop;
409 
410 	host->data = NULL;
411 
412 	if (!data) {
413 		dev_warn(&host->pdev->dev, "Spurious data end IRQ\n");
414 		return;
415 	}
416 	stop = data->stop;
417 
418 	/* FIXME - return correct transfer count on errors */
419 	if (!data->error)
420 		data->bytes_xfered = data->blocks * data->blksz;
421 	else
422 		data->bytes_xfered = 0;
423 
424 	pr_debug("Completed data request\n");
425 
426 	/*
427 	 * FIXME: other drivers allow an optional stop command of any given type
428 	 *        which we dont do, as the chip can auto generate them.
429 	 *        Perhaps we can be smarter about when to use auto CMD12 and
430 	 *        only issue the auto request when we know this is the desired
431 	 *        stop command, allowing fallback to the stop command the
432 	 *        upper layers expect. For now, we do what works.
433 	 */
434 
435 	if (data->flags & MMC_DATA_READ) {
436 		if (host->dma_on)
437 			tmio_mmc_check_bounce_buffer(host);
438 		dev_dbg(&host->pdev->dev, "Complete Rx request %p\n",
439 			host->mrq);
440 	} else {
441 		dev_dbg(&host->pdev->dev, "Complete Tx request %p\n",
442 			host->mrq);
443 	}
444 
445 	if (stop && !host->mrq->sbc) {
446 		if (stop->opcode != MMC_STOP_TRANSMISSION || stop->arg)
447 			dev_err(&host->pdev->dev, "unsupported stop: CMD%u,0x%x. We did CMD12,0\n",
448 				stop->opcode, stop->arg);
449 
450 		/* fill in response from auto CMD12 */
451 		stop->resp[0] = sd_ctrl_read16_and_16_as_32(host, CTL_RESPONSE);
452 
453 		sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0);
454 	}
455 
456 	schedule_work(&host->done);
457 }
458 EXPORT_SYMBOL_GPL(tmio_mmc_do_data_irq);
459 
460 static void tmio_mmc_data_irq(struct tmio_mmc_host *host, unsigned int stat)
461 {
462 	struct mmc_data *data;
463 
464 	spin_lock(&host->lock);
465 	data = host->data;
466 
467 	if (!data)
468 		goto out;
469 
470 	if (stat & TMIO_STAT_CRCFAIL || stat & TMIO_STAT_STOPBIT_ERR ||
471 	    stat & TMIO_STAT_TXUNDERRUN)
472 		data->error = -EILSEQ;
473 	if (host->dma_on && (data->flags & MMC_DATA_WRITE)) {
474 		u32 status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS);
475 		bool done = false;
476 
477 		/*
478 		 * Has all data been written out yet? Testing on SuperH showed,
479 		 * that in most cases the first interrupt comes already with the
480 		 * BUSY status bit clear, but on some operations, like mount or
481 		 * in the beginning of a write / sync / umount, there is one
482 		 * DATAEND interrupt with the BUSY bit set, in this cases
483 		 * waiting for one more interrupt fixes the problem.
484 		 */
485 		if (host->pdata->flags & TMIO_MMC_HAS_IDLE_WAIT) {
486 			if (status & TMIO_STAT_SCLKDIVEN)
487 				done = true;
488 		} else {
489 			if (!(status & TMIO_STAT_CMD_BUSY))
490 				done = true;
491 		}
492 
493 		if (done) {
494 			tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
495 			tmio_mmc_dataend_dma(host);
496 		}
497 	} else if (host->dma_on && (data->flags & MMC_DATA_READ)) {
498 		tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
499 		tmio_mmc_dataend_dma(host);
500 	} else {
501 		tmio_mmc_do_data_irq(host);
502 		tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_READOP | TMIO_MASK_WRITEOP);
503 	}
504 out:
505 	spin_unlock(&host->lock);
506 }
507 
508 static void tmio_mmc_cmd_irq(struct tmio_mmc_host *host, unsigned int stat)
509 {
510 	struct mmc_command *cmd = host->cmd;
511 	int i, addr;
512 
513 	spin_lock(&host->lock);
514 
515 	if (!host->cmd) {
516 		pr_debug("Spurious CMD irq\n");
517 		goto out;
518 	}
519 
520 	/* This controller is sicker than the PXA one. Not only do we need to
521 	 * drop the top 8 bits of the first response word, we also need to
522 	 * modify the order of the response for short response command types.
523 	 */
524 
525 	for (i = 3, addr = CTL_RESPONSE ; i >= 0 ; i--, addr += 4)
526 		cmd->resp[i] = sd_ctrl_read16_and_16_as_32(host, addr);
527 
528 	if (cmd->flags &  MMC_RSP_136) {
529 		cmd->resp[0] = (cmd->resp[0] << 8) | (cmd->resp[1] >> 24);
530 		cmd->resp[1] = (cmd->resp[1] << 8) | (cmd->resp[2] >> 24);
531 		cmd->resp[2] = (cmd->resp[2] << 8) | (cmd->resp[3] >> 24);
532 		cmd->resp[3] <<= 8;
533 	} else if (cmd->flags & MMC_RSP_R3) {
534 		cmd->resp[0] = cmd->resp[3];
535 	}
536 
537 	if (stat & TMIO_STAT_CMDTIMEOUT)
538 		cmd->error = -ETIMEDOUT;
539 	else if ((stat & TMIO_STAT_CRCFAIL && cmd->flags & MMC_RSP_CRC) ||
540 		 stat & TMIO_STAT_STOPBIT_ERR ||
541 		 stat & TMIO_STAT_CMD_IDX_ERR)
542 		cmd->error = -EILSEQ;
543 
544 	/* If there is data to handle we enable data IRQs here, and
545 	 * we will ultimatley finish the request in the data_end handler.
546 	 * If theres no data or we encountered an error, finish now.
547 	 */
548 	if (host->data && (!cmd->error || cmd->error == -EILSEQ)) {
549 		if (host->data->flags & MMC_DATA_READ) {
550 			if (!host->dma_on) {
551 				tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_READOP);
552 			} else {
553 				tmio_mmc_disable_mmc_irqs(host,
554 							  TMIO_MASK_READOP);
555 				tasklet_schedule(&host->dma_issue);
556 			}
557 		} else {
558 			if (!host->dma_on) {
559 				tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_WRITEOP);
560 			} else {
561 				tmio_mmc_disable_mmc_irqs(host,
562 							  TMIO_MASK_WRITEOP);
563 				tasklet_schedule(&host->dma_issue);
564 			}
565 		}
566 	} else {
567 		schedule_work(&host->done);
568 	}
569 
570 out:
571 	spin_unlock(&host->lock);
572 }
573 
574 static bool __tmio_mmc_card_detect_irq(struct tmio_mmc_host *host,
575 				       int ireg, int status)
576 {
577 	struct mmc_host *mmc = host->mmc;
578 
579 	/* Card insert / remove attempts */
580 	if (ireg & (TMIO_STAT_CARD_INSERT | TMIO_STAT_CARD_REMOVE)) {
581 		tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CARD_INSERT |
582 			TMIO_STAT_CARD_REMOVE);
583 		if ((((ireg & TMIO_STAT_CARD_REMOVE) && mmc->card) ||
584 		     ((ireg & TMIO_STAT_CARD_INSERT) && !mmc->card)) &&
585 		    !work_pending(&mmc->detect.work))
586 			mmc_detect_change(host->mmc, msecs_to_jiffies(100));
587 		return true;
588 	}
589 
590 	return false;
591 }
592 
593 static bool __tmio_mmc_sdcard_irq(struct tmio_mmc_host *host, int ireg,
594 				  int status)
595 {
596 	/* Command completion */
597 	if (ireg & (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT)) {
598 		tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CMDRESPEND |
599 				      TMIO_STAT_CMDTIMEOUT);
600 		tmio_mmc_cmd_irq(host, status);
601 		return true;
602 	}
603 
604 	/* Data transfer */
605 	if (ireg & (TMIO_STAT_RXRDY | TMIO_STAT_TXRQ)) {
606 		tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_RXRDY | TMIO_STAT_TXRQ);
607 		tmio_mmc_pio_irq(host);
608 		return true;
609 	}
610 
611 	/* Data transfer completion */
612 	if (ireg & TMIO_STAT_DATAEND) {
613 		tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_DATAEND);
614 		tmio_mmc_data_irq(host, status);
615 		return true;
616 	}
617 
618 	return false;
619 }
620 
621 static void __tmio_mmc_sdio_irq(struct tmio_mmc_host *host)
622 {
623 	struct mmc_host *mmc = host->mmc;
624 	struct tmio_mmc_data *pdata = host->pdata;
625 	unsigned int ireg, status;
626 	unsigned int sdio_status;
627 
628 	if (!(pdata->flags & TMIO_MMC_SDIO_IRQ))
629 		return;
630 
631 	status = sd_ctrl_read16(host, CTL_SDIO_STATUS);
632 	ireg = status & TMIO_SDIO_MASK_ALL & ~host->sdio_irq_mask;
633 
634 	sdio_status = status & ~TMIO_SDIO_MASK_ALL;
635 	if (pdata->flags & TMIO_MMC_SDIO_STATUS_SETBITS)
636 		sdio_status |= TMIO_SDIO_SETBITS_MASK;
637 
638 	sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status);
639 
640 	if (mmc->caps & MMC_CAP_SDIO_IRQ && ireg & TMIO_SDIO_STAT_IOIRQ)
641 		mmc_signal_sdio_irq(mmc);
642 }
643 
644 irqreturn_t tmio_mmc_irq(int irq, void *devid)
645 {
646 	struct tmio_mmc_host *host = devid;
647 	unsigned int ireg, status;
648 
649 	status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS);
650 	ireg = status & TMIO_MASK_IRQ & ~host->sdcard_irq_mask;
651 
652 	/* Clear the status except the interrupt status */
653 	sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, TMIO_MASK_IRQ);
654 
655 	if (__tmio_mmc_card_detect_irq(host, ireg, status))
656 		return IRQ_HANDLED;
657 	if (__tmio_mmc_sdcard_irq(host, ireg, status))
658 		return IRQ_HANDLED;
659 
660 	__tmio_mmc_sdio_irq(host);
661 
662 	return IRQ_HANDLED;
663 }
664 EXPORT_SYMBOL_GPL(tmio_mmc_irq);
665 
666 static int tmio_mmc_start_data(struct tmio_mmc_host *host,
667 			       struct mmc_data *data)
668 {
669 	struct tmio_mmc_data *pdata = host->pdata;
670 
671 	pr_debug("setup data transfer: blocksize %08x  nr_blocks %d\n",
672 		 data->blksz, data->blocks);
673 
674 	/* Some hardware cannot perform 2 byte requests in 4/8 bit mode */
675 	if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_4 ||
676 	    host->mmc->ios.bus_width == MMC_BUS_WIDTH_8) {
677 		int blksz_2bytes = pdata->flags & TMIO_MMC_BLKSZ_2BYTES;
678 
679 		if (data->blksz < 2 || (data->blksz < 4 && !blksz_2bytes)) {
680 			pr_err("%s: %d byte block unsupported in 4/8 bit mode\n",
681 			       mmc_hostname(host->mmc), data->blksz);
682 			return -EINVAL;
683 		}
684 	}
685 
686 	tmio_mmc_init_sg(host, data);
687 	host->data = data;
688 	host->dma_on = false;
689 
690 	/* Set transfer length / blocksize */
691 	sd_ctrl_write16(host, CTL_SD_XFER_LEN, data->blksz);
692 	sd_ctrl_write16(host, CTL_XFER_BLK_COUNT, data->blocks);
693 
694 	tmio_mmc_start_dma(host, data);
695 
696 	return 0;
697 }
698 
699 static void tmio_mmc_hw_reset(struct mmc_host *mmc)
700 {
701 	struct tmio_mmc_host *host = mmc_priv(mmc);
702 
703 	if (host->hw_reset)
704 		host->hw_reset(host);
705 }
706 
707 static int tmio_mmc_execute_tuning(struct mmc_host *mmc, u32 opcode)
708 {
709 	struct tmio_mmc_host *host = mmc_priv(mmc);
710 	int i, ret = 0;
711 
712 	if (!host->init_tuning || !host->select_tuning)
713 		/* Tuning is not supported */
714 		goto out;
715 
716 	host->tap_num = host->init_tuning(host);
717 	if (!host->tap_num)
718 		/* Tuning is not supported */
719 		goto out;
720 
721 	if (host->tap_num * 2 >= sizeof(host->taps) * BITS_PER_BYTE) {
722 		dev_warn_once(&host->pdev->dev,
723 			"Too many taps, skipping tuning. Please consider updating size of taps field of tmio_mmc_host\n");
724 		goto out;
725 	}
726 
727 	bitmap_zero(host->taps, host->tap_num * 2);
728 
729 	/* Issue CMD19 twice for each tap */
730 	for (i = 0; i < 2 * host->tap_num; i++) {
731 		if (host->prepare_tuning)
732 			host->prepare_tuning(host, i % host->tap_num);
733 
734 		ret = mmc_send_tuning(mmc, opcode, NULL);
735 		if (ret == 0)
736 			set_bit(i, host->taps);
737 
738 		usleep_range(1000, 1200);
739 	}
740 
741 	ret = host->select_tuning(host);
742 
743 out:
744 	if (ret < 0) {
745 		dev_warn(&host->pdev->dev, "Tuning procedure failed\n");
746 		tmio_mmc_hw_reset(mmc);
747 	}
748 
749 	return ret;
750 }
751 
752 static void tmio_process_mrq(struct tmio_mmc_host *host,
753 			     struct mmc_request *mrq)
754 {
755 	struct mmc_command *cmd;
756 	int ret;
757 
758 	if (mrq->sbc && host->cmd != mrq->sbc) {
759 		cmd = mrq->sbc;
760 	} else {
761 		cmd = mrq->cmd;
762 		if (mrq->data) {
763 			ret = tmio_mmc_start_data(host, mrq->data);
764 			if (ret)
765 				goto fail;
766 		}
767 	}
768 
769 	ret = tmio_mmc_start_command(host, cmd);
770 	if (ret)
771 		goto fail;
772 
773 	schedule_delayed_work(&host->delayed_reset_work,
774 			      msecs_to_jiffies(CMDREQ_TIMEOUT));
775 	return;
776 
777 fail:
778 	host->mrq = NULL;
779 	mrq->cmd->error = ret;
780 	mmc_request_done(host->mmc, mrq);
781 }
782 
783 /* Process requests from the MMC layer */
784 static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
785 {
786 	struct tmio_mmc_host *host = mmc_priv(mmc);
787 	unsigned long flags;
788 
789 	spin_lock_irqsave(&host->lock, flags);
790 
791 	if (host->mrq) {
792 		pr_debug("request not null\n");
793 		if (IS_ERR(host->mrq)) {
794 			spin_unlock_irqrestore(&host->lock, flags);
795 			mrq->cmd->error = -EAGAIN;
796 			mmc_request_done(mmc, mrq);
797 			return;
798 		}
799 	}
800 
801 	host->last_req_ts = jiffies;
802 	wmb();
803 	host->mrq = mrq;
804 
805 	spin_unlock_irqrestore(&host->lock, flags);
806 
807 	tmio_process_mrq(host, mrq);
808 }
809 
810 static void tmio_mmc_finish_request(struct tmio_mmc_host *host)
811 {
812 	struct mmc_request *mrq;
813 	unsigned long flags;
814 
815 	spin_lock_irqsave(&host->lock, flags);
816 
817 	mrq = host->mrq;
818 	if (IS_ERR_OR_NULL(mrq)) {
819 		spin_unlock_irqrestore(&host->lock, flags);
820 		return;
821 	}
822 
823 	/* If not SET_BLOCK_COUNT, clear old data */
824 	if (host->cmd != mrq->sbc) {
825 		host->cmd = NULL;
826 		host->data = NULL;
827 		host->mrq = NULL;
828 	}
829 
830 	cancel_delayed_work(&host->delayed_reset_work);
831 
832 	spin_unlock_irqrestore(&host->lock, flags);
833 
834 	if (mrq->cmd->error || (mrq->data && mrq->data->error))
835 		tmio_mmc_abort_dma(host);
836 
837 	if (host->check_scc_error && host->check_scc_error(host))
838 		mrq->cmd->error = -EILSEQ;
839 
840 	/* If SET_BLOCK_COUNT, continue with main command */
841 	if (host->mrq && !mrq->cmd->error) {
842 		tmio_process_mrq(host, mrq);
843 		return;
844 	}
845 
846 	mmc_request_done(host->mmc, mrq);
847 }
848 
849 static void tmio_mmc_done_work(struct work_struct *work)
850 {
851 	struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
852 						  done);
853 	tmio_mmc_finish_request(host);
854 }
855 
856 static void tmio_mmc_power_on(struct tmio_mmc_host *host, unsigned short vdd)
857 {
858 	struct mmc_host *mmc = host->mmc;
859 	int ret = 0;
860 
861 	/* .set_ios() is returning void, so, no chance to report an error */
862 
863 	if (host->set_pwr)
864 		host->set_pwr(host->pdev, 1);
865 
866 	if (!IS_ERR(mmc->supply.vmmc)) {
867 		ret = mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, vdd);
868 		/*
869 		 * Attention: empiric value. With a b43 WiFi SDIO card this
870 		 * delay proved necessary for reliable card-insertion probing.
871 		 * 100us were not enough. Is this the same 140us delay, as in
872 		 * tmio_mmc_set_ios()?
873 		 */
874 		usleep_range(200, 300);
875 	}
876 	/*
877 	 * It seems, VccQ should be switched on after Vcc, this is also what the
878 	 * omap_hsmmc.c driver does.
879 	 */
880 	if (!IS_ERR(mmc->supply.vqmmc) && !ret) {
881 		ret = regulator_enable(mmc->supply.vqmmc);
882 		usleep_range(200, 300);
883 	}
884 
885 	if (ret < 0)
886 		dev_dbg(&host->pdev->dev, "Regulators failed to power up: %d\n",
887 			ret);
888 }
889 
890 static void tmio_mmc_power_off(struct tmio_mmc_host *host)
891 {
892 	struct mmc_host *mmc = host->mmc;
893 
894 	if (!IS_ERR(mmc->supply.vqmmc))
895 		regulator_disable(mmc->supply.vqmmc);
896 
897 	if (!IS_ERR(mmc->supply.vmmc))
898 		mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0);
899 
900 	if (host->set_pwr)
901 		host->set_pwr(host->pdev, 0);
902 }
903 
904 static void tmio_mmc_set_bus_width(struct tmio_mmc_host *host,
905 				   unsigned char bus_width)
906 {
907 	u16 reg = sd_ctrl_read16(host, CTL_SD_MEM_CARD_OPT)
908 				& ~(CARD_OPT_WIDTH | CARD_OPT_WIDTH8);
909 
910 	/* reg now applies to MMC_BUS_WIDTH_4 */
911 	if (bus_width == MMC_BUS_WIDTH_1)
912 		reg |= CARD_OPT_WIDTH;
913 	else if (bus_width == MMC_BUS_WIDTH_8)
914 		reg |= CARD_OPT_WIDTH8;
915 
916 	sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, reg);
917 }
918 
919 /* Set MMC clock / power.
920  * Note: This controller uses a simple divider scheme therefore it cannot
921  * run a MMC card at full speed (20MHz). The max clock is 24MHz on SD, but as
922  * MMC wont run that fast, it has to be clocked at 12MHz which is the next
923  * slowest setting.
924  */
925 static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
926 {
927 	struct tmio_mmc_host *host = mmc_priv(mmc);
928 	struct device *dev = &host->pdev->dev;
929 	unsigned long flags;
930 
931 	mutex_lock(&host->ios_lock);
932 
933 	spin_lock_irqsave(&host->lock, flags);
934 	if (host->mrq) {
935 		if (IS_ERR(host->mrq)) {
936 			dev_dbg(dev,
937 				"%s.%d: concurrent .set_ios(), clk %u, mode %u\n",
938 				current->comm, task_pid_nr(current),
939 				ios->clock, ios->power_mode);
940 			host->mrq = ERR_PTR(-EINTR);
941 		} else {
942 			dev_dbg(dev,
943 				"%s.%d: CMD%u active since %lu, now %lu!\n",
944 				current->comm, task_pid_nr(current),
945 				host->mrq->cmd->opcode, host->last_req_ts,
946 				jiffies);
947 		}
948 		spin_unlock_irqrestore(&host->lock, flags);
949 
950 		mutex_unlock(&host->ios_lock);
951 		return;
952 	}
953 
954 	host->mrq = ERR_PTR(-EBUSY);
955 
956 	spin_unlock_irqrestore(&host->lock, flags);
957 
958 	switch (ios->power_mode) {
959 	case MMC_POWER_OFF:
960 		tmio_mmc_power_off(host);
961 		host->set_clock(host, 0);
962 		break;
963 	case MMC_POWER_UP:
964 		tmio_mmc_power_on(host, ios->vdd);
965 		host->set_clock(host, ios->clock);
966 		tmio_mmc_set_bus_width(host, ios->bus_width);
967 		break;
968 	case MMC_POWER_ON:
969 		host->set_clock(host, ios->clock);
970 		tmio_mmc_set_bus_width(host, ios->bus_width);
971 		break;
972 	}
973 
974 	/* Let things settle. delay taken from winCE driver */
975 	usleep_range(140, 200);
976 	if (PTR_ERR(host->mrq) == -EINTR)
977 		dev_dbg(&host->pdev->dev,
978 			"%s.%d: IOS interrupted: clk %u, mode %u",
979 			current->comm, task_pid_nr(current),
980 			ios->clock, ios->power_mode);
981 	host->mrq = NULL;
982 
983 	host->clk_cache = ios->clock;
984 
985 	mutex_unlock(&host->ios_lock);
986 }
987 
988 static int tmio_mmc_get_ro(struct mmc_host *mmc)
989 {
990 	struct tmio_mmc_host *host = mmc_priv(mmc);
991 
992 	return !(sd_ctrl_read16_and_16_as_32(host, CTL_STATUS) &
993 		 TMIO_STAT_WRPROTECT);
994 }
995 
996 static int tmio_mmc_get_cd(struct mmc_host *mmc)
997 {
998 	struct tmio_mmc_host *host = mmc_priv(mmc);
999 
1000 	return !!(sd_ctrl_read16_and_16_as_32(host, CTL_STATUS) &
1001 		  TMIO_STAT_SIGSTATE);
1002 }
1003 
1004 static int tmio_multi_io_quirk(struct mmc_card *card,
1005 			       unsigned int direction, int blk_size)
1006 {
1007 	struct tmio_mmc_host *host = mmc_priv(card->host);
1008 
1009 	if (host->multi_io_quirk)
1010 		return host->multi_io_quirk(card, direction, blk_size);
1011 
1012 	return blk_size;
1013 }
1014 
1015 static int tmio_mmc_prepare_hs400_tuning(struct mmc_host *mmc,
1016 					 struct mmc_ios *ios)
1017 {
1018 	struct tmio_mmc_host *host = mmc_priv(mmc);
1019 
1020 	if (host->prepare_hs400_tuning)
1021 		host->prepare_hs400_tuning(host);
1022 
1023 	return 0;
1024 }
1025 
1026 static void tmio_mmc_hs400_downgrade(struct mmc_host *mmc)
1027 {
1028 	struct tmio_mmc_host *host = mmc_priv(mmc);
1029 
1030 	if (host->hs400_downgrade)
1031 		host->hs400_downgrade(host);
1032 }
1033 
1034 static void tmio_mmc_hs400_complete(struct mmc_host *mmc)
1035 {
1036 	struct tmio_mmc_host *host = mmc_priv(mmc);
1037 
1038 	if (host->hs400_complete)
1039 		host->hs400_complete(host);
1040 }
1041 
1042 static const struct mmc_host_ops tmio_mmc_ops = {
1043 	.request	= tmio_mmc_request,
1044 	.set_ios	= tmio_mmc_set_ios,
1045 	.get_ro         = tmio_mmc_get_ro,
1046 	.get_cd		= tmio_mmc_get_cd,
1047 	.enable_sdio_irq = tmio_mmc_enable_sdio_irq,
1048 	.multi_io_quirk	= tmio_multi_io_quirk,
1049 	.hw_reset	= tmio_mmc_hw_reset,
1050 	.execute_tuning = tmio_mmc_execute_tuning,
1051 	.prepare_hs400_tuning = tmio_mmc_prepare_hs400_tuning,
1052 	.hs400_downgrade = tmio_mmc_hs400_downgrade,
1053 	.hs400_complete	= tmio_mmc_hs400_complete,
1054 };
1055 
1056 static int tmio_mmc_init_ocr(struct tmio_mmc_host *host)
1057 {
1058 	struct tmio_mmc_data *pdata = host->pdata;
1059 	struct mmc_host *mmc = host->mmc;
1060 	int err;
1061 
1062 	err = mmc_regulator_get_supply(mmc);
1063 	if (err)
1064 		return err;
1065 
1066 	/* use ocr_mask if no regulator */
1067 	if (!mmc->ocr_avail)
1068 		mmc->ocr_avail =  pdata->ocr_mask;
1069 
1070 	/*
1071 	 * try again.
1072 	 * There is possibility that regulator has not been probed
1073 	 */
1074 	if (!mmc->ocr_avail)
1075 		return -EPROBE_DEFER;
1076 
1077 	return 0;
1078 }
1079 
1080 static void tmio_mmc_of_parse(struct platform_device *pdev,
1081 			      struct mmc_host *mmc)
1082 {
1083 	const struct device_node *np = pdev->dev.of_node;
1084 
1085 	if (!np)
1086 		return;
1087 
1088 	/*
1089 	 * DEPRECATED:
1090 	 * For new platforms, please use "disable-wp" instead of
1091 	 * "toshiba,mmc-wrprotect-disable"
1092 	 */
1093 	if (of_get_property(np, "toshiba,mmc-wrprotect-disable", NULL))
1094 		mmc->caps2 |= MMC_CAP2_NO_WRITE_PROTECT;
1095 }
1096 
1097 struct tmio_mmc_host *tmio_mmc_host_alloc(struct platform_device *pdev,
1098 					  struct tmio_mmc_data *pdata)
1099 {
1100 	struct tmio_mmc_host *host;
1101 	struct mmc_host *mmc;
1102 	struct resource *res;
1103 	void __iomem *ctl;
1104 	int ret;
1105 
1106 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1107 	ctl = devm_ioremap_resource(&pdev->dev, res);
1108 	if (IS_ERR(ctl))
1109 		return ERR_CAST(ctl);
1110 
1111 	mmc = mmc_alloc_host(sizeof(struct tmio_mmc_host), &pdev->dev);
1112 	if (!mmc)
1113 		return ERR_PTR(-ENOMEM);
1114 
1115 	host = mmc_priv(mmc);
1116 	host->ctl = ctl;
1117 	host->mmc = mmc;
1118 	host->pdev = pdev;
1119 	host->pdata = pdata;
1120 	host->ops = tmio_mmc_ops;
1121 	mmc->ops = &host->ops;
1122 
1123 	ret = mmc_of_parse(host->mmc);
1124 	if (ret) {
1125 		host = ERR_PTR(ret);
1126 		goto free;
1127 	}
1128 
1129 	tmio_mmc_of_parse(pdev, mmc);
1130 
1131 	platform_set_drvdata(pdev, host);
1132 
1133 	return host;
1134 free:
1135 	mmc_free_host(mmc);
1136 
1137 	return host;
1138 }
1139 EXPORT_SYMBOL_GPL(tmio_mmc_host_alloc);
1140 
1141 void tmio_mmc_host_free(struct tmio_mmc_host *host)
1142 {
1143 	mmc_free_host(host->mmc);
1144 }
1145 EXPORT_SYMBOL_GPL(tmio_mmc_host_free);
1146 
1147 int tmio_mmc_host_probe(struct tmio_mmc_host *_host)
1148 {
1149 	struct platform_device *pdev = _host->pdev;
1150 	struct tmio_mmc_data *pdata = _host->pdata;
1151 	struct mmc_host *mmc = _host->mmc;
1152 	int ret;
1153 
1154 	/*
1155 	 * Check the sanity of mmc->f_min to prevent host->set_clock() from
1156 	 * looping forever...
1157 	 */
1158 	if (mmc->f_min == 0)
1159 		return -EINVAL;
1160 
1161 	if (!(pdata->flags & TMIO_MMC_HAS_IDLE_WAIT))
1162 		_host->write16_hook = NULL;
1163 
1164 	_host->set_pwr = pdata->set_pwr;
1165 
1166 	ret = tmio_mmc_init_ocr(_host);
1167 	if (ret < 0)
1168 		return ret;
1169 
1170 	if (pdata->flags & TMIO_MMC_USE_GPIO_CD) {
1171 		ret = mmc_gpio_request_cd(mmc, pdata->cd_gpio, 0);
1172 		if (ret)
1173 			return ret;
1174 	}
1175 
1176 	mmc->caps |= MMC_CAP_4_BIT_DATA | pdata->capabilities;
1177 	mmc->caps2 |= pdata->capabilities2;
1178 	mmc->max_segs = pdata->max_segs ? : 32;
1179 	mmc->max_blk_size = 512;
1180 	mmc->max_blk_count = pdata->max_blk_count ? :
1181 		(PAGE_SIZE / mmc->max_blk_size) * mmc->max_segs;
1182 	mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count;
1183 	/*
1184 	 * Since swiotlb has memory size limitation, this will calculate
1185 	 * the maximum size locally (because we don't have any APIs for it now)
1186 	 * and check the current max_req_size. And then, this will update
1187 	 * the max_req_size if needed as a workaround.
1188 	 */
1189 	if (swiotlb_max_segment()) {
1190 		unsigned int max_size = (1 << IO_TLB_SHIFT) * IO_TLB_SEGSIZE;
1191 
1192 		if (mmc->max_req_size > max_size)
1193 			mmc->max_req_size = max_size;
1194 	}
1195 	mmc->max_seg_size = mmc->max_req_size;
1196 
1197 	if (mmc_can_gpio_ro(mmc))
1198 		_host->ops.get_ro = mmc_gpio_get_ro;
1199 
1200 	if (mmc_can_gpio_cd(mmc))
1201 		_host->ops.get_cd = mmc_gpio_get_cd;
1202 
1203 	_host->native_hotplug = !(mmc_can_gpio_cd(mmc) ||
1204 				  mmc->caps & MMC_CAP_NEEDS_POLL ||
1205 				  !mmc_card_is_removable(mmc));
1206 
1207 	if (!_host->reset)
1208 		_host->reset = tmio_mmc_reset;
1209 
1210 	/*
1211 	 * On Gen2+, eMMC with NONREMOVABLE currently fails because native
1212 	 * hotplug gets disabled. It seems RuntimePM related yet we need further
1213 	 * research. Since we are planning a PM overhaul anyway, let's enforce
1214 	 * for now the device being active by enabling native hotplug always.
1215 	 */
1216 	if (pdata->flags & TMIO_MMC_MIN_RCAR2)
1217 		_host->native_hotplug = true;
1218 
1219 	/*
1220 	 * While using internal tmio hardware logic for card detection, we need
1221 	 * to ensure it stays powered for it to work.
1222 	 */
1223 	if (_host->native_hotplug)
1224 		pm_runtime_get_noresume(&pdev->dev);
1225 
1226 	_host->sdio_irq_enabled = false;
1227 	if (pdata->flags & TMIO_MMC_SDIO_IRQ)
1228 		_host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
1229 
1230 	_host->set_clock(_host, 0);
1231 	_host->reset(_host);
1232 
1233 	_host->sdcard_irq_mask = sd_ctrl_read16_and_16_as_32(_host, CTL_IRQ_MASK);
1234 	tmio_mmc_disable_mmc_irqs(_host, TMIO_MASK_ALL);
1235 
1236 	if (_host->native_hotplug)
1237 		tmio_mmc_enable_mmc_irqs(_host,
1238 				TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT);
1239 
1240 	spin_lock_init(&_host->lock);
1241 	mutex_init(&_host->ios_lock);
1242 
1243 	/* Init delayed work for request timeouts */
1244 	INIT_DELAYED_WORK(&_host->delayed_reset_work, tmio_mmc_reset_work);
1245 	INIT_WORK(&_host->done, tmio_mmc_done_work);
1246 
1247 	/* See if we also get DMA */
1248 	tmio_mmc_request_dma(_host, pdata);
1249 
1250 	pm_runtime_set_active(&pdev->dev);
1251 	pm_runtime_set_autosuspend_delay(&pdev->dev, 50);
1252 	pm_runtime_use_autosuspend(&pdev->dev);
1253 	pm_runtime_enable(&pdev->dev);
1254 
1255 	ret = mmc_add_host(mmc);
1256 	if (ret)
1257 		goto remove_host;
1258 
1259 	dev_pm_qos_expose_latency_limit(&pdev->dev, 100);
1260 
1261 	return 0;
1262 
1263 remove_host:
1264 	tmio_mmc_host_remove(_host);
1265 	return ret;
1266 }
1267 EXPORT_SYMBOL_GPL(tmio_mmc_host_probe);
1268 
1269 void tmio_mmc_host_remove(struct tmio_mmc_host *host)
1270 {
1271 	struct platform_device *pdev = host->pdev;
1272 	struct mmc_host *mmc = host->mmc;
1273 
1274 	if (host->pdata->flags & TMIO_MMC_SDIO_IRQ)
1275 		sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0000);
1276 
1277 	if (!host->native_hotplug)
1278 		pm_runtime_get_sync(&pdev->dev);
1279 
1280 	dev_pm_qos_hide_latency_limit(&pdev->dev);
1281 
1282 	mmc_remove_host(mmc);
1283 	cancel_work_sync(&host->done);
1284 	cancel_delayed_work_sync(&host->delayed_reset_work);
1285 	tmio_mmc_release_dma(host);
1286 
1287 	pm_runtime_put_sync(&pdev->dev);
1288 	pm_runtime_disable(&pdev->dev);
1289 }
1290 EXPORT_SYMBOL_GPL(tmio_mmc_host_remove);
1291 
1292 #ifdef CONFIG_PM
1293 static int tmio_mmc_clk_enable(struct tmio_mmc_host *host)
1294 {
1295 	if (!host->clk_enable)
1296 		return -ENOTSUPP;
1297 
1298 	return host->clk_enable(host);
1299 }
1300 
1301 static void tmio_mmc_clk_disable(struct tmio_mmc_host *host)
1302 {
1303 	if (host->clk_disable)
1304 		host->clk_disable(host);
1305 }
1306 
1307 int tmio_mmc_host_runtime_suspend(struct device *dev)
1308 {
1309 	struct tmio_mmc_host *host = dev_get_drvdata(dev);
1310 
1311 	tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_ALL);
1312 
1313 	if (host->clk_cache)
1314 		host->set_clock(host, 0);
1315 
1316 	tmio_mmc_clk_disable(host);
1317 
1318 	return 0;
1319 }
1320 EXPORT_SYMBOL_GPL(tmio_mmc_host_runtime_suspend);
1321 
1322 static bool tmio_mmc_can_retune(struct tmio_mmc_host *host)
1323 {
1324 	return host->tap_num && mmc_can_retune(host->mmc);
1325 }
1326 
1327 int tmio_mmc_host_runtime_resume(struct device *dev)
1328 {
1329 	struct tmio_mmc_host *host = dev_get_drvdata(dev);
1330 
1331 	host->reset(host);
1332 	tmio_mmc_clk_enable(host);
1333 
1334 	if (host->clk_cache)
1335 		host->set_clock(host, host->clk_cache);
1336 
1337 	if (host->native_hotplug)
1338 		tmio_mmc_enable_mmc_irqs(host,
1339 				TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT);
1340 
1341 	tmio_mmc_enable_dma(host, true);
1342 
1343 	if (tmio_mmc_can_retune(host) && host->select_tuning(host))
1344 		dev_warn(&host->pdev->dev, "Tuning selection failed\n");
1345 
1346 	return 0;
1347 }
1348 EXPORT_SYMBOL_GPL(tmio_mmc_host_runtime_resume);
1349 #endif
1350 
1351 MODULE_LICENSE("GPL v2");
1352