1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Driver for the MMC / SD / SDIO cell found in: 4 * 5 * TC6393XB TC6391XB TC6387XB T7L66XB ASIC3 6 * 7 * Copyright (C) 2015-19 Renesas Electronics Corporation 8 * Copyright (C) 2016-19 Sang Engineering, Wolfram Sang 9 * Copyright (C) 2016-17 Horms Solutions, Simon Horman 10 * Copyright (C) 2007 Ian Molton 11 * Copyright (C) 2004 Ian Molton 12 */ 13 14 #ifndef TMIO_MMC_H 15 #define TMIO_MMC_H 16 17 #include <linux/dmaengine.h> 18 #include <linux/highmem.h> 19 #include <linux/mutex.h> 20 #include <linux/pagemap.h> 21 #include <linux/scatterlist.h> 22 #include <linux/spinlock.h> 23 #include <linux/interrupt.h> 24 25 #define CTL_SD_CMD 0x00 26 #define CTL_ARG_REG 0x04 27 #define CTL_STOP_INTERNAL_ACTION 0x08 28 #define CTL_XFER_BLK_COUNT 0xa 29 #define CTL_RESPONSE 0x0c 30 /* driver merges STATUS and following STATUS2 */ 31 #define CTL_STATUS 0x1c 32 /* driver merges IRQ_MASK and following IRQ_MASK2 */ 33 #define CTL_IRQ_MASK 0x20 34 #define CTL_SD_CARD_CLK_CTL 0x24 35 #define CTL_SD_XFER_LEN 0x26 36 #define CTL_SD_MEM_CARD_OPT 0x28 37 #define CTL_SD_ERROR_DETAIL_STATUS 0x2c 38 #define CTL_SD_DATA_PORT 0x30 39 #define CTL_TRANSACTION_CTL 0x34 40 #define CTL_SDIO_STATUS 0x36 41 #define CTL_SDIO_IRQ_MASK 0x38 42 #define CTL_DMA_ENABLE 0xd8 43 #define CTL_RESET_SD 0xe0 44 #define CTL_VERSION 0xe2 45 46 /* Definitions for values the CTL_STOP_INTERNAL_ACTION register can take */ 47 #define TMIO_STOP_STP BIT(0) 48 #define TMIO_STOP_SEC BIT(8) 49 50 /* Definitions for values the CTL_STATUS register can take */ 51 #define TMIO_STAT_CMDRESPEND BIT(0) 52 #define TMIO_STAT_DATAEND BIT(2) 53 #define TMIO_STAT_CARD_REMOVE BIT(3) 54 #define TMIO_STAT_CARD_INSERT BIT(4) 55 #define TMIO_STAT_SIGSTATE BIT(5) 56 #define TMIO_STAT_WRPROTECT BIT(7) 57 #define TMIO_STAT_CARD_REMOVE_A BIT(8) 58 #define TMIO_STAT_CARD_INSERT_A BIT(9) 59 #define TMIO_STAT_SIGSTATE_A BIT(10) 60 61 /* These belong technically to CTL_STATUS2, but the driver merges them */ 62 #define TMIO_STAT_CMD_IDX_ERR BIT(16) 63 #define TMIO_STAT_CRCFAIL BIT(17) 64 #define TMIO_STAT_STOPBIT_ERR BIT(18) 65 #define TMIO_STAT_DATATIMEOUT BIT(19) 66 #define TMIO_STAT_RXOVERFLOW BIT(20) 67 #define TMIO_STAT_TXUNDERRUN BIT(21) 68 #define TMIO_STAT_CMDTIMEOUT BIT(22) 69 #define TMIO_STAT_DAT0 BIT(23) /* only known on R-Car so far */ 70 #define TMIO_STAT_RXRDY BIT(24) 71 #define TMIO_STAT_TXRQ BIT(25) 72 #define TMIO_STAT_ALWAYS_SET_27 BIT(27) /* only known on R-Car 2+ so far */ 73 #define TMIO_STAT_ILL_FUNC BIT(29) /* only when !TMIO_MMC_HAS_IDLE_WAIT */ 74 #define TMIO_STAT_SCLKDIVEN BIT(29) /* only when TMIO_MMC_HAS_IDLE_WAIT */ 75 #define TMIO_STAT_CMD_BUSY BIT(30) 76 #define TMIO_STAT_ILL_ACCESS BIT(31) 77 78 /* Definitions for values the CTL_SD_CARD_CLK_CTL register can take */ 79 #define CLK_CTL_DIV_MASK 0xff 80 #define CLK_CTL_SCLKEN BIT(8) 81 82 /* Definitions for values the CTL_SD_MEM_CARD_OPT register can take */ 83 #define CARD_OPT_TOP_MASK 0xf0 84 #define CARD_OPT_TOP_SHIFT 4 85 #define CARD_OPT_EXTOP BIT(9) /* first appeared on R-Car Gen3 SDHI */ 86 #define CARD_OPT_WIDTH8 BIT(13) 87 #define CARD_OPT_ALWAYS1 BIT(14) 88 #define CARD_OPT_WIDTH BIT(15) 89 90 /* Definitions for values the CTL_SDIO_STATUS register can take */ 91 #define TMIO_SDIO_STAT_IOIRQ 0x0001 92 #define TMIO_SDIO_STAT_EXPUB52 0x4000 93 #define TMIO_SDIO_STAT_EXWT 0x8000 94 #define TMIO_SDIO_MASK_ALL 0xc007 95 96 #define TMIO_SDIO_SETBITS_MASK 0x0006 97 98 /* Definitions for values the CTL_DMA_ENABLE register can take */ 99 #define DMA_ENABLE_DMASDRW BIT(1) 100 101 /* Define some IRQ masks */ 102 /* This is the mask used at reset by the chip */ 103 #define TMIO_MASK_ALL 0x837f031d 104 #define TMIO_MASK_ALL_RCAR2 0x8b7f031d 105 #define TMIO_MASK_READOP (TMIO_STAT_RXRDY | TMIO_STAT_DATAEND) 106 #define TMIO_MASK_WRITEOP (TMIO_STAT_TXRQ | TMIO_STAT_DATAEND) 107 #define TMIO_MASK_CMD (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT | \ 108 TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT) 109 #define TMIO_MASK_IRQ (TMIO_MASK_READOP | TMIO_MASK_WRITEOP | TMIO_MASK_CMD) 110 111 #define TMIO_MAX_BLK_SIZE 512 112 113 struct tmio_mmc_data; 114 struct tmio_mmc_host; 115 116 struct tmio_mmc_dma_ops { 117 void (*start)(struct tmio_mmc_host *host, struct mmc_data *data); 118 void (*enable)(struct tmio_mmc_host *host, bool enable); 119 void (*request)(struct tmio_mmc_host *host, 120 struct tmio_mmc_data *pdata); 121 void (*release)(struct tmio_mmc_host *host); 122 void (*abort)(struct tmio_mmc_host *host); 123 void (*dataend)(struct tmio_mmc_host *host); 124 125 /* optional */ 126 void (*end)(struct tmio_mmc_host *host); /* held host->lock */ 127 }; 128 129 struct tmio_mmc_host { 130 void __iomem *ctl; 131 struct mmc_command *cmd; 132 struct mmc_request *mrq; 133 struct mmc_data *data; 134 struct mmc_host *mmc; 135 struct mmc_host_ops ops; 136 137 /* Callbacks for clock / power control */ 138 void (*set_pwr)(struct platform_device *host, int state); 139 140 /* pio related stuff */ 141 struct scatterlist *sg_ptr; 142 struct scatterlist *sg_orig; 143 unsigned int sg_len; 144 unsigned int sg_off; 145 unsigned int bus_shift; 146 147 struct platform_device *pdev; 148 struct tmio_mmc_data *pdata; 149 150 /* DMA support */ 151 bool dma_on; 152 struct dma_chan *chan_rx; 153 struct dma_chan *chan_tx; 154 struct tasklet_struct dma_issue; 155 struct scatterlist bounce_sg; 156 u8 *bounce_buf; 157 158 /* Track lost interrupts */ 159 struct delayed_work delayed_reset_work; 160 struct work_struct done; 161 162 /* Cache */ 163 u32 sdcard_irq_mask; 164 u32 sdio_irq_mask; 165 unsigned int clk_cache; 166 u32 sdcard_irq_setbit_mask; 167 u32 sdcard_irq_mask_all; 168 169 spinlock_t lock; /* protect host private data */ 170 unsigned long last_req_ts; 171 struct mutex ios_lock; /* protect set_ios() context */ 172 bool native_hotplug; 173 bool sdio_irq_enabled; 174 175 /* Mandatory callback */ 176 int (*clk_enable)(struct tmio_mmc_host *host); 177 void (*set_clock)(struct tmio_mmc_host *host, unsigned int clock); 178 179 /* Optional callbacks */ 180 void (*clk_disable)(struct tmio_mmc_host *host); 181 int (*multi_io_quirk)(struct mmc_card *card, 182 unsigned int direction, int blk_size); 183 int (*write16_hook)(struct tmio_mmc_host *host, int addr); 184 void (*reset)(struct tmio_mmc_host *host); 185 bool (*check_retune)(struct tmio_mmc_host *host, struct mmc_request *mrq); 186 void (*fixup_request)(struct tmio_mmc_host *host, struct mmc_request *mrq); 187 unsigned int (*get_timeout_cycles)(struct tmio_mmc_host *host); 188 189 const struct tmio_mmc_dma_ops *dma_ops; 190 }; 191 192 struct tmio_mmc_host *tmio_mmc_host_alloc(struct platform_device *pdev, 193 struct tmio_mmc_data *pdata); 194 void tmio_mmc_host_free(struct tmio_mmc_host *host); 195 int tmio_mmc_host_probe(struct tmio_mmc_host *host); 196 void tmio_mmc_host_remove(struct tmio_mmc_host *host); 197 void tmio_mmc_do_data_irq(struct tmio_mmc_host *host); 198 199 void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i); 200 void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i); 201 irqreturn_t tmio_mmc_irq(int irq, void *devid); 202 203 static inline char *tmio_mmc_kmap_atomic(struct scatterlist *sg, 204 unsigned long *flags) 205 { 206 local_irq_save(*flags); 207 return kmap_atomic(sg_page(sg)) + sg->offset; 208 } 209 210 static inline void tmio_mmc_kunmap_atomic(struct scatterlist *sg, 211 unsigned long *flags, void *virt) 212 { 213 kunmap_atomic(virt - sg->offset); 214 local_irq_restore(*flags); 215 } 216 217 #ifdef CONFIG_PM 218 int tmio_mmc_host_runtime_suspend(struct device *dev); 219 int tmio_mmc_host_runtime_resume(struct device *dev); 220 #endif 221 222 static inline u16 sd_ctrl_read16(struct tmio_mmc_host *host, int addr) 223 { 224 return ioread16(host->ctl + (addr << host->bus_shift)); 225 } 226 227 static inline void sd_ctrl_read16_rep(struct tmio_mmc_host *host, int addr, 228 u16 *buf, int count) 229 { 230 ioread16_rep(host->ctl + (addr << host->bus_shift), buf, count); 231 } 232 233 static inline u32 sd_ctrl_read16_and_16_as_32(struct tmio_mmc_host *host, 234 int addr) 235 { 236 return ioread16(host->ctl + (addr << host->bus_shift)) | 237 ioread16(host->ctl + ((addr + 2) << host->bus_shift)) << 16; 238 } 239 240 static inline void sd_ctrl_read32_rep(struct tmio_mmc_host *host, int addr, 241 u32 *buf, int count) 242 { 243 ioread32_rep(host->ctl + (addr << host->bus_shift), buf, count); 244 } 245 246 static inline void sd_ctrl_write16(struct tmio_mmc_host *host, int addr, 247 u16 val) 248 { 249 /* If there is a hook and it returns non-zero then there 250 * is an error and the write should be skipped 251 */ 252 if (host->write16_hook && host->write16_hook(host, addr)) 253 return; 254 iowrite16(val, host->ctl + (addr << host->bus_shift)); 255 } 256 257 static inline void sd_ctrl_write16_rep(struct tmio_mmc_host *host, int addr, 258 u16 *buf, int count) 259 { 260 iowrite16_rep(host->ctl + (addr << host->bus_shift), buf, count); 261 } 262 263 static inline void sd_ctrl_write32_as_16_and_16(struct tmio_mmc_host *host, 264 int addr, u32 val) 265 { 266 if (addr == CTL_IRQ_MASK || addr == CTL_STATUS) 267 val |= host->sdcard_irq_setbit_mask; 268 269 iowrite16(val & 0xffff, host->ctl + (addr << host->bus_shift)); 270 iowrite16(val >> 16, host->ctl + ((addr + 2) << host->bus_shift)); 271 } 272 273 static inline void sd_ctrl_write32(struct tmio_mmc_host *host, int addr, u32 val) 274 { 275 iowrite32(val, host->ctl + (addr << host->bus_shift)); 276 } 277 278 static inline void sd_ctrl_write32_rep(struct tmio_mmc_host *host, int addr, 279 const u32 *buf, int count) 280 { 281 iowrite32_rep(host->ctl + (addr << host->bus_shift), buf, count); 282 } 283 284 #endif 285