1 /* 2 * Driver for the MMC / SD / SDIO cell found in: 3 * 4 * TC6393XB TC6391XB TC6387XB T7L66XB ASIC3 5 * 6 * Copyright (C) 2015-17 Renesas Electronics Corporation 7 * Copyright (C) 2016-17 Sang Engineering, Wolfram Sang 8 * Copyright (C) 2016-17 Horms Solutions, Simon Horman 9 * Copyright (C) 2007 Ian Molton 10 * Copyright (C) 2004 Ian Molton 11 * 12 * This program is free software; you can redistribute it and/or modify 13 * it under the terms of the GNU General Public License version 2 as 14 * published by the Free Software Foundation. 15 * 16 */ 17 18 #ifndef TMIO_MMC_H 19 #define TMIO_MMC_H 20 21 #include <linux/dmaengine.h> 22 #include <linux/highmem.h> 23 #include <linux/mutex.h> 24 #include <linux/pagemap.h> 25 #include <linux/scatterlist.h> 26 #include <linux/spinlock.h> 27 #include <linux/interrupt.h> 28 29 #define CTL_SD_CMD 0x00 30 #define CTL_ARG_REG 0x04 31 #define CTL_STOP_INTERNAL_ACTION 0x08 32 #define CTL_XFER_BLK_COUNT 0xa 33 #define CTL_RESPONSE 0x0c 34 /* driver merges STATUS and following STATUS2 */ 35 #define CTL_STATUS 0x1c 36 /* driver merges IRQ_MASK and following IRQ_MASK2 */ 37 #define CTL_IRQ_MASK 0x20 38 #define CTL_SD_CARD_CLK_CTL 0x24 39 #define CTL_SD_XFER_LEN 0x26 40 #define CTL_SD_MEM_CARD_OPT 0x28 41 #define CTL_SD_ERROR_DETAIL_STATUS 0x2c 42 #define CTL_SD_DATA_PORT 0x30 43 #define CTL_TRANSACTION_CTL 0x34 44 #define CTL_SDIO_STATUS 0x36 45 #define CTL_SDIO_IRQ_MASK 0x38 46 #define CTL_DMA_ENABLE 0xd8 47 #define CTL_RESET_SD 0xe0 48 #define CTL_VERSION 0xe2 49 #define CTL_SDIO_REGS 0x100 50 #define CTL_CLK_AND_WAIT_CTL 0x138 51 #define CTL_RESET_SDIO 0x1e0 52 53 /* Definitions for values the CTL_STOP_INTERNAL_ACTION register can take */ 54 #define TMIO_STOP_STP BIT(0) 55 #define TMIO_STOP_SEC BIT(8) 56 57 /* Definitions for values the CTL_STATUS register can take */ 58 #define TMIO_STAT_CMDRESPEND BIT(0) 59 #define TMIO_STAT_DATAEND BIT(2) 60 #define TMIO_STAT_CARD_REMOVE BIT(3) 61 #define TMIO_STAT_CARD_INSERT BIT(4) 62 #define TMIO_STAT_SIGSTATE BIT(5) 63 #define TMIO_STAT_WRPROTECT BIT(7) 64 #define TMIO_STAT_CARD_REMOVE_A BIT(8) 65 #define TMIO_STAT_CARD_INSERT_A BIT(9) 66 #define TMIO_STAT_SIGSTATE_A BIT(10) 67 68 /* These belong technically to CTL_STATUS2, but the driver merges them */ 69 #define TMIO_STAT_CMD_IDX_ERR BIT(16) 70 #define TMIO_STAT_CRCFAIL BIT(17) 71 #define TMIO_STAT_STOPBIT_ERR BIT(18) 72 #define TMIO_STAT_DATATIMEOUT BIT(19) 73 #define TMIO_STAT_RXOVERFLOW BIT(20) 74 #define TMIO_STAT_TXUNDERRUN BIT(21) 75 #define TMIO_STAT_CMDTIMEOUT BIT(22) 76 #define TMIO_STAT_DAT0 BIT(23) /* only known on R-Car so far */ 77 #define TMIO_STAT_RXRDY BIT(24) 78 #define TMIO_STAT_TXRQ BIT(25) 79 #define TMIO_STAT_ILL_FUNC BIT(29) /* only when !TMIO_MMC_HAS_IDLE_WAIT */ 80 #define TMIO_STAT_SCLKDIVEN BIT(29) /* only when TMIO_MMC_HAS_IDLE_WAIT */ 81 #define TMIO_STAT_CMD_BUSY BIT(30) 82 #define TMIO_STAT_ILL_ACCESS BIT(31) 83 84 #define CLK_CTL_DIV_MASK 0xff 85 #define CLK_CTL_SCLKEN BIT(8) 86 87 #define CARD_OPT_WIDTH8 BIT(13) 88 #define CARD_OPT_WIDTH BIT(15) 89 90 #define TMIO_BBS 512 /* Boot block size */ 91 92 /* Definitions for values the CTL_SDIO_STATUS register can take */ 93 #define TMIO_SDIO_STAT_IOIRQ 0x0001 94 #define TMIO_SDIO_STAT_EXPUB52 0x4000 95 #define TMIO_SDIO_STAT_EXWT 0x8000 96 #define TMIO_SDIO_MASK_ALL 0xc007 97 98 #define TMIO_SDIO_SETBITS_MASK 0x0006 99 100 /* Define some IRQ masks */ 101 /* This is the mask used at reset by the chip */ 102 #define TMIO_MASK_ALL 0x837f031d 103 #define TMIO_MASK_READOP (TMIO_STAT_RXRDY | TMIO_STAT_DATAEND) 104 #define TMIO_MASK_WRITEOP (TMIO_STAT_TXRQ | TMIO_STAT_DATAEND) 105 #define TMIO_MASK_CMD (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT | \ 106 TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT) 107 #define TMIO_MASK_IRQ (TMIO_MASK_READOP | TMIO_MASK_WRITEOP | TMIO_MASK_CMD) 108 109 struct tmio_mmc_data; 110 struct tmio_mmc_host; 111 112 struct tmio_mmc_dma { 113 enum dma_slave_buswidth dma_buswidth; 114 bool (*filter)(struct dma_chan *chan, void *arg); 115 void (*enable)(struct tmio_mmc_host *host, bool enable); 116 }; 117 118 struct tmio_mmc_dma_ops { 119 void (*start)(struct tmio_mmc_host *host, struct mmc_data *data); 120 void (*enable)(struct tmio_mmc_host *host, bool enable); 121 void (*request)(struct tmio_mmc_host *host, 122 struct tmio_mmc_data *pdata); 123 void (*release)(struct tmio_mmc_host *host); 124 void (*abort)(struct tmio_mmc_host *host); 125 }; 126 127 struct tmio_mmc_host { 128 void __iomem *ctl; 129 struct mmc_command *cmd; 130 struct mmc_request *mrq; 131 struct mmc_data *data; 132 struct mmc_host *mmc; 133 134 /* Callbacks for clock / power control */ 135 void (*set_pwr)(struct platform_device *host, int state); 136 void (*set_clk_div)(struct platform_device *host, int state); 137 138 /* pio related stuff */ 139 struct scatterlist *sg_ptr; 140 struct scatterlist *sg_orig; 141 unsigned int sg_len; 142 unsigned int sg_off; 143 unsigned long bus_shift; 144 145 struct platform_device *pdev; 146 struct tmio_mmc_data *pdata; 147 struct tmio_mmc_dma *dma; 148 149 /* DMA support */ 150 bool force_pio; 151 struct dma_chan *chan_rx; 152 struct dma_chan *chan_tx; 153 struct completion dma_dataend; 154 struct tasklet_struct dma_issue; 155 struct scatterlist bounce_sg; 156 u8 *bounce_buf; 157 158 /* Track lost interrupts */ 159 struct delayed_work delayed_reset_work; 160 struct work_struct done; 161 162 /* Cache */ 163 u32 sdcard_irq_mask; 164 u32 sdio_irq_mask; 165 unsigned int clk_cache; 166 167 spinlock_t lock; /* protect host private data */ 168 unsigned long last_req_ts; 169 struct mutex ios_lock; /* protect set_ios() context */ 170 bool native_hotplug; 171 bool sdio_irq_enabled; 172 u32 scc_tappos; 173 174 /* Mandatory callback */ 175 int (*clk_enable)(struct tmio_mmc_host *host); 176 177 /* Optional callbacks */ 178 unsigned int (*clk_update)(struct tmio_mmc_host *host, 179 unsigned int new_clock); 180 void (*clk_disable)(struct tmio_mmc_host *host); 181 int (*multi_io_quirk)(struct mmc_card *card, 182 unsigned int direction, int blk_size); 183 int (*card_busy)(struct mmc_host *mmc); 184 int (*start_signal_voltage_switch)(struct mmc_host *mmc, 185 struct mmc_ios *ios); 186 int (*write16_hook)(struct tmio_mmc_host *host, int addr); 187 void (*hw_reset)(struct tmio_mmc_host *host); 188 void (*prepare_tuning)(struct tmio_mmc_host *host, unsigned long tap); 189 bool (*check_scc_error)(struct tmio_mmc_host *host); 190 191 /* 192 * Mandatory callback for tuning to occur which is optional for SDR50 193 * and mandatory for SDR104. 194 */ 195 unsigned int (*init_tuning)(struct tmio_mmc_host *host); 196 int (*select_tuning)(struct tmio_mmc_host *host); 197 198 /* Tuning values: 1 for success, 0 for failure */ 199 DECLARE_BITMAP(taps, BITS_PER_BYTE * sizeof(long)); 200 unsigned int tap_num; 201 202 const struct tmio_mmc_dma_ops *dma_ops; 203 }; 204 205 struct tmio_mmc_host *tmio_mmc_host_alloc(struct platform_device *pdev); 206 void tmio_mmc_host_free(struct tmio_mmc_host *host); 207 int tmio_mmc_host_probe(struct tmio_mmc_host *host, 208 struct tmio_mmc_data *pdata, 209 const struct tmio_mmc_dma_ops *dma_ops); 210 void tmio_mmc_host_remove(struct tmio_mmc_host *host); 211 void tmio_mmc_do_data_irq(struct tmio_mmc_host *host); 212 213 void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i); 214 void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i); 215 irqreturn_t tmio_mmc_irq(int irq, void *devid); 216 217 static inline char *tmio_mmc_kmap_atomic(struct scatterlist *sg, 218 unsigned long *flags) 219 { 220 local_irq_save(*flags); 221 return kmap_atomic(sg_page(sg)) + sg->offset; 222 } 223 224 static inline void tmio_mmc_kunmap_atomic(struct scatterlist *sg, 225 unsigned long *flags, void *virt) 226 { 227 kunmap_atomic(virt - sg->offset); 228 local_irq_restore(*flags); 229 } 230 231 #ifdef CONFIG_PM 232 int tmio_mmc_host_runtime_suspend(struct device *dev); 233 int tmio_mmc_host_runtime_resume(struct device *dev); 234 #endif 235 236 static inline u16 sd_ctrl_read16(struct tmio_mmc_host *host, int addr) 237 { 238 return readw(host->ctl + (addr << host->bus_shift)); 239 } 240 241 static inline void sd_ctrl_read16_rep(struct tmio_mmc_host *host, int addr, 242 u16 *buf, int count) 243 { 244 readsw(host->ctl + (addr << host->bus_shift), buf, count); 245 } 246 247 static inline u32 sd_ctrl_read16_and_16_as_32(struct tmio_mmc_host *host, 248 int addr) 249 { 250 return readw(host->ctl + (addr << host->bus_shift)) | 251 readw(host->ctl + ((addr + 2) << host->bus_shift)) << 16; 252 } 253 254 static inline void sd_ctrl_read32_rep(struct tmio_mmc_host *host, int addr, 255 u32 *buf, int count) 256 { 257 readsl(host->ctl + (addr << host->bus_shift), buf, count); 258 } 259 260 static inline void sd_ctrl_write16(struct tmio_mmc_host *host, int addr, 261 u16 val) 262 { 263 /* If there is a hook and it returns non-zero then there 264 * is an error and the write should be skipped 265 */ 266 if (host->write16_hook && host->write16_hook(host, addr)) 267 return; 268 writew(val, host->ctl + (addr << host->bus_shift)); 269 } 270 271 static inline void sd_ctrl_write16_rep(struct tmio_mmc_host *host, int addr, 272 u16 *buf, int count) 273 { 274 writesw(host->ctl + (addr << host->bus_shift), buf, count); 275 } 276 277 static inline void sd_ctrl_write32_as_16_and_16(struct tmio_mmc_host *host, 278 int addr, u32 val) 279 { 280 writew(val & 0xffff, host->ctl + (addr << host->bus_shift)); 281 writew(val >> 16, host->ctl + ((addr + 2) << host->bus_shift)); 282 } 283 284 static inline void sd_ctrl_write32_rep(struct tmio_mmc_host *host, int addr, 285 const u32 *buf, int count) 286 { 287 writesl(host->ctl + (addr << host->bus_shift), buf, count); 288 } 289 290 #endif 291