xref: /openbmc/linux/drivers/mmc/host/tmio_mmc.h (revision baa7eb025ab14f3cba2e35c0a8648f9c9f01d24f)
1 /* Definitons for use with the tmio_mmc.c
2  *
3  * (c) 2004 Ian Molton <spyro@f2s.com>
4  * (c) 2007 Ian Molton <spyro@f2s.com>
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  *
10  */
11 
12 #include <linux/highmem.h>
13 #include <linux/interrupt.h>
14 #include <linux/dmaengine.h>
15 
16 #define CTL_SD_CMD 0x00
17 #define CTL_ARG_REG 0x04
18 #define CTL_STOP_INTERNAL_ACTION 0x08
19 #define CTL_XFER_BLK_COUNT 0xa
20 #define CTL_RESPONSE 0x0c
21 #define CTL_STATUS 0x1c
22 #define CTL_IRQ_MASK 0x20
23 #define CTL_SD_CARD_CLK_CTL 0x24
24 #define CTL_SD_XFER_LEN 0x26
25 #define CTL_SD_MEM_CARD_OPT 0x28
26 #define CTL_SD_ERROR_DETAIL_STATUS 0x2c
27 #define CTL_SD_DATA_PORT 0x30
28 #define CTL_TRANSACTION_CTL 0x34
29 #define CTL_RESET_SD 0xe0
30 #define CTL_SDIO_REGS 0x100
31 #define CTL_CLK_AND_WAIT_CTL 0x138
32 #define CTL_RESET_SDIO 0x1e0
33 
34 /* Definitions for values the CTRL_STATUS register can take. */
35 #define TMIO_STAT_CMDRESPEND    0x00000001
36 #define TMIO_STAT_DATAEND       0x00000004
37 #define TMIO_STAT_CARD_REMOVE   0x00000008
38 #define TMIO_STAT_CARD_INSERT   0x00000010
39 #define TMIO_STAT_SIGSTATE      0x00000020
40 #define TMIO_STAT_WRPROTECT     0x00000080
41 #define TMIO_STAT_CARD_REMOVE_A 0x00000100
42 #define TMIO_STAT_CARD_INSERT_A 0x00000200
43 #define TMIO_STAT_SIGSTATE_A    0x00000400
44 #define TMIO_STAT_CMD_IDX_ERR   0x00010000
45 #define TMIO_STAT_CRCFAIL       0x00020000
46 #define TMIO_STAT_STOPBIT_ERR   0x00040000
47 #define TMIO_STAT_DATATIMEOUT   0x00080000
48 #define TMIO_STAT_RXOVERFLOW    0x00100000
49 #define TMIO_STAT_TXUNDERRUN    0x00200000
50 #define TMIO_STAT_CMDTIMEOUT    0x00400000
51 #define TMIO_STAT_RXRDY         0x01000000
52 #define TMIO_STAT_TXRQ          0x02000000
53 #define TMIO_STAT_ILL_FUNC      0x20000000
54 #define TMIO_STAT_CMD_BUSY      0x40000000
55 #define TMIO_STAT_ILL_ACCESS    0x80000000
56 
57 /* Define some IRQ masks */
58 /* This is the mask used at reset by the chip */
59 #define TMIO_MASK_ALL           0x837f031d
60 #define TMIO_MASK_READOP  (TMIO_STAT_RXRDY | TMIO_STAT_DATAEND)
61 #define TMIO_MASK_WRITEOP (TMIO_STAT_TXRQ | TMIO_STAT_DATAEND)
62 #define TMIO_MASK_CMD     (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT | \
63 		TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT)
64 #define TMIO_MASK_IRQ     (TMIO_MASK_READOP | TMIO_MASK_WRITEOP | TMIO_MASK_CMD)
65 
66 
67 #define enable_mmc_irqs(host, i) \
68 	do { \
69 		u32 mask;\
70 		mask  = sd_ctrl_read32((host), CTL_IRQ_MASK); \
71 		mask &= ~((i) & TMIO_MASK_IRQ); \
72 		sd_ctrl_write32((host), CTL_IRQ_MASK, mask); \
73 	} while (0)
74 
75 #define disable_mmc_irqs(host, i) \
76 	do { \
77 		u32 mask;\
78 		mask  = sd_ctrl_read32((host), CTL_IRQ_MASK); \
79 		mask |= ((i) & TMIO_MASK_IRQ); \
80 		sd_ctrl_write32((host), CTL_IRQ_MASK, mask); \
81 	} while (0)
82 
83 #define ack_mmc_irqs(host, i) \
84 	do { \
85 		sd_ctrl_write32((host), CTL_STATUS, ~(i)); \
86 	} while (0)
87 
88 
89 struct tmio_mmc_host {
90 	void __iomem *ctl;
91 	unsigned long bus_shift;
92 	struct mmc_command      *cmd;
93 	struct mmc_request      *mrq;
94 	struct mmc_data         *data;
95 	struct mmc_host         *mmc;
96 	int                     irq;
97 
98 	/* Callbacks for clock / power control */
99 	void (*set_pwr)(struct platform_device *host, int state);
100 	void (*set_clk_div)(struct platform_device *host, int state);
101 
102 	/* pio related stuff */
103 	struct scatterlist      *sg_ptr;
104 	unsigned int            sg_len;
105 	unsigned int            sg_off;
106 
107 	struct platform_device *pdev;
108 
109 	/* DMA support */
110 	struct dma_chan		*chan_rx;
111 	struct dma_chan		*chan_tx;
112 	struct tasklet_struct	dma_complete;
113 	struct tasklet_struct	dma_issue;
114 #ifdef CONFIG_TMIO_MMC_DMA
115 	struct dma_async_tx_descriptor *desc;
116 	unsigned int            dma_sglen;
117 	dma_cookie_t		cookie;
118 #endif
119 };
120 
121 #include <linux/io.h>
122 
123 static inline u16 sd_ctrl_read16(struct tmio_mmc_host *host, int addr)
124 {
125 	return readw(host->ctl + (addr << host->bus_shift));
126 }
127 
128 static inline void sd_ctrl_read16_rep(struct tmio_mmc_host *host, int addr,
129 		u16 *buf, int count)
130 {
131 	readsw(host->ctl + (addr << host->bus_shift), buf, count);
132 }
133 
134 static inline u32 sd_ctrl_read32(struct tmio_mmc_host *host, int addr)
135 {
136 	return readw(host->ctl + (addr << host->bus_shift)) |
137 	       readw(host->ctl + ((addr + 2) << host->bus_shift)) << 16;
138 }
139 
140 static inline void sd_ctrl_write16(struct tmio_mmc_host *host, int addr,
141 		u16 val)
142 {
143 	writew(val, host->ctl + (addr << host->bus_shift));
144 }
145 
146 static inline void sd_ctrl_write16_rep(struct tmio_mmc_host *host, int addr,
147 		u16 *buf, int count)
148 {
149 	writesw(host->ctl + (addr << host->bus_shift), buf, count);
150 }
151 
152 static inline void sd_ctrl_write32(struct tmio_mmc_host *host, int addr,
153 		u32 val)
154 {
155 	writew(val, host->ctl + (addr << host->bus_shift));
156 	writew(val >> 16, host->ctl + ((addr + 2) << host->bus_shift));
157 }
158 
159 #include <linux/scatterlist.h>
160 #include <linux/blkdev.h>
161 
162 static inline void tmio_mmc_init_sg(struct tmio_mmc_host *host,
163 	struct mmc_data *data)
164 {
165 	host->sg_len = data->sg_len;
166 	host->sg_ptr = data->sg;
167 	host->sg_off = 0;
168 }
169 
170 static inline int tmio_mmc_next_sg(struct tmio_mmc_host *host)
171 {
172 	host->sg_ptr = sg_next(host->sg_ptr);
173 	host->sg_off = 0;
174 	return --host->sg_len;
175 }
176 
177 static inline char *tmio_mmc_kmap_atomic(struct scatterlist *sg,
178 	unsigned long *flags)
179 {
180 	local_irq_save(*flags);
181 	return kmap_atomic(sg_page(sg), KM_BIO_SRC_IRQ) + sg->offset;
182 }
183 
184 static inline void tmio_mmc_kunmap_atomic(void *virt,
185 	unsigned long *flags)
186 {
187 	kunmap_atomic(virt, KM_BIO_SRC_IRQ);
188 	local_irq_restore(*flags);
189 }
190 
191 #ifdef CONFIG_MMC_DEBUG
192 
193 #define STATUS_TO_TEXT(a) \
194 	do { \
195 		if (status & TMIO_STAT_##a) \
196 			printk(#a); \
197 	} while (0)
198 
199 void pr_debug_status(u32 status)
200 {
201 	printk(KERN_DEBUG "status: %08x = ", status);
202 	STATUS_TO_TEXT(CARD_REMOVE);
203 	STATUS_TO_TEXT(CARD_INSERT);
204 	STATUS_TO_TEXT(SIGSTATE);
205 	STATUS_TO_TEXT(WRPROTECT);
206 	STATUS_TO_TEXT(CARD_REMOVE_A);
207 	STATUS_TO_TEXT(CARD_INSERT_A);
208 	STATUS_TO_TEXT(SIGSTATE_A);
209 	STATUS_TO_TEXT(CMD_IDX_ERR);
210 	STATUS_TO_TEXT(STOPBIT_ERR);
211 	STATUS_TO_TEXT(ILL_FUNC);
212 	STATUS_TO_TEXT(CMD_BUSY);
213 	STATUS_TO_TEXT(CMDRESPEND);
214 	STATUS_TO_TEXT(DATAEND);
215 	STATUS_TO_TEXT(CRCFAIL);
216 	STATUS_TO_TEXT(DATATIMEOUT);
217 	STATUS_TO_TEXT(CMDTIMEOUT);
218 	STATUS_TO_TEXT(RXOVERFLOW);
219 	STATUS_TO_TEXT(TXUNDERRUN);
220 	STATUS_TO_TEXT(RXRDY);
221 	STATUS_TO_TEXT(TXRQ);
222 	STATUS_TO_TEXT(ILL_ACCESS);
223 	printk("\n");
224 }
225 
226 #else
227 #define pr_debug_status(s)  do { } while (0)
228 #endif
229