1 /* Definitons for use with the tmio_mmc.c 2 * 3 * (c) 2004 Ian Molton <spyro@f2s.com> 4 * (c) 2007 Ian Molton <spyro@f2s.com> 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 * 10 */ 11 12 #include <linux/highmem.h> 13 14 #define CNF_CMD 0x04 15 #define CNF_CTL_BASE 0x10 16 #define CNF_INT_PIN 0x3d 17 #define CNF_STOP_CLK_CTL 0x40 18 #define CNF_GCLK_CTL 0x41 19 #define CNF_SD_CLK_MODE 0x42 20 #define CNF_PIN_STATUS 0x44 21 #define CNF_PWR_CTL_1 0x48 22 #define CNF_PWR_CTL_2 0x49 23 #define CNF_PWR_CTL_3 0x4a 24 #define CNF_CARD_DETECT_MODE 0x4c 25 #define CNF_SD_SLOT 0x50 26 #define CNF_EXT_GCLK_CTL_1 0xf0 27 #define CNF_EXT_GCLK_CTL_2 0xf1 28 #define CNF_EXT_GCLK_CTL_3 0xf9 29 #define CNF_SD_LED_EN_1 0xfa 30 #define CNF_SD_LED_EN_2 0xfe 31 32 #define SDCREN 0x2 /* Enable access to MMC CTL regs. (flag in COMMAND_REG)*/ 33 34 #define CTL_SD_CMD 0x00 35 #define CTL_ARG_REG 0x04 36 #define CTL_STOP_INTERNAL_ACTION 0x08 37 #define CTL_XFER_BLK_COUNT 0xa 38 #define CTL_RESPONSE 0x0c 39 #define CTL_STATUS 0x1c 40 #define CTL_IRQ_MASK 0x20 41 #define CTL_SD_CARD_CLK_CTL 0x24 42 #define CTL_SD_XFER_LEN 0x26 43 #define CTL_SD_MEM_CARD_OPT 0x28 44 #define CTL_SD_ERROR_DETAIL_STATUS 0x2c 45 #define CTL_SD_DATA_PORT 0x30 46 #define CTL_TRANSACTION_CTL 0x34 47 #define CTL_RESET_SD 0xe0 48 #define CTL_SDIO_REGS 0x100 49 #define CTL_CLK_AND_WAIT_CTL 0x138 50 #define CTL_RESET_SDIO 0x1e0 51 52 /* Definitions for values the CTRL_STATUS register can take. */ 53 #define TMIO_STAT_CMDRESPEND 0x00000001 54 #define TMIO_STAT_DATAEND 0x00000004 55 #define TMIO_STAT_CARD_REMOVE 0x00000008 56 #define TMIO_STAT_CARD_INSERT 0x00000010 57 #define TMIO_STAT_SIGSTATE 0x00000020 58 #define TMIO_STAT_WRPROTECT 0x00000080 59 #define TMIO_STAT_CARD_REMOVE_A 0x00000100 60 #define TMIO_STAT_CARD_INSERT_A 0x00000200 61 #define TMIO_STAT_SIGSTATE_A 0x00000400 62 #define TMIO_STAT_CMD_IDX_ERR 0x00010000 63 #define TMIO_STAT_CRCFAIL 0x00020000 64 #define TMIO_STAT_STOPBIT_ERR 0x00040000 65 #define TMIO_STAT_DATATIMEOUT 0x00080000 66 #define TMIO_STAT_RXOVERFLOW 0x00100000 67 #define TMIO_STAT_TXUNDERRUN 0x00200000 68 #define TMIO_STAT_CMDTIMEOUT 0x00400000 69 #define TMIO_STAT_RXRDY 0x01000000 70 #define TMIO_STAT_TXRQ 0x02000000 71 #define TMIO_STAT_ILL_FUNC 0x20000000 72 #define TMIO_STAT_CMD_BUSY 0x40000000 73 #define TMIO_STAT_ILL_ACCESS 0x80000000 74 75 /* Define some IRQ masks */ 76 /* This is the mask used at reset by the chip */ 77 #define TMIO_MASK_ALL 0x837f031d 78 #define TMIO_MASK_READOP (TMIO_STAT_RXRDY | TMIO_STAT_DATAEND | \ 79 TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT) 80 #define TMIO_MASK_WRITEOP (TMIO_STAT_TXRQ | TMIO_STAT_DATAEND | \ 81 TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT) 82 #define TMIO_MASK_CMD (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT | \ 83 TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT) 84 #define TMIO_MASK_IRQ (TMIO_MASK_READOP | TMIO_MASK_WRITEOP | TMIO_MASK_CMD) 85 86 #define enable_mmc_irqs(ctl, i) \ 87 do { \ 88 u32 mask;\ 89 mask = tmio_ioread32((ctl) + CTL_IRQ_MASK); \ 90 mask &= ~((i) & TMIO_MASK_IRQ); \ 91 tmio_iowrite32(mask, (ctl) + CTL_IRQ_MASK); \ 92 } while (0) 93 94 #define disable_mmc_irqs(ctl, i) \ 95 do { \ 96 u32 mask;\ 97 mask = tmio_ioread32((ctl) + CTL_IRQ_MASK); \ 98 mask |= ((i) & TMIO_MASK_IRQ); \ 99 tmio_iowrite32(mask, (ctl) + CTL_IRQ_MASK); \ 100 } while (0) 101 102 #define ack_mmc_irqs(ctl, i) \ 103 do { \ 104 u32 mask;\ 105 mask = tmio_ioread32((ctl) + CTL_STATUS); \ 106 mask &= ~((i) & TMIO_MASK_IRQ); \ 107 tmio_iowrite32(mask, (ctl) + CTL_STATUS); \ 108 } while (0) 109 110 111 struct tmio_mmc_host { 112 void __iomem *cnf; 113 void __iomem *ctl; 114 struct mmc_command *cmd; 115 struct mmc_request *mrq; 116 struct mmc_data *data; 117 struct mmc_host *mmc; 118 int irq; 119 120 /* pio related stuff */ 121 struct scatterlist *sg_ptr; 122 unsigned int sg_len; 123 unsigned int sg_off; 124 }; 125 126 #include <linux/scatterlist.h> 127 #include <linux/blkdev.h> 128 129 static inline void tmio_mmc_init_sg(struct tmio_mmc_host *host, 130 struct mmc_data *data) 131 { 132 host->sg_len = data->sg_len; 133 host->sg_ptr = data->sg; 134 host->sg_off = 0; 135 } 136 137 static inline int tmio_mmc_next_sg(struct tmio_mmc_host *host) 138 { 139 host->sg_ptr = sg_next(host->sg_ptr); 140 host->sg_off = 0; 141 return --host->sg_len; 142 } 143 144 static inline char *tmio_mmc_kmap_atomic(struct tmio_mmc_host *host, 145 unsigned long *flags) 146 { 147 struct scatterlist *sg = host->sg_ptr; 148 149 local_irq_save(*flags); 150 return kmap_atomic(sg_page(sg), KM_BIO_SRC_IRQ) + sg->offset; 151 } 152 153 static inline void tmio_mmc_kunmap_atomic(struct tmio_mmc_host *host, 154 unsigned long *flags) 155 { 156 kunmap_atomic(sg_page(host->sg_ptr), KM_BIO_SRC_IRQ); 157 local_irq_restore(*flags); 158 } 159 160 #ifdef CONFIG_MMC_DEBUG 161 162 #define STATUS_TO_TEXT(a) \ 163 do { \ 164 if (status & TMIO_STAT_##a) \ 165 printk(#a); \ 166 } while (0) 167 168 void pr_debug_status(u32 status) 169 { 170 printk(KERN_DEBUG "status: %08x = ", status); 171 STATUS_TO_TEXT(CARD_REMOVE); 172 STATUS_TO_TEXT(CARD_INSERT); 173 STATUS_TO_TEXT(SIGSTATE); 174 STATUS_TO_TEXT(WRPROTECT); 175 STATUS_TO_TEXT(CARD_REMOVE_A); 176 STATUS_TO_TEXT(CARD_INSERT_A); 177 STATUS_TO_TEXT(SIGSTATE_A); 178 STATUS_TO_TEXT(CMD_IDX_ERR); 179 STATUS_TO_TEXT(STOPBIT_ERR); 180 STATUS_TO_TEXT(ILL_FUNC); 181 STATUS_TO_TEXT(CMD_BUSY); 182 STATUS_TO_TEXT(CMDRESPEND); 183 STATUS_TO_TEXT(DATAEND); 184 STATUS_TO_TEXT(CRCFAIL); 185 STATUS_TO_TEXT(DATATIMEOUT); 186 STATUS_TO_TEXT(CMDTIMEOUT); 187 STATUS_TO_TEXT(RXOVERFLOW); 188 STATUS_TO_TEXT(TXUNDERRUN); 189 STATUS_TO_TEXT(RXRDY); 190 STATUS_TO_TEXT(TXRQ); 191 STATUS_TO_TEXT(ILL_ACCESS); 192 printk("\n"); 193 } 194 195 #else 196 #define pr_debug_status(s) do { } while (0) 197 #endif 198