1 /* 2 * Driver for the MMC / SD / SDIO cell found in: 3 * 4 * TC6393XB TC6391XB TC6387XB T7L66XB ASIC3 5 * 6 * Copyright (C) 2016 Sang Engineering, Wolfram Sang 7 * Copyright (C) 2015-16 Renesas Electronics Corporation 8 * Copyright (C) 2007 Ian Molton 9 * Copyright (C) 2004 Ian Molton 10 * 11 * This program is free software; you can redistribute it and/or modify 12 * it under the terms of the GNU General Public License version 2 as 13 * published by the Free Software Foundation. 14 * 15 */ 16 17 #ifndef TMIO_MMC_H 18 #define TMIO_MMC_H 19 20 #include <linux/dmaengine.h> 21 #include <linux/highmem.h> 22 #include <linux/mutex.h> 23 #include <linux/pagemap.h> 24 #include <linux/scatterlist.h> 25 #include <linux/spinlock.h> 26 #include <linux/interrupt.h> 27 28 #define CTL_SD_CMD 0x00 29 #define CTL_ARG_REG 0x04 30 #define CTL_STOP_INTERNAL_ACTION 0x08 31 #define CTL_XFER_BLK_COUNT 0xa 32 #define CTL_RESPONSE 0x0c 33 /* driver merges STATUS and following STATUS2 */ 34 #define CTL_STATUS 0x1c 35 /* driver merges IRQ_MASK and following IRQ_MASK2 */ 36 #define CTL_IRQ_MASK 0x20 37 #define CTL_SD_CARD_CLK_CTL 0x24 38 #define CTL_SD_XFER_LEN 0x26 39 #define CTL_SD_MEM_CARD_OPT 0x28 40 #define CTL_SD_ERROR_DETAIL_STATUS 0x2c 41 #define CTL_SD_DATA_PORT 0x30 42 #define CTL_TRANSACTION_CTL 0x34 43 #define CTL_SDIO_STATUS 0x36 44 #define CTL_SDIO_IRQ_MASK 0x38 45 #define CTL_DMA_ENABLE 0xd8 46 #define CTL_RESET_SD 0xe0 47 #define CTL_VERSION 0xe2 48 #define CTL_SDIO_REGS 0x100 49 #define CTL_CLK_AND_WAIT_CTL 0x138 50 #define CTL_RESET_SDIO 0x1e0 51 52 /* Definitions for values the CTL_STOP_INTERNAL_ACTION register can take */ 53 #define TMIO_STOP_STP BIT(0) 54 #define TMIO_STOP_SEC BIT(8) 55 56 /* Definitions for values the CTL_STATUS register can take */ 57 #define TMIO_STAT_CMDRESPEND BIT(0) 58 #define TMIO_STAT_DATAEND BIT(2) 59 #define TMIO_STAT_CARD_REMOVE BIT(3) 60 #define TMIO_STAT_CARD_INSERT BIT(4) 61 #define TMIO_STAT_SIGSTATE BIT(5) 62 #define TMIO_STAT_WRPROTECT BIT(7) 63 #define TMIO_STAT_CARD_REMOVE_A BIT(8) 64 #define TMIO_STAT_CARD_INSERT_A BIT(9) 65 #define TMIO_STAT_SIGSTATE_A BIT(10) 66 67 /* These belong technically to CTL_STATUS2, but the driver merges them */ 68 #define TMIO_STAT_CMD_IDX_ERR BIT(16) 69 #define TMIO_STAT_CRCFAIL BIT(17) 70 #define TMIO_STAT_STOPBIT_ERR BIT(18) 71 #define TMIO_STAT_DATATIMEOUT BIT(19) 72 #define TMIO_STAT_RXOVERFLOW BIT(20) 73 #define TMIO_STAT_TXUNDERRUN BIT(21) 74 #define TMIO_STAT_CMDTIMEOUT BIT(22) 75 #define TMIO_STAT_DAT0 BIT(23) /* only known on R-Car so far */ 76 #define TMIO_STAT_RXRDY BIT(24) 77 #define TMIO_STAT_TXRQ BIT(25) 78 #define TMIO_STAT_ILL_FUNC BIT(29) /* only when !TMIO_MMC_HAS_IDLE_WAIT */ 79 #define TMIO_STAT_SCLKDIVEN BIT(29) /* only when TMIO_MMC_HAS_IDLE_WAIT */ 80 #define TMIO_STAT_CMD_BUSY BIT(30) 81 #define TMIO_STAT_ILL_ACCESS BIT(31) 82 83 #define CLK_CTL_DIV_MASK 0xff 84 #define CLK_CTL_SCLKEN BIT(8) 85 86 #define CARD_OPT_WIDTH8 BIT(13) 87 #define CARD_OPT_WIDTH BIT(15) 88 89 #define TMIO_BBS 512 /* Boot block size */ 90 91 /* Definitions for values the CTL_SDIO_STATUS register can take */ 92 #define TMIO_SDIO_STAT_IOIRQ 0x0001 93 #define TMIO_SDIO_STAT_EXPUB52 0x4000 94 #define TMIO_SDIO_STAT_EXWT 0x8000 95 #define TMIO_SDIO_MASK_ALL 0xc007 96 97 #define TMIO_SDIO_SETBITS_MASK 0x0006 98 99 /* Define some IRQ masks */ 100 /* This is the mask used at reset by the chip */ 101 #define TMIO_MASK_ALL 0x837f031d 102 #define TMIO_MASK_READOP (TMIO_STAT_RXRDY | TMIO_STAT_DATAEND) 103 #define TMIO_MASK_WRITEOP (TMIO_STAT_TXRQ | TMIO_STAT_DATAEND) 104 #define TMIO_MASK_CMD (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT | \ 105 TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT) 106 #define TMIO_MASK_IRQ (TMIO_MASK_READOP | TMIO_MASK_WRITEOP | TMIO_MASK_CMD) 107 108 struct tmio_mmc_data; 109 struct tmio_mmc_host; 110 111 struct tmio_mmc_dma { 112 enum dma_slave_buswidth dma_buswidth; 113 bool (*filter)(struct dma_chan *chan, void *arg); 114 void (*enable)(struct tmio_mmc_host *host, bool enable); 115 }; 116 117 struct tmio_mmc_host { 118 void __iomem *ctl; 119 struct mmc_command *cmd; 120 struct mmc_request *mrq; 121 struct mmc_data *data; 122 struct mmc_host *mmc; 123 124 /* Callbacks for clock / power control */ 125 void (*set_pwr)(struct platform_device *host, int state); 126 void (*set_clk_div)(struct platform_device *host, int state); 127 128 /* pio related stuff */ 129 struct scatterlist *sg_ptr; 130 struct scatterlist *sg_orig; 131 unsigned int sg_len; 132 unsigned int sg_off; 133 unsigned long bus_shift; 134 135 struct platform_device *pdev; 136 struct tmio_mmc_data *pdata; 137 struct tmio_mmc_dma *dma; 138 139 /* DMA support */ 140 bool force_pio; 141 struct dma_chan *chan_rx; 142 struct dma_chan *chan_tx; 143 struct completion dma_dataend; 144 struct tasklet_struct dma_issue; 145 struct scatterlist bounce_sg; 146 u8 *bounce_buf; 147 148 /* Track lost interrupts */ 149 struct delayed_work delayed_reset_work; 150 struct work_struct done; 151 152 /* Cache */ 153 u32 sdcard_irq_mask; 154 u32 sdio_irq_mask; 155 unsigned int clk_cache; 156 157 spinlock_t lock; /* protect host private data */ 158 unsigned long last_req_ts; 159 struct mutex ios_lock; /* protect set_ios() context */ 160 bool native_hotplug; 161 bool sdio_irq_enabled; 162 u32 scc_tappos; 163 164 /* Mandatory callback */ 165 int (*clk_enable)(struct tmio_mmc_host *host); 166 167 /* Optional callbacks */ 168 unsigned int (*clk_update)(struct tmio_mmc_host *host, 169 unsigned int new_clock); 170 void (*clk_disable)(struct tmio_mmc_host *host); 171 int (*multi_io_quirk)(struct mmc_card *card, 172 unsigned int direction, int blk_size); 173 int (*card_busy)(struct mmc_host *mmc); 174 int (*start_signal_voltage_switch)(struct mmc_host *mmc, 175 struct mmc_ios *ios); 176 int (*write16_hook)(struct tmio_mmc_host *host, int addr); 177 void (*hw_reset)(struct tmio_mmc_host *host); 178 void (*prepare_tuning)(struct tmio_mmc_host *host, unsigned long tap); 179 bool (*check_scc_error)(struct tmio_mmc_host *host); 180 181 /* 182 * Mandatory callback for tuning to occur which is optional for SDR50 183 * and mandatory for SDR104. 184 */ 185 unsigned int (*init_tuning)(struct tmio_mmc_host *host); 186 int (*select_tuning)(struct tmio_mmc_host *host); 187 188 /* Tuning values: 1 for success, 0 for failure */ 189 DECLARE_BITMAP(taps, BITS_PER_BYTE * sizeof(long)); 190 unsigned int tap_num; 191 }; 192 193 struct tmio_mmc_host *tmio_mmc_host_alloc(struct platform_device *pdev); 194 void tmio_mmc_host_free(struct tmio_mmc_host *host); 195 int tmio_mmc_host_probe(struct tmio_mmc_host *host, 196 struct tmio_mmc_data *pdata); 197 void tmio_mmc_host_remove(struct tmio_mmc_host *host); 198 void tmio_mmc_do_data_irq(struct tmio_mmc_host *host); 199 200 void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i); 201 void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i); 202 irqreturn_t tmio_mmc_irq(int irq, void *devid); 203 204 static inline char *tmio_mmc_kmap_atomic(struct scatterlist *sg, 205 unsigned long *flags) 206 { 207 local_irq_save(*flags); 208 return kmap_atomic(sg_page(sg)) + sg->offset; 209 } 210 211 static inline void tmio_mmc_kunmap_atomic(struct scatterlist *sg, 212 unsigned long *flags, void *virt) 213 { 214 kunmap_atomic(virt - sg->offset); 215 local_irq_restore(*flags); 216 } 217 218 #if defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE) 219 void tmio_mmc_start_dma(struct tmio_mmc_host *host, struct mmc_data *data); 220 void tmio_mmc_enable_dma(struct tmio_mmc_host *host, bool enable); 221 void tmio_mmc_request_dma(struct tmio_mmc_host *host, struct tmio_mmc_data *pdata); 222 void tmio_mmc_release_dma(struct tmio_mmc_host *host); 223 void tmio_mmc_abort_dma(struct tmio_mmc_host *host); 224 #else 225 static inline void tmio_mmc_start_dma(struct tmio_mmc_host *host, 226 struct mmc_data *data) 227 { 228 } 229 230 static inline void tmio_mmc_enable_dma(struct tmio_mmc_host *host, bool enable) 231 { 232 } 233 234 static inline void tmio_mmc_request_dma(struct tmio_mmc_host *host, 235 struct tmio_mmc_data *pdata) 236 { 237 host->chan_tx = NULL; 238 host->chan_rx = NULL; 239 } 240 241 static inline void tmio_mmc_release_dma(struct tmio_mmc_host *host) 242 { 243 } 244 245 static inline void tmio_mmc_abort_dma(struct tmio_mmc_host *host) 246 { 247 } 248 #endif 249 250 #ifdef CONFIG_PM 251 int tmio_mmc_host_runtime_suspend(struct device *dev); 252 int tmio_mmc_host_runtime_resume(struct device *dev); 253 #endif 254 255 static inline u16 sd_ctrl_read16(struct tmio_mmc_host *host, int addr) 256 { 257 return readw(host->ctl + (addr << host->bus_shift)); 258 } 259 260 static inline void sd_ctrl_read16_rep(struct tmio_mmc_host *host, int addr, 261 u16 *buf, int count) 262 { 263 readsw(host->ctl + (addr << host->bus_shift), buf, count); 264 } 265 266 static inline u32 sd_ctrl_read16_and_16_as_32(struct tmio_mmc_host *host, int addr) 267 { 268 return readw(host->ctl + (addr << host->bus_shift)) | 269 readw(host->ctl + ((addr + 2) << host->bus_shift)) << 16; 270 } 271 272 static inline void sd_ctrl_read32_rep(struct tmio_mmc_host *host, int addr, 273 u32 *buf, int count) 274 { 275 readsl(host->ctl + (addr << host->bus_shift), buf, count); 276 } 277 278 static inline void sd_ctrl_write16(struct tmio_mmc_host *host, int addr, u16 val) 279 { 280 /* If there is a hook and it returns non-zero then there 281 * is an error and the write should be skipped 282 */ 283 if (host->write16_hook && host->write16_hook(host, addr)) 284 return; 285 writew(val, host->ctl + (addr << host->bus_shift)); 286 } 287 288 static inline void sd_ctrl_write16_rep(struct tmio_mmc_host *host, int addr, 289 u16 *buf, int count) 290 { 291 writesw(host->ctl + (addr << host->bus_shift), buf, count); 292 } 293 294 static inline void sd_ctrl_write32_as_16_and_16(struct tmio_mmc_host *host, int addr, u32 val) 295 { 296 writew(val & 0xffff, host->ctl + (addr << host->bus_shift)); 297 writew(val >> 16, host->ctl + ((addr + 2) << host->bus_shift)); 298 } 299 300 static inline void sd_ctrl_write32_rep(struct tmio_mmc_host *host, int addr, 301 const u32 *buf, int count) 302 { 303 writesl(host->ctl + (addr << host->bus_shift), buf, count); 304 } 305 306 #endif 307