1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Driver for the MMC / SD / SDIO cell found in: 4 * 5 * TC6393XB TC6391XB TC6387XB T7L66XB ASIC3 6 * 7 * Copyright (C) 2015-17 Renesas Electronics Corporation 8 * Copyright (C) 2016-17 Sang Engineering, Wolfram Sang 9 * Copyright (C) 2016-17 Horms Solutions, Simon Horman 10 * Copyright (C) 2007 Ian Molton 11 * Copyright (C) 2004 Ian Molton 12 */ 13 14 #ifndef TMIO_MMC_H 15 #define TMIO_MMC_H 16 17 #include <linux/dmaengine.h> 18 #include <linux/highmem.h> 19 #include <linux/mutex.h> 20 #include <linux/pagemap.h> 21 #include <linux/scatterlist.h> 22 #include <linux/spinlock.h> 23 #include <linux/interrupt.h> 24 25 #define CTL_SD_CMD 0x00 26 #define CTL_ARG_REG 0x04 27 #define CTL_STOP_INTERNAL_ACTION 0x08 28 #define CTL_XFER_BLK_COUNT 0xa 29 #define CTL_RESPONSE 0x0c 30 /* driver merges STATUS and following STATUS2 */ 31 #define CTL_STATUS 0x1c 32 /* driver merges IRQ_MASK and following IRQ_MASK2 */ 33 #define CTL_IRQ_MASK 0x20 34 #define CTL_SD_CARD_CLK_CTL 0x24 35 #define CTL_SD_XFER_LEN 0x26 36 #define CTL_SD_MEM_CARD_OPT 0x28 37 #define CTL_SD_ERROR_DETAIL_STATUS 0x2c 38 #define CTL_SD_DATA_PORT 0x30 39 #define CTL_TRANSACTION_CTL 0x34 40 #define CTL_SDIO_STATUS 0x36 41 #define CTL_SDIO_IRQ_MASK 0x38 42 #define CTL_DMA_ENABLE 0xd8 43 #define CTL_RESET_SD 0xe0 44 #define CTL_VERSION 0xe2 45 #define CTL_SDIF_MODE 0xe6 46 47 /* Definitions for values the CTL_STOP_INTERNAL_ACTION register can take */ 48 #define TMIO_STOP_STP BIT(0) 49 #define TMIO_STOP_SEC BIT(8) 50 51 /* Definitions for values the CTL_STATUS register can take */ 52 #define TMIO_STAT_CMDRESPEND BIT(0) 53 #define TMIO_STAT_DATAEND BIT(2) 54 #define TMIO_STAT_CARD_REMOVE BIT(3) 55 #define TMIO_STAT_CARD_INSERT BIT(4) 56 #define TMIO_STAT_SIGSTATE BIT(5) 57 #define TMIO_STAT_WRPROTECT BIT(7) 58 #define TMIO_STAT_CARD_REMOVE_A BIT(8) 59 #define TMIO_STAT_CARD_INSERT_A BIT(9) 60 #define TMIO_STAT_SIGSTATE_A BIT(10) 61 62 /* These belong technically to CTL_STATUS2, but the driver merges them */ 63 #define TMIO_STAT_CMD_IDX_ERR BIT(16) 64 #define TMIO_STAT_CRCFAIL BIT(17) 65 #define TMIO_STAT_STOPBIT_ERR BIT(18) 66 #define TMIO_STAT_DATATIMEOUT BIT(19) 67 #define TMIO_STAT_RXOVERFLOW BIT(20) 68 #define TMIO_STAT_TXUNDERRUN BIT(21) 69 #define TMIO_STAT_CMDTIMEOUT BIT(22) 70 #define TMIO_STAT_DAT0 BIT(23) /* only known on R-Car so far */ 71 #define TMIO_STAT_RXRDY BIT(24) 72 #define TMIO_STAT_TXRQ BIT(25) 73 #define TMIO_STAT_ILL_FUNC BIT(29) /* only when !TMIO_MMC_HAS_IDLE_WAIT */ 74 #define TMIO_STAT_SCLKDIVEN BIT(29) /* only when TMIO_MMC_HAS_IDLE_WAIT */ 75 #define TMIO_STAT_CMD_BUSY BIT(30) 76 #define TMIO_STAT_ILL_ACCESS BIT(31) 77 78 /* Definitions for values the CTL_SD_CARD_CLK_CTL register can take */ 79 #define CLK_CTL_DIV_MASK 0xff 80 #define CLK_CTL_SCLKEN BIT(8) 81 82 /* Definitions for values the CTL_SD_MEM_CARD_OPT register can take */ 83 #define CARD_OPT_WIDTH8 BIT(13) 84 #define CARD_OPT_WIDTH BIT(15) 85 86 /* Definitions for values the CTL_SDIO_STATUS register can take */ 87 #define TMIO_SDIO_STAT_IOIRQ 0x0001 88 #define TMIO_SDIO_STAT_EXPUB52 0x4000 89 #define TMIO_SDIO_STAT_EXWT 0x8000 90 #define TMIO_SDIO_MASK_ALL 0xc007 91 92 #define TMIO_SDIO_SETBITS_MASK 0x0006 93 94 /* Definitions for values the CTL_DMA_ENABLE register can take */ 95 #define DMA_ENABLE_DMASDRW BIT(1) 96 97 /* Define some IRQ masks */ 98 /* This is the mask used at reset by the chip */ 99 #define TMIO_MASK_ALL 0x837f031d 100 #define TMIO_MASK_READOP (TMIO_STAT_RXRDY | TMIO_STAT_DATAEND) 101 #define TMIO_MASK_WRITEOP (TMIO_STAT_TXRQ | TMIO_STAT_DATAEND) 102 #define TMIO_MASK_CMD (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT | \ 103 TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT) 104 #define TMIO_MASK_IRQ (TMIO_MASK_READOP | TMIO_MASK_WRITEOP | TMIO_MASK_CMD) 105 106 struct tmio_mmc_data; 107 struct tmio_mmc_host; 108 109 struct tmio_mmc_dma_ops { 110 void (*start)(struct tmio_mmc_host *host, struct mmc_data *data); 111 void (*enable)(struct tmio_mmc_host *host, bool enable); 112 void (*request)(struct tmio_mmc_host *host, 113 struct tmio_mmc_data *pdata); 114 void (*release)(struct tmio_mmc_host *host); 115 void (*abort)(struct tmio_mmc_host *host); 116 void (*dataend)(struct tmio_mmc_host *host); 117 }; 118 119 struct tmio_mmc_host { 120 void __iomem *ctl; 121 struct mmc_command *cmd; 122 struct mmc_request *mrq; 123 struct mmc_data *data; 124 struct mmc_host *mmc; 125 struct mmc_host_ops ops; 126 127 /* Callbacks for clock / power control */ 128 void (*set_pwr)(struct platform_device *host, int state); 129 130 /* pio related stuff */ 131 struct scatterlist *sg_ptr; 132 struct scatterlist *sg_orig; 133 unsigned int sg_len; 134 unsigned int sg_off; 135 unsigned int bus_shift; 136 137 struct platform_device *pdev; 138 struct tmio_mmc_data *pdata; 139 140 /* DMA support */ 141 bool dma_on; 142 struct dma_chan *chan_rx; 143 struct dma_chan *chan_tx; 144 struct tasklet_struct dma_issue; 145 struct scatterlist bounce_sg; 146 u8 *bounce_buf; 147 148 /* Track lost interrupts */ 149 struct delayed_work delayed_reset_work; 150 struct work_struct done; 151 152 /* Cache */ 153 u32 sdcard_irq_mask; 154 u32 sdio_irq_mask; 155 unsigned int clk_cache; 156 157 spinlock_t lock; /* protect host private data */ 158 unsigned long last_req_ts; 159 struct mutex ios_lock; /* protect set_ios() context */ 160 bool native_hotplug; 161 bool sdio_irq_enabled; 162 163 /* Mandatory callback */ 164 int (*clk_enable)(struct tmio_mmc_host *host); 165 void (*set_clock)(struct tmio_mmc_host *host, unsigned int clock); 166 167 /* Optional callbacks */ 168 void (*clk_disable)(struct tmio_mmc_host *host); 169 int (*multi_io_quirk)(struct mmc_card *card, 170 unsigned int direction, int blk_size); 171 int (*write16_hook)(struct tmio_mmc_host *host, int addr); 172 void (*reset)(struct tmio_mmc_host *host); 173 void (*hw_reset)(struct tmio_mmc_host *host); 174 void (*prepare_tuning)(struct tmio_mmc_host *host, unsigned long tap); 175 bool (*check_scc_error)(struct tmio_mmc_host *host); 176 177 /* 178 * Mandatory callback for tuning to occur which is optional for SDR50 179 * and mandatory for SDR104. 180 */ 181 unsigned int (*init_tuning)(struct tmio_mmc_host *host); 182 int (*select_tuning)(struct tmio_mmc_host *host); 183 184 /* Tuning values: 1 for success, 0 for failure */ 185 DECLARE_BITMAP(taps, BITS_PER_BYTE * sizeof(long)); 186 unsigned int tap_num; 187 unsigned long tap_set; 188 189 void (*prepare_hs400_tuning)(struct tmio_mmc_host *host); 190 void (*hs400_downgrade)(struct tmio_mmc_host *host); 191 void (*hs400_complete)(struct tmio_mmc_host *host); 192 193 const struct tmio_mmc_dma_ops *dma_ops; 194 }; 195 196 struct tmio_mmc_host *tmio_mmc_host_alloc(struct platform_device *pdev, 197 struct tmio_mmc_data *pdata); 198 void tmio_mmc_host_free(struct tmio_mmc_host *host); 199 int tmio_mmc_host_probe(struct tmio_mmc_host *host); 200 void tmio_mmc_host_remove(struct tmio_mmc_host *host); 201 void tmio_mmc_do_data_irq(struct tmio_mmc_host *host); 202 203 void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i); 204 void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i); 205 irqreturn_t tmio_mmc_irq(int irq, void *devid); 206 207 static inline char *tmio_mmc_kmap_atomic(struct scatterlist *sg, 208 unsigned long *flags) 209 { 210 local_irq_save(*flags); 211 return kmap_atomic(sg_page(sg)) + sg->offset; 212 } 213 214 static inline void tmio_mmc_kunmap_atomic(struct scatterlist *sg, 215 unsigned long *flags, void *virt) 216 { 217 kunmap_atomic(virt - sg->offset); 218 local_irq_restore(*flags); 219 } 220 221 #ifdef CONFIG_PM 222 int tmio_mmc_host_runtime_suspend(struct device *dev); 223 int tmio_mmc_host_runtime_resume(struct device *dev); 224 #endif 225 226 static inline u16 sd_ctrl_read16(struct tmio_mmc_host *host, int addr) 227 { 228 return ioread16(host->ctl + (addr << host->bus_shift)); 229 } 230 231 static inline void sd_ctrl_read16_rep(struct tmio_mmc_host *host, int addr, 232 u16 *buf, int count) 233 { 234 ioread16_rep(host->ctl + (addr << host->bus_shift), buf, count); 235 } 236 237 static inline u32 sd_ctrl_read16_and_16_as_32(struct tmio_mmc_host *host, 238 int addr) 239 { 240 return ioread16(host->ctl + (addr << host->bus_shift)) | 241 ioread16(host->ctl + ((addr + 2) << host->bus_shift)) << 16; 242 } 243 244 static inline void sd_ctrl_read32_rep(struct tmio_mmc_host *host, int addr, 245 u32 *buf, int count) 246 { 247 ioread32_rep(host->ctl + (addr << host->bus_shift), buf, count); 248 } 249 250 static inline void sd_ctrl_write16(struct tmio_mmc_host *host, int addr, 251 u16 val) 252 { 253 /* If there is a hook and it returns non-zero then there 254 * is an error and the write should be skipped 255 */ 256 if (host->write16_hook && host->write16_hook(host, addr)) 257 return; 258 iowrite16(val, host->ctl + (addr << host->bus_shift)); 259 } 260 261 static inline void sd_ctrl_write16_rep(struct tmio_mmc_host *host, int addr, 262 u16 *buf, int count) 263 { 264 iowrite16_rep(host->ctl + (addr << host->bus_shift), buf, count); 265 } 266 267 static inline void sd_ctrl_write32_as_16_and_16(struct tmio_mmc_host *host, 268 int addr, u32 val) 269 { 270 iowrite16(val & 0xffff, host->ctl + (addr << host->bus_shift)); 271 iowrite16(val >> 16, host->ctl + ((addr + 2) << host->bus_shift)); 272 } 273 274 static inline void sd_ctrl_write32_rep(struct tmio_mmc_host *host, int addr, 275 const u32 *buf, int count) 276 { 277 iowrite32_rep(host->ctl + (addr << host->bus_shift), buf, count); 278 } 279 280 #endif 281