xref: /openbmc/linux/drivers/mmc/host/tmio_mmc.h (revision 184adf20)
1 /*
2  * linux/drivers/mmc/host/tmio_mmc.h
3  *
4  * Copyright (C) 2016 Sang Engineering, Wolfram Sang
5  * Copyright (C) 2015-16 Renesas Electronics Corporation
6  * Copyright (C) 2007 Ian Molton
7  * Copyright (C) 2004 Ian Molton
8  *
9  * This program is free software; you can redistribute it and/or modify
10  * it under the terms of the GNU General Public License version 2 as
11  * published by the Free Software Foundation.
12  *
13  * Driver for the MMC / SD / SDIO cell found in:
14  *
15  * TC6393XB TC6391XB TC6387XB T7L66XB ASIC3
16  */
17 
18 #ifndef TMIO_MMC_H
19 #define TMIO_MMC_H
20 
21 #include <linux/dmaengine.h>
22 #include <linux/highmem.h>
23 #include <linux/mutex.h>
24 #include <linux/pagemap.h>
25 #include <linux/scatterlist.h>
26 #include <linux/spinlock.h>
27 
28 #define CTL_SD_CMD 0x00
29 #define CTL_ARG_REG 0x04
30 #define CTL_STOP_INTERNAL_ACTION 0x08
31 #define CTL_XFER_BLK_COUNT 0xa
32 #define CTL_RESPONSE 0x0c
33 /* driver merges STATUS and following STATUS2 */
34 #define CTL_STATUS 0x1c
35 /* driver merges IRQ_MASK and following IRQ_MASK2 */
36 #define CTL_IRQ_MASK 0x20
37 #define CTL_SD_CARD_CLK_CTL 0x24
38 #define CTL_SD_XFER_LEN 0x26
39 #define CTL_SD_MEM_CARD_OPT 0x28
40 #define CTL_SD_ERROR_DETAIL_STATUS 0x2c
41 #define CTL_SD_DATA_PORT 0x30
42 #define CTL_TRANSACTION_CTL 0x34
43 #define CTL_SDIO_STATUS 0x36
44 #define CTL_SDIO_IRQ_MASK 0x38
45 #define CTL_DMA_ENABLE 0xd8
46 #define CTL_RESET_SD 0xe0
47 #define CTL_VERSION 0xe2
48 #define CTL_SDIO_REGS 0x100
49 #define CTL_CLK_AND_WAIT_CTL 0x138
50 #define CTL_RESET_SDIO 0x1e0
51 
52 /* Definitions for values the CTRL_STATUS register can take. */
53 #define TMIO_STAT_CMDRESPEND    BIT(0)
54 #define TMIO_STAT_DATAEND       BIT(2)
55 #define TMIO_STAT_CARD_REMOVE   BIT(3)
56 #define TMIO_STAT_CARD_INSERT   BIT(4)
57 #define TMIO_STAT_SIGSTATE      BIT(5)
58 #define TMIO_STAT_WRPROTECT     BIT(7)
59 #define TMIO_STAT_CARD_REMOVE_A BIT(8)
60 #define TMIO_STAT_CARD_INSERT_A BIT(9)
61 #define TMIO_STAT_SIGSTATE_A    BIT(10)
62 
63 /* These belong technically to CTRL_STATUS2, but the driver merges them */
64 #define TMIO_STAT_CMD_IDX_ERR   BIT(16)
65 #define TMIO_STAT_CRCFAIL       BIT(17)
66 #define TMIO_STAT_STOPBIT_ERR   BIT(18)
67 #define TMIO_STAT_DATATIMEOUT   BIT(19)
68 #define TMIO_STAT_RXOVERFLOW    BIT(20)
69 #define TMIO_STAT_TXUNDERRUN    BIT(21)
70 #define TMIO_STAT_CMDTIMEOUT    BIT(22)
71 #define TMIO_STAT_DAT0		BIT(23)	/* only known on R-Car so far */
72 #define TMIO_STAT_RXRDY         BIT(24)
73 #define TMIO_STAT_TXRQ          BIT(25)
74 #define TMIO_STAT_ILL_FUNC      BIT(29) /* only when !TMIO_MMC_HAS_IDLE_WAIT */
75 #define TMIO_STAT_SCLKDIVEN     BIT(29) /* only when TMIO_MMC_HAS_IDLE_WAIT */
76 #define TMIO_STAT_CMD_BUSY      BIT(30)
77 #define TMIO_STAT_ILL_ACCESS    BIT(31)
78 
79 #define	CLK_CTL_DIV_MASK	0xff
80 #define	CLK_CTL_SCLKEN		BIT(8)
81 
82 #define TMIO_BBS		512		/* Boot block size */
83 
84 /* Definitions for values the CTRL_SDIO_STATUS register can take. */
85 #define TMIO_SDIO_STAT_IOIRQ	0x0001
86 #define TMIO_SDIO_STAT_EXPUB52	0x4000
87 #define TMIO_SDIO_STAT_EXWT	0x8000
88 #define TMIO_SDIO_MASK_ALL	0xc007
89 
90 /* Define some IRQ masks */
91 /* This is the mask used at reset by the chip */
92 #define TMIO_MASK_ALL           0x837f031d
93 #define TMIO_MASK_READOP  (TMIO_STAT_RXRDY | TMIO_STAT_DATAEND)
94 #define TMIO_MASK_WRITEOP (TMIO_STAT_TXRQ | TMIO_STAT_DATAEND)
95 #define TMIO_MASK_CMD     (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT | \
96 		TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT)
97 #define TMIO_MASK_IRQ     (TMIO_MASK_READOP | TMIO_MASK_WRITEOP | TMIO_MASK_CMD)
98 
99 struct tmio_mmc_data;
100 struct tmio_mmc_host;
101 
102 struct tmio_mmc_dma {
103 	enum dma_slave_buswidth dma_buswidth;
104 	bool (*filter)(struct dma_chan *chan, void *arg);
105 	void (*enable)(struct tmio_mmc_host *host, bool enable);
106 };
107 
108 struct tmio_mmc_host {
109 	void __iomem *ctl;
110 	struct mmc_command      *cmd;
111 	struct mmc_request      *mrq;
112 	struct mmc_data         *data;
113 	struct mmc_host         *mmc;
114 
115 	/* Callbacks for clock / power control */
116 	void (*set_pwr)(struct platform_device *host, int state);
117 	void (*set_clk_div)(struct platform_device *host, int state);
118 
119 	/* pio related stuff */
120 	struct scatterlist      *sg_ptr;
121 	struct scatterlist      *sg_orig;
122 	unsigned int            sg_len;
123 	unsigned int            sg_off;
124 	unsigned long		bus_shift;
125 
126 	struct platform_device *pdev;
127 	struct tmio_mmc_data *pdata;
128 	struct tmio_mmc_dma	*dma;
129 
130 	/* DMA support */
131 	bool			force_pio;
132 	struct dma_chan		*chan_rx;
133 	struct dma_chan		*chan_tx;
134 	struct tasklet_struct	dma_complete;
135 	struct tasklet_struct	dma_issue;
136 	struct scatterlist	bounce_sg;
137 	u8			*bounce_buf;
138 
139 	/* Track lost interrupts */
140 	struct delayed_work	delayed_reset_work;
141 	struct work_struct	done;
142 
143 	/* Cache */
144 	u32			sdcard_irq_mask;
145 	u32			sdio_irq_mask;
146 	unsigned int		clk_cache;
147 
148 	spinlock_t		lock;		/* protect host private data */
149 	unsigned long		last_req_ts;
150 	struct mutex		ios_lock;	/* protect set_ios() context */
151 	bool			native_hotplug;
152 	bool			sdio_irq_enabled;
153 
154 	int (*write16_hook)(struct tmio_mmc_host *host, int addr);
155 	int (*clk_enable)(struct tmio_mmc_host *host);
156 	unsigned int (*clk_update)(struct tmio_mmc_host *host,
157 				   unsigned int new_clock);
158 	void (*clk_disable)(struct tmio_mmc_host *host);
159 	int (*multi_io_quirk)(struct mmc_card *card,
160 			      unsigned int direction, int blk_size);
161 	int (*start_signal_voltage_switch)(struct mmc_host *mmc,
162 					   struct mmc_ios *ios);
163 };
164 
165 struct tmio_mmc_host *tmio_mmc_host_alloc(struct platform_device *pdev);
166 void tmio_mmc_host_free(struct tmio_mmc_host *host);
167 int tmio_mmc_host_probe(struct tmio_mmc_host *host,
168 			struct tmio_mmc_data *pdata);
169 void tmio_mmc_host_remove(struct tmio_mmc_host *host);
170 void tmio_mmc_do_data_irq(struct tmio_mmc_host *host);
171 
172 void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i);
173 void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i);
174 irqreturn_t tmio_mmc_irq(int irq, void *devid);
175 
176 static inline char *tmio_mmc_kmap_atomic(struct scatterlist *sg,
177 					 unsigned long *flags)
178 {
179 	local_irq_save(*flags);
180 	return kmap_atomic(sg_page(sg)) + sg->offset;
181 }
182 
183 static inline void tmio_mmc_kunmap_atomic(struct scatterlist *sg,
184 					  unsigned long *flags, void *virt)
185 {
186 	kunmap_atomic(virt - sg->offset);
187 	local_irq_restore(*flags);
188 }
189 
190 #if defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE)
191 void tmio_mmc_start_dma(struct tmio_mmc_host *host, struct mmc_data *data);
192 void tmio_mmc_enable_dma(struct tmio_mmc_host *host, bool enable);
193 void tmio_mmc_request_dma(struct tmio_mmc_host *host, struct tmio_mmc_data *pdata);
194 void tmio_mmc_release_dma(struct tmio_mmc_host *host);
195 void tmio_mmc_abort_dma(struct tmio_mmc_host *host);
196 #else
197 static inline void tmio_mmc_start_dma(struct tmio_mmc_host *host,
198 			       struct mmc_data *data)
199 {
200 }
201 
202 static inline void tmio_mmc_enable_dma(struct tmio_mmc_host *host, bool enable)
203 {
204 }
205 
206 static inline void tmio_mmc_request_dma(struct tmio_mmc_host *host,
207 				 struct tmio_mmc_data *pdata)
208 {
209 	host->chan_tx = NULL;
210 	host->chan_rx = NULL;
211 }
212 
213 static inline void tmio_mmc_release_dma(struct tmio_mmc_host *host)
214 {
215 }
216 
217 static inline void tmio_mmc_abort_dma(struct tmio_mmc_host *host)
218 {
219 }
220 #endif
221 
222 #ifdef CONFIG_PM
223 int tmio_mmc_host_runtime_suspend(struct device *dev);
224 int tmio_mmc_host_runtime_resume(struct device *dev);
225 #endif
226 
227 static inline u16 sd_ctrl_read16(struct tmio_mmc_host *host, int addr)
228 {
229 	return readw(host->ctl + (addr << host->bus_shift));
230 }
231 
232 static inline void sd_ctrl_read16_rep(struct tmio_mmc_host *host, int addr,
233 		u16 *buf, int count)
234 {
235 	readsw(host->ctl + (addr << host->bus_shift), buf, count);
236 }
237 
238 static inline u32 sd_ctrl_read16_and_16_as_32(struct tmio_mmc_host *host, int addr)
239 {
240 	return readw(host->ctl + (addr << host->bus_shift)) |
241 	       readw(host->ctl + ((addr + 2) << host->bus_shift)) << 16;
242 }
243 
244 static inline void sd_ctrl_write16(struct tmio_mmc_host *host, int addr, u16 val)
245 {
246 	/* If there is a hook and it returns non-zero then there
247 	 * is an error and the write should be skipped
248 	 */
249 	if (host->write16_hook && host->write16_hook(host, addr))
250 		return;
251 	writew(val, host->ctl + (addr << host->bus_shift));
252 }
253 
254 static inline void sd_ctrl_write16_rep(struct tmio_mmc_host *host, int addr,
255 		u16 *buf, int count)
256 {
257 	writesw(host->ctl + (addr << host->bus_shift), buf, count);
258 }
259 
260 static inline void sd_ctrl_write32_as_16_and_16(struct tmio_mmc_host *host, int addr, u32 val)
261 {
262 	writew(val, host->ctl + (addr << host->bus_shift));
263 	writew(val >> 16, host->ctl + ((addr + 2) << host->bus_shift));
264 }
265 
266 #endif
267