1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Driver for the MMC / SD / SDIO cell found in: 4 * 5 * TC6393XB TC6391XB TC6387XB T7L66XB ASIC3 6 * 7 * Copyright (C) 2015-19 Renesas Electronics Corporation 8 * Copyright (C) 2016-19 Sang Engineering, Wolfram Sang 9 * Copyright (C) 2016-17 Horms Solutions, Simon Horman 10 * Copyright (C) 2007 Ian Molton 11 * Copyright (C) 2004 Ian Molton 12 */ 13 14 #ifndef TMIO_MMC_H 15 #define TMIO_MMC_H 16 17 #include <linux/dmaengine.h> 18 #include <linux/highmem.h> 19 #include <linux/mutex.h> 20 #include <linux/pagemap.h> 21 #include <linux/scatterlist.h> 22 #include <linux/spinlock.h> 23 #include <linux/interrupt.h> 24 25 #define CTL_SD_CMD 0x00 26 #define CTL_ARG_REG 0x04 27 #define CTL_STOP_INTERNAL_ACTION 0x08 28 #define CTL_XFER_BLK_COUNT 0xa 29 #define CTL_RESPONSE 0x0c 30 /* driver merges STATUS and following STATUS2 */ 31 #define CTL_STATUS 0x1c 32 /* driver merges IRQ_MASK and following IRQ_MASK2 */ 33 #define CTL_IRQ_MASK 0x20 34 #define CTL_SD_CARD_CLK_CTL 0x24 35 #define CTL_SD_XFER_LEN 0x26 36 #define CTL_SD_MEM_CARD_OPT 0x28 37 #define CTL_SD_ERROR_DETAIL_STATUS 0x2c 38 #define CTL_SD_DATA_PORT 0x30 39 #define CTL_TRANSACTION_CTL 0x34 40 #define CTL_SDIO_STATUS 0x36 41 #define CTL_SDIO_IRQ_MASK 0x38 42 #define CTL_DMA_ENABLE 0xd8 43 #define CTL_RESET_SD 0xe0 44 #define CTL_VERSION 0xe2 45 46 /* Definitions for values the CTL_STOP_INTERNAL_ACTION register can take */ 47 #define TMIO_STOP_STP BIT(0) 48 #define TMIO_STOP_SEC BIT(8) 49 50 /* Definitions for values the CTL_STATUS register can take */ 51 #define TMIO_STAT_CMDRESPEND BIT(0) 52 #define TMIO_STAT_DATAEND BIT(2) 53 #define TMIO_STAT_CARD_REMOVE BIT(3) 54 #define TMIO_STAT_CARD_INSERT BIT(4) 55 #define TMIO_STAT_SIGSTATE BIT(5) 56 #define TMIO_STAT_WRPROTECT BIT(7) 57 #define TMIO_STAT_CARD_REMOVE_A BIT(8) 58 #define TMIO_STAT_CARD_INSERT_A BIT(9) 59 #define TMIO_STAT_SIGSTATE_A BIT(10) 60 61 /* These belong technically to CTL_STATUS2, but the driver merges them */ 62 #define TMIO_STAT_CMD_IDX_ERR BIT(16) 63 #define TMIO_STAT_CRCFAIL BIT(17) 64 #define TMIO_STAT_STOPBIT_ERR BIT(18) 65 #define TMIO_STAT_DATATIMEOUT BIT(19) 66 #define TMIO_STAT_RXOVERFLOW BIT(20) 67 #define TMIO_STAT_TXUNDERRUN BIT(21) 68 #define TMIO_STAT_CMDTIMEOUT BIT(22) 69 #define TMIO_STAT_DAT0 BIT(23) /* only known on R-Car so far */ 70 #define TMIO_STAT_RXRDY BIT(24) 71 #define TMIO_STAT_TXRQ BIT(25) 72 #define TMIO_STAT_ALWAYS_SET_27 BIT(27) /* only known on R-Car 2+ so far */ 73 #define TMIO_STAT_ILL_FUNC BIT(29) /* only when !TMIO_MMC_HAS_IDLE_WAIT */ 74 #define TMIO_STAT_SCLKDIVEN BIT(29) /* only when TMIO_MMC_HAS_IDLE_WAIT */ 75 #define TMIO_STAT_CMD_BUSY BIT(30) 76 #define TMIO_STAT_ILL_ACCESS BIT(31) 77 78 /* Definitions for values the CTL_SD_CARD_CLK_CTL register can take */ 79 #define CLK_CTL_DIV_MASK 0xff 80 #define CLK_CTL_SCLKEN BIT(8) 81 82 /* Definitions for values the CTL_SD_MEM_CARD_OPT register can take */ 83 #define CARD_OPT_WIDTH8 BIT(13) 84 #define CARD_OPT_WIDTH BIT(15) 85 86 /* Definitions for values the CTL_SDIO_STATUS register can take */ 87 #define TMIO_SDIO_STAT_IOIRQ 0x0001 88 #define TMIO_SDIO_STAT_EXPUB52 0x4000 89 #define TMIO_SDIO_STAT_EXWT 0x8000 90 #define TMIO_SDIO_MASK_ALL 0xc007 91 92 #define TMIO_SDIO_SETBITS_MASK 0x0006 93 94 /* Definitions for values the CTL_DMA_ENABLE register can take */ 95 #define DMA_ENABLE_DMASDRW BIT(1) 96 97 /* Define some IRQ masks */ 98 /* This is the mask used at reset by the chip */ 99 #define TMIO_MASK_INIT_RCAR2 0x8b7f031d /* Initial value for R-Car Gen2+ */ 100 #define TMIO_MASK_ALL 0x837f031d 101 #define TMIO_MASK_READOP (TMIO_STAT_RXRDY | TMIO_STAT_DATAEND) 102 #define TMIO_MASK_WRITEOP (TMIO_STAT_TXRQ | TMIO_STAT_DATAEND) 103 #define TMIO_MASK_CMD (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT | \ 104 TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT) 105 #define TMIO_MASK_IRQ (TMIO_MASK_READOP | TMIO_MASK_WRITEOP | TMIO_MASK_CMD) 106 107 #define TMIO_MAX_BLK_SIZE 512 108 109 struct tmio_mmc_data; 110 struct tmio_mmc_host; 111 112 struct tmio_mmc_dma_ops { 113 void (*start)(struct tmio_mmc_host *host, struct mmc_data *data); 114 void (*enable)(struct tmio_mmc_host *host, bool enable); 115 void (*request)(struct tmio_mmc_host *host, 116 struct tmio_mmc_data *pdata); 117 void (*release)(struct tmio_mmc_host *host); 118 void (*abort)(struct tmio_mmc_host *host); 119 void (*dataend)(struct tmio_mmc_host *host); 120 121 /* optional */ 122 void (*end)(struct tmio_mmc_host *host); /* held host->lock */ 123 }; 124 125 struct tmio_mmc_host { 126 void __iomem *ctl; 127 struct mmc_command *cmd; 128 struct mmc_request *mrq; 129 struct mmc_data *data; 130 struct mmc_host *mmc; 131 struct mmc_host_ops ops; 132 133 /* Callbacks for clock / power control */ 134 void (*set_pwr)(struct platform_device *host, int state); 135 136 /* pio related stuff */ 137 struct scatterlist *sg_ptr; 138 struct scatterlist *sg_orig; 139 unsigned int sg_len; 140 unsigned int sg_off; 141 unsigned int bus_shift; 142 143 struct platform_device *pdev; 144 struct tmio_mmc_data *pdata; 145 146 /* DMA support */ 147 bool dma_on; 148 struct dma_chan *chan_rx; 149 struct dma_chan *chan_tx; 150 struct tasklet_struct dma_issue; 151 struct scatterlist bounce_sg; 152 u8 *bounce_buf; 153 154 /* Track lost interrupts */ 155 struct delayed_work delayed_reset_work; 156 struct work_struct done; 157 158 /* Cache */ 159 u32 sdcard_irq_mask; 160 u32 sdio_irq_mask; 161 unsigned int clk_cache; 162 u32 sdcard_irq_setbit_mask; 163 164 spinlock_t lock; /* protect host private data */ 165 unsigned long last_req_ts; 166 struct mutex ios_lock; /* protect set_ios() context */ 167 bool native_hotplug; 168 bool sdio_irq_enabled; 169 170 /* Mandatory callback */ 171 int (*clk_enable)(struct tmio_mmc_host *host); 172 void (*set_clock)(struct tmio_mmc_host *host, unsigned int clock); 173 174 /* Optional callbacks */ 175 void (*clk_disable)(struct tmio_mmc_host *host); 176 int (*multi_io_quirk)(struct mmc_card *card, 177 unsigned int direction, int blk_size); 178 int (*write16_hook)(struct tmio_mmc_host *host, int addr); 179 void (*reset)(struct tmio_mmc_host *host); 180 bool (*check_retune)(struct tmio_mmc_host *host); 181 void (*fixup_request)(struct tmio_mmc_host *host, struct mmc_request *mrq); 182 183 void (*prepare_hs400_tuning)(struct tmio_mmc_host *host); 184 void (*hs400_downgrade)(struct tmio_mmc_host *host); 185 void (*hs400_complete)(struct tmio_mmc_host *host); 186 187 const struct tmio_mmc_dma_ops *dma_ops; 188 }; 189 190 struct tmio_mmc_host *tmio_mmc_host_alloc(struct platform_device *pdev, 191 struct tmio_mmc_data *pdata); 192 void tmio_mmc_host_free(struct tmio_mmc_host *host); 193 int tmio_mmc_host_probe(struct tmio_mmc_host *host); 194 void tmio_mmc_host_remove(struct tmio_mmc_host *host); 195 void tmio_mmc_do_data_irq(struct tmio_mmc_host *host); 196 197 void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i); 198 void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i); 199 irqreturn_t tmio_mmc_irq(int irq, void *devid); 200 201 static inline char *tmio_mmc_kmap_atomic(struct scatterlist *sg, 202 unsigned long *flags) 203 { 204 local_irq_save(*flags); 205 return kmap_atomic(sg_page(sg)) + sg->offset; 206 } 207 208 static inline void tmio_mmc_kunmap_atomic(struct scatterlist *sg, 209 unsigned long *flags, void *virt) 210 { 211 kunmap_atomic(virt - sg->offset); 212 local_irq_restore(*flags); 213 } 214 215 #ifdef CONFIG_PM 216 int tmio_mmc_host_runtime_suspend(struct device *dev); 217 int tmio_mmc_host_runtime_resume(struct device *dev); 218 #endif 219 220 static inline u16 sd_ctrl_read16(struct tmio_mmc_host *host, int addr) 221 { 222 return ioread16(host->ctl + (addr << host->bus_shift)); 223 } 224 225 static inline void sd_ctrl_read16_rep(struct tmio_mmc_host *host, int addr, 226 u16 *buf, int count) 227 { 228 ioread16_rep(host->ctl + (addr << host->bus_shift), buf, count); 229 } 230 231 static inline u32 sd_ctrl_read16_and_16_as_32(struct tmio_mmc_host *host, 232 int addr) 233 { 234 return ioread16(host->ctl + (addr << host->bus_shift)) | 235 ioread16(host->ctl + ((addr + 2) << host->bus_shift)) << 16; 236 } 237 238 static inline void sd_ctrl_read32_rep(struct tmio_mmc_host *host, int addr, 239 u32 *buf, int count) 240 { 241 ioread32_rep(host->ctl + (addr << host->bus_shift), buf, count); 242 } 243 244 static inline void sd_ctrl_write16(struct tmio_mmc_host *host, int addr, 245 u16 val) 246 { 247 /* If there is a hook and it returns non-zero then there 248 * is an error and the write should be skipped 249 */ 250 if (host->write16_hook && host->write16_hook(host, addr)) 251 return; 252 iowrite16(val, host->ctl + (addr << host->bus_shift)); 253 } 254 255 static inline void sd_ctrl_write16_rep(struct tmio_mmc_host *host, int addr, 256 u16 *buf, int count) 257 { 258 iowrite16_rep(host->ctl + (addr << host->bus_shift), buf, count); 259 } 260 261 static inline void sd_ctrl_write32_as_16_and_16(struct tmio_mmc_host *host, 262 int addr, u32 val) 263 { 264 if (addr == CTL_IRQ_MASK || addr == CTL_STATUS) 265 val |= host->sdcard_irq_setbit_mask; 266 267 iowrite16(val & 0xffff, host->ctl + (addr << host->bus_shift)); 268 iowrite16(val >> 16, host->ctl + ((addr + 2) << host->bus_shift)); 269 } 270 271 static inline void sd_ctrl_write32(struct tmio_mmc_host *host, int addr, u32 val) 272 { 273 iowrite32(val, host->ctl + (addr << host->bus_shift)); 274 } 275 276 static inline void sd_ctrl_write32_rep(struct tmio_mmc_host *host, int addr, 277 const u32 *buf, int count) 278 { 279 iowrite32_rep(host->ctl + (addr << host->bus_shift), buf, count); 280 } 281 282 #endif 283