1 /* 2 * tifm_sd.c - TI FlashMedia driver 3 * 4 * Copyright (C) 2006 Alex Dubov <oakad@yahoo.com> 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 * 10 * Special thanks to Brad Campbell for extensive testing of this driver. 11 * 12 */ 13 14 15 #include <linux/tifm.h> 16 #include <linux/mmc/host.h> 17 #include <linux/highmem.h> 18 #include <linux/scatterlist.h> 19 #include <asm/io.h> 20 21 #define DRIVER_NAME "tifm_sd" 22 #define DRIVER_VERSION "0.8" 23 24 static int no_dma = 0; 25 static int fixed_timeout = 0; 26 module_param(no_dma, bool, 0644); 27 module_param(fixed_timeout, bool, 0644); 28 29 /* Constants here are mostly from OMAP5912 datasheet */ 30 #define TIFM_MMCSD_RESET 0x0002 31 #define TIFM_MMCSD_CLKMASK 0x03ff 32 #define TIFM_MMCSD_POWER 0x0800 33 #define TIFM_MMCSD_4BBUS 0x8000 34 #define TIFM_MMCSD_RXDE 0x8000 /* rx dma enable */ 35 #define TIFM_MMCSD_TXDE 0x0080 /* tx dma enable */ 36 #define TIFM_MMCSD_BUFINT 0x0c00 /* set bits: AE, AF */ 37 #define TIFM_MMCSD_DPE 0x0020 /* data timeout counted in kilocycles */ 38 #define TIFM_MMCSD_INAB 0x0080 /* abort / initialize command */ 39 #define TIFM_MMCSD_READ 0x8000 40 41 #define TIFM_MMCSD_ERRMASK 0x01e0 /* set bits: CCRC, CTO, DCRC, DTO */ 42 #define TIFM_MMCSD_EOC 0x0001 /* end of command phase */ 43 #define TIFM_MMCSD_CD 0x0002 /* card detect */ 44 #define TIFM_MMCSD_CB 0x0004 /* card enter busy state */ 45 #define TIFM_MMCSD_BRS 0x0008 /* block received/sent */ 46 #define TIFM_MMCSD_EOFB 0x0010 /* card exit busy state */ 47 #define TIFM_MMCSD_DTO 0x0020 /* data time-out */ 48 #define TIFM_MMCSD_DCRC 0x0040 /* data crc error */ 49 #define TIFM_MMCSD_CTO 0x0080 /* command time-out */ 50 #define TIFM_MMCSD_CCRC 0x0100 /* command crc error */ 51 #define TIFM_MMCSD_AF 0x0400 /* fifo almost full */ 52 #define TIFM_MMCSD_AE 0x0800 /* fifo almost empty */ 53 #define TIFM_MMCSD_OCRB 0x1000 /* OCR busy */ 54 #define TIFM_MMCSD_CIRQ 0x2000 /* card irq (cmd40/sdio) */ 55 #define TIFM_MMCSD_CERR 0x4000 /* card status error */ 56 57 #define TIFM_MMCSD_ODTO 0x0040 /* open drain / extended timeout */ 58 #define TIFM_MMCSD_CARD_RO 0x0200 /* card is read-only */ 59 60 #define TIFM_MMCSD_FIFO_SIZE 0x0020 61 62 #define TIFM_MMCSD_RSP_R0 0x0000 63 #define TIFM_MMCSD_RSP_R1 0x0100 64 #define TIFM_MMCSD_RSP_R2 0x0200 65 #define TIFM_MMCSD_RSP_R3 0x0300 66 #define TIFM_MMCSD_RSP_R4 0x0400 67 #define TIFM_MMCSD_RSP_R5 0x0500 68 #define TIFM_MMCSD_RSP_R6 0x0600 69 70 #define TIFM_MMCSD_RSP_BUSY 0x0800 71 72 #define TIFM_MMCSD_CMD_BC 0x0000 73 #define TIFM_MMCSD_CMD_BCR 0x1000 74 #define TIFM_MMCSD_CMD_AC 0x2000 75 #define TIFM_MMCSD_CMD_ADTC 0x3000 76 77 #define TIFM_MMCSD_MAX_BLOCK_SIZE 0x0800UL 78 79 enum { 80 CMD_READY = 0x0001, 81 FIFO_READY = 0x0002, 82 BRS_READY = 0x0004, 83 SCMD_ACTIVE = 0x0008, 84 SCMD_READY = 0x0010, 85 CARD_BUSY = 0x0020, 86 DATA_CARRY = 0x0040 87 }; 88 89 struct tifm_sd { 90 struct tifm_dev *dev; 91 92 unsigned short eject:1, 93 open_drain:1, 94 no_dma:1; 95 unsigned short cmd_flags; 96 97 unsigned int clk_freq; 98 unsigned int clk_div; 99 unsigned long timeout_jiffies; 100 101 struct tasklet_struct finish_tasklet; 102 struct timer_list timer; 103 struct mmc_request *req; 104 105 int sg_len; 106 int sg_pos; 107 unsigned int block_pos; 108 struct scatterlist bounce_buf; 109 unsigned char bounce_buf_data[TIFM_MMCSD_MAX_BLOCK_SIZE]; 110 }; 111 112 /* for some reason, host won't respond correctly to readw/writew */ 113 static void tifm_sd_read_fifo(struct tifm_sd *host, struct page *pg, 114 unsigned int off, unsigned int cnt) 115 { 116 struct tifm_dev *sock = host->dev; 117 unsigned char *buf; 118 unsigned int pos = 0, val; 119 120 buf = kmap_atomic(pg, KM_BIO_DST_IRQ) + off; 121 if (host->cmd_flags & DATA_CARRY) { 122 buf[pos++] = host->bounce_buf_data[0]; 123 host->cmd_flags &= ~DATA_CARRY; 124 } 125 126 while (pos < cnt) { 127 val = readl(sock->addr + SOCK_MMCSD_DATA); 128 buf[pos++] = val & 0xff; 129 if (pos == cnt) { 130 host->bounce_buf_data[0] = (val >> 8) & 0xff; 131 host->cmd_flags |= DATA_CARRY; 132 break; 133 } 134 buf[pos++] = (val >> 8) & 0xff; 135 } 136 kunmap_atomic(buf - off, KM_BIO_DST_IRQ); 137 } 138 139 static void tifm_sd_write_fifo(struct tifm_sd *host, struct page *pg, 140 unsigned int off, unsigned int cnt) 141 { 142 struct tifm_dev *sock = host->dev; 143 unsigned char *buf; 144 unsigned int pos = 0, val; 145 146 buf = kmap_atomic(pg, KM_BIO_SRC_IRQ) + off; 147 if (host->cmd_flags & DATA_CARRY) { 148 val = host->bounce_buf_data[0] | ((buf[pos++] << 8) & 0xff00); 149 writel(val, sock->addr + SOCK_MMCSD_DATA); 150 host->cmd_flags &= ~DATA_CARRY; 151 } 152 153 while (pos < cnt) { 154 val = buf[pos++]; 155 if (pos == cnt) { 156 host->bounce_buf_data[0] = val & 0xff; 157 host->cmd_flags |= DATA_CARRY; 158 break; 159 } 160 val |= (buf[pos++] << 8) & 0xff00; 161 writel(val, sock->addr + SOCK_MMCSD_DATA); 162 } 163 kunmap_atomic(buf - off, KM_BIO_SRC_IRQ); 164 } 165 166 static void tifm_sd_transfer_data(struct tifm_sd *host) 167 { 168 struct mmc_data *r_data = host->req->cmd->data; 169 struct scatterlist *sg = r_data->sg; 170 unsigned int off, cnt, t_size = TIFM_MMCSD_FIFO_SIZE * 2; 171 unsigned int p_off, p_cnt; 172 struct page *pg; 173 174 if (host->sg_pos == host->sg_len) 175 return; 176 while (t_size) { 177 cnt = sg[host->sg_pos].length - host->block_pos; 178 if (!cnt) { 179 host->block_pos = 0; 180 host->sg_pos++; 181 if (host->sg_pos == host->sg_len) { 182 if ((r_data->flags & MMC_DATA_WRITE) 183 && DATA_CARRY) 184 writel(host->bounce_buf_data[0], 185 host->dev->addr 186 + SOCK_MMCSD_DATA); 187 188 return; 189 } 190 cnt = sg[host->sg_pos].length; 191 } 192 off = sg[host->sg_pos].offset + host->block_pos; 193 194 pg = nth_page(sg[host->sg_pos].page, off >> PAGE_SHIFT); 195 p_off = offset_in_page(off); 196 p_cnt = PAGE_SIZE - p_off; 197 p_cnt = min(p_cnt, cnt); 198 p_cnt = min(p_cnt, t_size); 199 200 if (r_data->flags & MMC_DATA_READ) 201 tifm_sd_read_fifo(host, pg, p_off, p_cnt); 202 else if (r_data->flags & MMC_DATA_WRITE) 203 tifm_sd_write_fifo(host, pg, p_off, p_cnt); 204 205 t_size -= p_cnt; 206 host->block_pos += p_cnt; 207 } 208 } 209 210 static void tifm_sd_copy_page(struct page *dst, unsigned int dst_off, 211 struct page *src, unsigned int src_off, 212 unsigned int count) 213 { 214 unsigned char *src_buf = kmap_atomic(src, KM_BIO_SRC_IRQ) + src_off; 215 unsigned char *dst_buf = kmap_atomic(dst, KM_BIO_DST_IRQ) + dst_off; 216 217 memcpy(dst_buf, src_buf, count); 218 219 kunmap_atomic(dst_buf - dst_off, KM_BIO_DST_IRQ); 220 kunmap_atomic(src_buf - src_off, KM_BIO_SRC_IRQ); 221 } 222 223 static void tifm_sd_bounce_block(struct tifm_sd *host, struct mmc_data *r_data) 224 { 225 struct scatterlist *sg = r_data->sg; 226 unsigned int t_size = r_data->blksz; 227 unsigned int off, cnt; 228 unsigned int p_off, p_cnt; 229 struct page *pg; 230 231 dev_dbg(&host->dev->dev, "bouncing block\n"); 232 while (t_size) { 233 cnt = sg[host->sg_pos].length - host->block_pos; 234 if (!cnt) { 235 host->block_pos = 0; 236 host->sg_pos++; 237 if (host->sg_pos == host->sg_len) 238 return; 239 cnt = sg[host->sg_pos].length; 240 } 241 off = sg[host->sg_pos].offset + host->block_pos; 242 243 pg = nth_page(sg[host->sg_pos].page, off >> PAGE_SHIFT); 244 p_off = offset_in_page(off); 245 p_cnt = PAGE_SIZE - p_off; 246 p_cnt = min(p_cnt, cnt); 247 p_cnt = min(p_cnt, t_size); 248 249 if (r_data->flags & MMC_DATA_WRITE) 250 tifm_sd_copy_page(host->bounce_buf.page, 251 r_data->blksz - t_size, 252 pg, p_off, p_cnt); 253 else if (r_data->flags & MMC_DATA_READ) 254 tifm_sd_copy_page(pg, p_off, host->bounce_buf.page, 255 r_data->blksz - t_size, p_cnt); 256 257 t_size -= p_cnt; 258 host->block_pos += p_cnt; 259 } 260 } 261 262 static int tifm_sd_set_dma_data(struct tifm_sd *host, struct mmc_data *r_data) 263 { 264 struct tifm_dev *sock = host->dev; 265 unsigned int t_size = TIFM_DMA_TSIZE * r_data->blksz; 266 unsigned int dma_len, dma_blk_cnt, dma_off; 267 struct scatterlist *sg = NULL; 268 unsigned long flags; 269 270 if (host->sg_pos == host->sg_len) 271 return 1; 272 273 if (host->cmd_flags & DATA_CARRY) { 274 host->cmd_flags &= ~DATA_CARRY; 275 local_irq_save(flags); 276 tifm_sd_bounce_block(host, r_data); 277 local_irq_restore(flags); 278 if (host->sg_pos == host->sg_len) 279 return 1; 280 } 281 282 dma_len = sg_dma_len(&r_data->sg[host->sg_pos]) - host->block_pos; 283 if (!dma_len) { 284 host->block_pos = 0; 285 host->sg_pos++; 286 if (host->sg_pos == host->sg_len) 287 return 1; 288 dma_len = sg_dma_len(&r_data->sg[host->sg_pos]); 289 } 290 291 if (dma_len < t_size) { 292 dma_blk_cnt = dma_len / r_data->blksz; 293 dma_off = host->block_pos; 294 host->block_pos += dma_blk_cnt * r_data->blksz; 295 } else { 296 dma_blk_cnt = TIFM_DMA_TSIZE; 297 dma_off = host->block_pos; 298 host->block_pos += t_size; 299 } 300 301 if (dma_blk_cnt) 302 sg = &r_data->sg[host->sg_pos]; 303 else if (dma_len) { 304 if (r_data->flags & MMC_DATA_WRITE) { 305 local_irq_save(flags); 306 tifm_sd_bounce_block(host, r_data); 307 local_irq_restore(flags); 308 } else 309 host->cmd_flags |= DATA_CARRY; 310 311 sg = &host->bounce_buf; 312 dma_off = 0; 313 dma_blk_cnt = 1; 314 } else 315 return 1; 316 317 dev_dbg(&sock->dev, "setting dma for %d blocks\n", dma_blk_cnt); 318 writel(sg_dma_address(sg) + dma_off, sock->addr + SOCK_DMA_ADDRESS); 319 if (r_data->flags & MMC_DATA_WRITE) 320 writel((dma_blk_cnt << 8) | TIFM_DMA_TX | TIFM_DMA_EN, 321 sock->addr + SOCK_DMA_CONTROL); 322 else 323 writel((dma_blk_cnt << 8) | TIFM_DMA_EN, 324 sock->addr + SOCK_DMA_CONTROL); 325 326 return 0; 327 } 328 329 static unsigned int tifm_sd_op_flags(struct mmc_command *cmd) 330 { 331 unsigned int rc = 0; 332 333 switch (mmc_resp_type(cmd)) { 334 case MMC_RSP_NONE: 335 rc |= TIFM_MMCSD_RSP_R0; 336 break; 337 case MMC_RSP_R1B: 338 rc |= TIFM_MMCSD_RSP_BUSY; // deliberate fall-through 339 case MMC_RSP_R1: 340 rc |= TIFM_MMCSD_RSP_R1; 341 break; 342 case MMC_RSP_R2: 343 rc |= TIFM_MMCSD_RSP_R2; 344 break; 345 case MMC_RSP_R3: 346 rc |= TIFM_MMCSD_RSP_R3; 347 break; 348 default: 349 BUG(); 350 } 351 352 switch (mmc_cmd_type(cmd)) { 353 case MMC_CMD_BC: 354 rc |= TIFM_MMCSD_CMD_BC; 355 break; 356 case MMC_CMD_BCR: 357 rc |= TIFM_MMCSD_CMD_BCR; 358 break; 359 case MMC_CMD_AC: 360 rc |= TIFM_MMCSD_CMD_AC; 361 break; 362 case MMC_CMD_ADTC: 363 rc |= TIFM_MMCSD_CMD_ADTC; 364 break; 365 default: 366 BUG(); 367 } 368 return rc; 369 } 370 371 static void tifm_sd_exec(struct tifm_sd *host, struct mmc_command *cmd) 372 { 373 struct tifm_dev *sock = host->dev; 374 unsigned int cmd_mask = tifm_sd_op_flags(cmd); 375 376 if (host->open_drain) 377 cmd_mask |= TIFM_MMCSD_ODTO; 378 379 if (cmd->data && (cmd->data->flags & MMC_DATA_READ)) 380 cmd_mask |= TIFM_MMCSD_READ; 381 382 dev_dbg(&sock->dev, "executing opcode 0x%x, arg: 0x%x, mask: 0x%x\n", 383 cmd->opcode, cmd->arg, cmd_mask); 384 385 writel((cmd->arg >> 16) & 0xffff, sock->addr + SOCK_MMCSD_ARG_HIGH); 386 writel(cmd->arg & 0xffff, sock->addr + SOCK_MMCSD_ARG_LOW); 387 writel(cmd->opcode | cmd_mask, sock->addr + SOCK_MMCSD_COMMAND); 388 } 389 390 static void tifm_sd_fetch_resp(struct mmc_command *cmd, struct tifm_dev *sock) 391 { 392 cmd->resp[0] = (readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x1c) << 16) 393 | readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x18); 394 cmd->resp[1] = (readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x14) << 16) 395 | readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x10); 396 cmd->resp[2] = (readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x0c) << 16) 397 | readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x08); 398 cmd->resp[3] = (readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x04) << 16) 399 | readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x00); 400 } 401 402 static void tifm_sd_check_status(struct tifm_sd *host) 403 { 404 struct tifm_dev *sock = host->dev; 405 struct mmc_command *cmd = host->req->cmd; 406 407 if (cmd->error != MMC_ERR_NONE) 408 goto finish_request; 409 410 if (!(host->cmd_flags & CMD_READY)) 411 return; 412 413 if (cmd->data) { 414 if (cmd->data->error != MMC_ERR_NONE) { 415 if ((host->cmd_flags & SCMD_ACTIVE) 416 && !(host->cmd_flags & SCMD_READY)) 417 return; 418 419 goto finish_request; 420 } 421 422 if (!(host->cmd_flags & BRS_READY)) 423 return; 424 425 if (!(host->no_dma || (host->cmd_flags & FIFO_READY))) 426 return; 427 428 if (cmd->data->flags & MMC_DATA_WRITE) { 429 if (host->req->stop) { 430 if (!(host->cmd_flags & SCMD_ACTIVE)) { 431 host->cmd_flags |= SCMD_ACTIVE; 432 writel(TIFM_MMCSD_EOFB 433 | readl(sock->addr 434 + SOCK_MMCSD_INT_ENABLE), 435 sock->addr 436 + SOCK_MMCSD_INT_ENABLE); 437 tifm_sd_exec(host, host->req->stop); 438 return; 439 } else { 440 if (!(host->cmd_flags & SCMD_READY) 441 || (host->cmd_flags & CARD_BUSY)) 442 return; 443 writel((~TIFM_MMCSD_EOFB) 444 & readl(sock->addr 445 + SOCK_MMCSD_INT_ENABLE), 446 sock->addr 447 + SOCK_MMCSD_INT_ENABLE); 448 } 449 } else { 450 if (host->cmd_flags & CARD_BUSY) 451 return; 452 writel((~TIFM_MMCSD_EOFB) 453 & readl(sock->addr 454 + SOCK_MMCSD_INT_ENABLE), 455 sock->addr + SOCK_MMCSD_INT_ENABLE); 456 } 457 } else { 458 if (host->req->stop) { 459 if (!(host->cmd_flags & SCMD_ACTIVE)) { 460 host->cmd_flags |= SCMD_ACTIVE; 461 tifm_sd_exec(host, host->req->stop); 462 return; 463 } else { 464 if (!(host->cmd_flags & SCMD_READY)) 465 return; 466 } 467 } 468 } 469 } 470 finish_request: 471 tasklet_schedule(&host->finish_tasklet); 472 } 473 474 /* Called from interrupt handler */ 475 static void tifm_sd_data_event(struct tifm_dev *sock) 476 { 477 struct tifm_sd *host; 478 unsigned int fifo_status = 0; 479 struct mmc_data *r_data = NULL; 480 481 spin_lock(&sock->lock); 482 host = mmc_priv((struct mmc_host*)tifm_get_drvdata(sock)); 483 fifo_status = readl(sock->addr + SOCK_DMA_FIFO_STATUS); 484 dev_dbg(&sock->dev, "data event: fifo_status %x, flags %x\n", 485 fifo_status, host->cmd_flags); 486 487 if (host->req) { 488 r_data = host->req->cmd->data; 489 490 if (r_data && (fifo_status & TIFM_FIFO_READY)) { 491 if (tifm_sd_set_dma_data(host, r_data)) { 492 host->cmd_flags |= FIFO_READY; 493 tifm_sd_check_status(host); 494 } 495 } 496 } 497 498 writel(fifo_status, sock->addr + SOCK_DMA_FIFO_STATUS); 499 spin_unlock(&sock->lock); 500 } 501 502 /* Called from interrupt handler */ 503 static void tifm_sd_card_event(struct tifm_dev *sock) 504 { 505 struct tifm_sd *host; 506 unsigned int host_status = 0; 507 int cmd_error = MMC_ERR_NONE; 508 struct mmc_command *cmd = NULL; 509 unsigned long flags; 510 511 spin_lock(&sock->lock); 512 host = mmc_priv((struct mmc_host*)tifm_get_drvdata(sock)); 513 host_status = readl(sock->addr + SOCK_MMCSD_STATUS); 514 dev_dbg(&sock->dev, "host event: host_status %x, flags %x\n", 515 host_status, host->cmd_flags); 516 517 if (host->req) { 518 cmd = host->req->cmd; 519 520 if (host_status & TIFM_MMCSD_ERRMASK) { 521 writel(host_status & TIFM_MMCSD_ERRMASK, 522 sock->addr + SOCK_MMCSD_STATUS); 523 if (host_status & TIFM_MMCSD_CTO) 524 cmd_error = MMC_ERR_TIMEOUT; 525 else if (host_status & TIFM_MMCSD_CCRC) 526 cmd_error = MMC_ERR_BADCRC; 527 528 if (cmd->data) { 529 if (host_status & TIFM_MMCSD_DTO) 530 cmd->data->error = MMC_ERR_TIMEOUT; 531 else if (host_status & TIFM_MMCSD_DCRC) 532 cmd->data->error = MMC_ERR_BADCRC; 533 } 534 535 writel(TIFM_FIFO_INT_SETALL, 536 sock->addr + SOCK_DMA_FIFO_INT_ENABLE_CLEAR); 537 writel(TIFM_DMA_RESET, sock->addr + SOCK_DMA_CONTROL); 538 539 if (host->req->stop) { 540 if (host->cmd_flags & SCMD_ACTIVE) { 541 host->req->stop->error = cmd_error; 542 host->cmd_flags |= SCMD_READY; 543 } else { 544 cmd->error = cmd_error; 545 host->cmd_flags |= SCMD_ACTIVE; 546 tifm_sd_exec(host, host->req->stop); 547 goto done; 548 } 549 } else 550 cmd->error = cmd_error; 551 } else { 552 if (host_status & (TIFM_MMCSD_EOC | TIFM_MMCSD_CERR)) { 553 if (!(host->cmd_flags & CMD_READY)) { 554 host->cmd_flags |= CMD_READY; 555 tifm_sd_fetch_resp(cmd, sock); 556 } else if (host->cmd_flags & SCMD_ACTIVE) { 557 host->cmd_flags |= SCMD_READY; 558 tifm_sd_fetch_resp(host->req->stop, 559 sock); 560 } 561 } 562 if (host_status & TIFM_MMCSD_BRS) 563 host->cmd_flags |= BRS_READY; 564 } 565 566 if (host->no_dma && cmd->data) { 567 if (host_status & TIFM_MMCSD_AE) 568 writel(host_status & TIFM_MMCSD_AE, 569 sock->addr + SOCK_MMCSD_STATUS); 570 571 if (host_status & (TIFM_MMCSD_AE | TIFM_MMCSD_AF 572 | TIFM_MMCSD_BRS)) { 573 local_irq_save(flags); 574 tifm_sd_transfer_data(host); 575 local_irq_restore(flags); 576 host_status &= ~TIFM_MMCSD_AE; 577 } 578 } 579 580 if (host_status & TIFM_MMCSD_EOFB) 581 host->cmd_flags &= ~CARD_BUSY; 582 else if (host_status & TIFM_MMCSD_CB) 583 host->cmd_flags |= CARD_BUSY; 584 585 tifm_sd_check_status(host); 586 } 587 done: 588 writel(host_status, sock->addr + SOCK_MMCSD_STATUS); 589 spin_unlock(&sock->lock); 590 } 591 592 static void tifm_sd_set_data_timeout(struct tifm_sd *host, 593 struct mmc_data *data) 594 { 595 struct tifm_dev *sock = host->dev; 596 unsigned int data_timeout = data->timeout_clks; 597 598 if (fixed_timeout) 599 return; 600 601 data_timeout += data->timeout_ns / 602 ((1000000000UL / host->clk_freq) * host->clk_div); 603 604 if (data_timeout < 0xffff) { 605 writel(data_timeout, sock->addr + SOCK_MMCSD_DATA_TO); 606 writel((~TIFM_MMCSD_DPE) 607 & readl(sock->addr + SOCK_MMCSD_SDIO_MODE_CONFIG), 608 sock->addr + SOCK_MMCSD_SDIO_MODE_CONFIG); 609 } else { 610 data_timeout = (data_timeout >> 10) + 1; 611 if (data_timeout > 0xffff) 612 data_timeout = 0; /* set to unlimited */ 613 writel(data_timeout, sock->addr + SOCK_MMCSD_DATA_TO); 614 writel(TIFM_MMCSD_DPE 615 | readl(sock->addr + SOCK_MMCSD_SDIO_MODE_CONFIG), 616 sock->addr + SOCK_MMCSD_SDIO_MODE_CONFIG); 617 } 618 } 619 620 static void tifm_sd_request(struct mmc_host *mmc, struct mmc_request *mrq) 621 { 622 struct tifm_sd *host = mmc_priv(mmc); 623 struct tifm_dev *sock = host->dev; 624 unsigned long flags; 625 struct mmc_data *r_data = mrq->cmd->data; 626 627 spin_lock_irqsave(&sock->lock, flags); 628 if (host->eject) { 629 spin_unlock_irqrestore(&sock->lock, flags); 630 goto err_out; 631 } 632 633 if (host->req) { 634 printk(KERN_ERR "%s : unfinished request detected\n", 635 sock->dev.bus_id); 636 spin_unlock_irqrestore(&sock->lock, flags); 637 goto err_out; 638 } 639 640 host->cmd_flags = 0; 641 host->block_pos = 0; 642 host->sg_pos = 0; 643 644 if (r_data) { 645 tifm_sd_set_data_timeout(host, r_data); 646 647 if ((r_data->flags & MMC_DATA_WRITE) && !mrq->stop) 648 writel(TIFM_MMCSD_EOFB 649 | readl(sock->addr + SOCK_MMCSD_INT_ENABLE), 650 sock->addr + SOCK_MMCSD_INT_ENABLE); 651 652 if (host->no_dma) { 653 writel(TIFM_MMCSD_BUFINT 654 | readl(sock->addr + SOCK_MMCSD_INT_ENABLE), 655 sock->addr + SOCK_MMCSD_INT_ENABLE); 656 writel(((TIFM_MMCSD_FIFO_SIZE - 1) << 8) 657 | (TIFM_MMCSD_FIFO_SIZE - 1), 658 sock->addr + SOCK_MMCSD_BUFFER_CONFIG); 659 660 host->sg_len = r_data->sg_len; 661 } else { 662 sg_init_one(&host->bounce_buf, host->bounce_buf_data, 663 r_data->blksz); 664 665 if(1 != tifm_map_sg(sock, &host->bounce_buf, 1, 666 r_data->flags & MMC_DATA_WRITE 667 ? PCI_DMA_TODEVICE 668 : PCI_DMA_FROMDEVICE)) { 669 printk(KERN_ERR "%s : scatterlist map failed\n", 670 sock->dev.bus_id); 671 spin_unlock_irqrestore(&sock->lock, flags); 672 goto err_out; 673 } 674 host->sg_len = tifm_map_sg(sock, r_data->sg, 675 r_data->sg_len, 676 r_data->flags 677 & MMC_DATA_WRITE 678 ? PCI_DMA_TODEVICE 679 : PCI_DMA_FROMDEVICE); 680 if (host->sg_len < 1) { 681 printk(KERN_ERR "%s : scatterlist map failed\n", 682 sock->dev.bus_id); 683 tifm_unmap_sg(sock, &host->bounce_buf, 1, 684 r_data->flags & MMC_DATA_WRITE 685 ? PCI_DMA_TODEVICE 686 : PCI_DMA_FROMDEVICE); 687 spin_unlock_irqrestore(&sock->lock, flags); 688 goto err_out; 689 } 690 691 writel(TIFM_FIFO_INT_SETALL, 692 sock->addr + SOCK_DMA_FIFO_INT_ENABLE_CLEAR); 693 writel(ilog2(r_data->blksz) - 2, 694 sock->addr + SOCK_FIFO_PAGE_SIZE); 695 writel(TIFM_FIFO_ENABLE, 696 sock->addr + SOCK_FIFO_CONTROL); 697 writel(TIFM_FIFO_INTMASK, 698 sock->addr + SOCK_DMA_FIFO_INT_ENABLE_SET); 699 700 if (r_data->flags & MMC_DATA_WRITE) 701 writel(TIFM_MMCSD_TXDE, 702 sock->addr + SOCK_MMCSD_BUFFER_CONFIG); 703 else 704 writel(TIFM_MMCSD_RXDE, 705 sock->addr + SOCK_MMCSD_BUFFER_CONFIG); 706 707 tifm_sd_set_dma_data(host, r_data); 708 } 709 710 writel(r_data->blocks - 1, 711 sock->addr + SOCK_MMCSD_NUM_BLOCKS); 712 writel(r_data->blksz - 1, 713 sock->addr + SOCK_MMCSD_BLOCK_LEN); 714 } 715 716 host->req = mrq; 717 mod_timer(&host->timer, jiffies + host->timeout_jiffies); 718 writel(TIFM_CTRL_LED | readl(sock->addr + SOCK_CONTROL), 719 sock->addr + SOCK_CONTROL); 720 tifm_sd_exec(host, mrq->cmd); 721 spin_unlock_irqrestore(&sock->lock, flags); 722 return; 723 724 err_out: 725 mrq->cmd->error = MMC_ERR_TIMEOUT; 726 mmc_request_done(mmc, mrq); 727 } 728 729 static void tifm_sd_end_cmd(unsigned long data) 730 { 731 struct tifm_sd *host = (struct tifm_sd*)data; 732 struct tifm_dev *sock = host->dev; 733 struct mmc_host *mmc = tifm_get_drvdata(sock); 734 struct mmc_request *mrq; 735 struct mmc_data *r_data = NULL; 736 unsigned long flags; 737 738 spin_lock_irqsave(&sock->lock, flags); 739 740 del_timer(&host->timer); 741 mrq = host->req; 742 host->req = NULL; 743 744 if (!mrq) { 745 printk(KERN_ERR " %s : no request to complete?\n", 746 sock->dev.bus_id); 747 spin_unlock_irqrestore(&sock->lock, flags); 748 return; 749 } 750 751 r_data = mrq->cmd->data; 752 if (r_data) { 753 if (host->no_dma) { 754 writel((~TIFM_MMCSD_BUFINT) 755 & readl(sock->addr + SOCK_MMCSD_INT_ENABLE), 756 sock->addr + SOCK_MMCSD_INT_ENABLE); 757 } else { 758 tifm_unmap_sg(sock, &host->bounce_buf, 1, 759 (r_data->flags & MMC_DATA_WRITE) 760 ? PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE); 761 tifm_unmap_sg(sock, r_data->sg, r_data->sg_len, 762 (r_data->flags & MMC_DATA_WRITE) 763 ? PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE); 764 } 765 766 r_data->bytes_xfered = r_data->blocks 767 - readl(sock->addr + SOCK_MMCSD_NUM_BLOCKS) - 1; 768 r_data->bytes_xfered *= r_data->blksz; 769 r_data->bytes_xfered += r_data->blksz 770 - readl(sock->addr + SOCK_MMCSD_BLOCK_LEN) + 1; 771 } 772 773 writel((~TIFM_CTRL_LED) & readl(sock->addr + SOCK_CONTROL), 774 sock->addr + SOCK_CONTROL); 775 776 spin_unlock_irqrestore(&sock->lock, flags); 777 mmc_request_done(mmc, mrq); 778 } 779 780 static void tifm_sd_abort(unsigned long data) 781 { 782 struct tifm_sd *host = (struct tifm_sd*)data; 783 784 printk(KERN_ERR 785 "%s : card failed to respond for a long period of time " 786 "(%x, %x)\n", 787 host->dev->dev.bus_id, host->req->cmd->opcode, host->cmd_flags); 788 789 tifm_eject(host->dev); 790 } 791 792 static void tifm_sd_ios(struct mmc_host *mmc, struct mmc_ios *ios) 793 { 794 struct tifm_sd *host = mmc_priv(mmc); 795 struct tifm_dev *sock = host->dev; 796 unsigned int clk_div1, clk_div2; 797 unsigned long flags; 798 799 spin_lock_irqsave(&sock->lock, flags); 800 801 dev_dbg(&sock->dev, "ios: clock = %u, vdd = %x, bus_mode = %x, " 802 "chip_select = %x, power_mode = %x, bus_width = %x\n", 803 ios->clock, ios->vdd, ios->bus_mode, ios->chip_select, 804 ios->power_mode, ios->bus_width); 805 806 if (ios->bus_width == MMC_BUS_WIDTH_4) { 807 writel(TIFM_MMCSD_4BBUS | readl(sock->addr + SOCK_MMCSD_CONFIG), 808 sock->addr + SOCK_MMCSD_CONFIG); 809 } else { 810 writel((~TIFM_MMCSD_4BBUS) 811 & readl(sock->addr + SOCK_MMCSD_CONFIG), 812 sock->addr + SOCK_MMCSD_CONFIG); 813 } 814 815 if (ios->clock) { 816 clk_div1 = 20000000 / ios->clock; 817 if (!clk_div1) 818 clk_div1 = 1; 819 820 clk_div2 = 24000000 / ios->clock; 821 if (!clk_div2) 822 clk_div2 = 1; 823 824 if ((20000000 / clk_div1) > ios->clock) 825 clk_div1++; 826 if ((24000000 / clk_div2) > ios->clock) 827 clk_div2++; 828 if ((20000000 / clk_div1) > (24000000 / clk_div2)) { 829 host->clk_freq = 20000000; 830 host->clk_div = clk_div1; 831 writel((~TIFM_CTRL_FAST_CLK) 832 & readl(sock->addr + SOCK_CONTROL), 833 sock->addr + SOCK_CONTROL); 834 } else { 835 host->clk_freq = 24000000; 836 host->clk_div = clk_div2; 837 writel(TIFM_CTRL_FAST_CLK 838 | readl(sock->addr + SOCK_CONTROL), 839 sock->addr + SOCK_CONTROL); 840 } 841 } else { 842 host->clk_div = 0; 843 } 844 host->clk_div &= TIFM_MMCSD_CLKMASK; 845 writel(host->clk_div 846 | ((~TIFM_MMCSD_CLKMASK) 847 & readl(sock->addr + SOCK_MMCSD_CONFIG)), 848 sock->addr + SOCK_MMCSD_CONFIG); 849 850 host->open_drain = (ios->bus_mode == MMC_BUSMODE_OPENDRAIN); 851 852 /* chip_select : maybe later */ 853 //vdd 854 //power is set before probe / after remove 855 856 spin_unlock_irqrestore(&sock->lock, flags); 857 } 858 859 static int tifm_sd_ro(struct mmc_host *mmc) 860 { 861 int rc = 0; 862 struct tifm_sd *host = mmc_priv(mmc); 863 struct tifm_dev *sock = host->dev; 864 unsigned long flags; 865 866 spin_lock_irqsave(&sock->lock, flags); 867 if (TIFM_MMCSD_CARD_RO & readl(sock->addr + SOCK_PRESENT_STATE)) 868 rc = 1; 869 spin_unlock_irqrestore(&sock->lock, flags); 870 return rc; 871 } 872 873 static const struct mmc_host_ops tifm_sd_ops = { 874 .request = tifm_sd_request, 875 .set_ios = tifm_sd_ios, 876 .get_ro = tifm_sd_ro 877 }; 878 879 static int tifm_sd_initialize_host(struct tifm_sd *host) 880 { 881 int rc; 882 unsigned int host_status = 0; 883 struct tifm_dev *sock = host->dev; 884 885 writel(0, sock->addr + SOCK_MMCSD_INT_ENABLE); 886 mmiowb(); 887 host->clk_div = 61; 888 host->clk_freq = 20000000; 889 writel(TIFM_MMCSD_RESET, sock->addr + SOCK_MMCSD_SYSTEM_CONTROL); 890 writel(host->clk_div | TIFM_MMCSD_POWER, 891 sock->addr + SOCK_MMCSD_CONFIG); 892 893 /* wait up to 0.51 sec for reset */ 894 for (rc = 32; rc <= 256; rc <<= 1) { 895 if (1 & readl(sock->addr + SOCK_MMCSD_SYSTEM_STATUS)) { 896 rc = 0; 897 break; 898 } 899 msleep(rc); 900 } 901 902 if (rc) { 903 printk(KERN_ERR "%s : controller failed to reset\n", 904 sock->dev.bus_id); 905 return -ENODEV; 906 } 907 908 writel(0, sock->addr + SOCK_MMCSD_NUM_BLOCKS); 909 writel(host->clk_div | TIFM_MMCSD_POWER, 910 sock->addr + SOCK_MMCSD_CONFIG); 911 writel(TIFM_MMCSD_RXDE, sock->addr + SOCK_MMCSD_BUFFER_CONFIG); 912 913 // command timeout fixed to 64 clocks for now 914 writel(64, sock->addr + SOCK_MMCSD_COMMAND_TO); 915 writel(TIFM_MMCSD_INAB, sock->addr + SOCK_MMCSD_COMMAND); 916 917 for (rc = 16; rc <= 64; rc <<= 1) { 918 host_status = readl(sock->addr + SOCK_MMCSD_STATUS); 919 writel(host_status, sock->addr + SOCK_MMCSD_STATUS); 920 if (!(host_status & TIFM_MMCSD_ERRMASK) 921 && (host_status & TIFM_MMCSD_EOC)) { 922 rc = 0; 923 break; 924 } 925 msleep(rc); 926 } 927 928 if (rc) { 929 printk(KERN_ERR 930 "%s : card not ready - probe failed on initialization\n", 931 sock->dev.bus_id); 932 return -ENODEV; 933 } 934 935 writel(TIFM_MMCSD_CERR | TIFM_MMCSD_BRS | TIFM_MMCSD_EOC 936 | TIFM_MMCSD_ERRMASK, 937 sock->addr + SOCK_MMCSD_INT_ENABLE); 938 mmiowb(); 939 940 return 0; 941 } 942 943 static int tifm_sd_probe(struct tifm_dev *sock) 944 { 945 struct mmc_host *mmc; 946 struct tifm_sd *host; 947 int rc = -EIO; 948 949 if (!(TIFM_SOCK_STATE_OCCUPIED 950 & readl(sock->addr + SOCK_PRESENT_STATE))) { 951 printk(KERN_WARNING "%s : card gone, unexpectedly\n", 952 sock->dev.bus_id); 953 return rc; 954 } 955 956 mmc = mmc_alloc_host(sizeof(struct tifm_sd), &sock->dev); 957 if (!mmc) 958 return -ENOMEM; 959 960 host = mmc_priv(mmc); 961 host->no_dma = no_dma; 962 tifm_set_drvdata(sock, mmc); 963 host->dev = sock; 964 host->timeout_jiffies = msecs_to_jiffies(1000); 965 966 tasklet_init(&host->finish_tasklet, tifm_sd_end_cmd, 967 (unsigned long)host); 968 setup_timer(&host->timer, tifm_sd_abort, (unsigned long)host); 969 970 mmc->ops = &tifm_sd_ops; 971 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34; 972 mmc->caps = MMC_CAP_4_BIT_DATA | MMC_CAP_MULTIWRITE; 973 mmc->f_min = 20000000 / 60; 974 mmc->f_max = 24000000; 975 976 mmc->max_blk_count = 2048; 977 mmc->max_hw_segs = mmc->max_blk_count; 978 mmc->max_blk_size = min(TIFM_MMCSD_MAX_BLOCK_SIZE, PAGE_SIZE); 979 mmc->max_seg_size = mmc->max_blk_count * mmc->max_blk_size; 980 mmc->max_req_size = mmc->max_seg_size; 981 mmc->max_phys_segs = mmc->max_hw_segs; 982 983 sock->card_event = tifm_sd_card_event; 984 sock->data_event = tifm_sd_data_event; 985 rc = tifm_sd_initialize_host(host); 986 987 if (!rc) 988 rc = mmc_add_host(mmc); 989 if (!rc) 990 return 0; 991 992 mmc_free_host(mmc); 993 return rc; 994 } 995 996 static void tifm_sd_remove(struct tifm_dev *sock) 997 { 998 struct mmc_host *mmc = tifm_get_drvdata(sock); 999 struct tifm_sd *host = mmc_priv(mmc); 1000 unsigned long flags; 1001 1002 spin_lock_irqsave(&sock->lock, flags); 1003 host->eject = 1; 1004 writel(0, sock->addr + SOCK_MMCSD_INT_ENABLE); 1005 mmiowb(); 1006 spin_unlock_irqrestore(&sock->lock, flags); 1007 1008 tasklet_kill(&host->finish_tasklet); 1009 1010 spin_lock_irqsave(&sock->lock, flags); 1011 if (host->req) { 1012 writel(TIFM_FIFO_INT_SETALL, 1013 sock->addr + SOCK_DMA_FIFO_INT_ENABLE_CLEAR); 1014 writel(0, sock->addr + SOCK_DMA_FIFO_INT_ENABLE_SET); 1015 host->req->cmd->error = MMC_ERR_TIMEOUT; 1016 if (host->req->stop) 1017 host->req->stop->error = MMC_ERR_TIMEOUT; 1018 tasklet_schedule(&host->finish_tasklet); 1019 } 1020 spin_unlock_irqrestore(&sock->lock, flags); 1021 mmc_remove_host(mmc); 1022 dev_dbg(&sock->dev, "after remove\n"); 1023 1024 mmc_free_host(mmc); 1025 } 1026 1027 #ifdef CONFIG_PM 1028 1029 static int tifm_sd_suspend(struct tifm_dev *sock, pm_message_t state) 1030 { 1031 return mmc_suspend_host(tifm_get_drvdata(sock), state); 1032 } 1033 1034 static int tifm_sd_resume(struct tifm_dev *sock) 1035 { 1036 struct mmc_host *mmc = tifm_get_drvdata(sock); 1037 struct tifm_sd *host = mmc_priv(mmc); 1038 int rc; 1039 1040 rc = tifm_sd_initialize_host(host); 1041 dev_dbg(&sock->dev, "resume initialize %d\n", rc); 1042 1043 if (rc) 1044 host->eject = 1; 1045 else 1046 rc = mmc_resume_host(mmc); 1047 1048 return rc; 1049 } 1050 1051 #else 1052 1053 #define tifm_sd_suspend NULL 1054 #define tifm_sd_resume NULL 1055 1056 #endif /* CONFIG_PM */ 1057 1058 static struct tifm_device_id tifm_sd_id_tbl[] = { 1059 { TIFM_TYPE_SD }, { } 1060 }; 1061 1062 static struct tifm_driver tifm_sd_driver = { 1063 .driver = { 1064 .name = DRIVER_NAME, 1065 .owner = THIS_MODULE 1066 }, 1067 .id_table = tifm_sd_id_tbl, 1068 .probe = tifm_sd_probe, 1069 .remove = tifm_sd_remove, 1070 .suspend = tifm_sd_suspend, 1071 .resume = tifm_sd_resume 1072 }; 1073 1074 static int __init tifm_sd_init(void) 1075 { 1076 return tifm_register_driver(&tifm_sd_driver); 1077 } 1078 1079 static void __exit tifm_sd_exit(void) 1080 { 1081 tifm_unregister_driver(&tifm_sd_driver); 1082 } 1083 1084 MODULE_AUTHOR("Alex Dubov"); 1085 MODULE_DESCRIPTION("TI FlashMedia SD driver"); 1086 MODULE_LICENSE("GPL"); 1087 MODULE_DEVICE_TABLE(tifm, tifm_sd_id_tbl); 1088 MODULE_VERSION(DRIVER_VERSION); 1089 1090 module_init(tifm_sd_init); 1091 module_exit(tifm_sd_exit); 1092