1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * sdricoh_cs.c - driver for Ricoh Secure Digital Card Readers that can be 4 * found on some Ricoh RL5c476 II cardbus bridge 5 * 6 * Copyright (C) 2006 - 2008 Sascha Sommer <saschasommer@freenet.de> 7 */ 8 9 /* 10 #define DEBUG 11 #define VERBOSE_DEBUG 12 */ 13 #include <linux/delay.h> 14 #include <linux/highmem.h> 15 #include <linux/module.h> 16 #include <linux/pci.h> 17 #include <linux/ioport.h> 18 #include <linux/scatterlist.h> 19 20 #include <pcmcia/cistpl.h> 21 #include <pcmcia/ds.h> 22 #include <linux/io.h> 23 24 #include <linux/mmc/host.h> 25 #include <linux/mmc/mmc.h> 26 27 #define DRIVER_NAME "sdricoh_cs" 28 29 static unsigned int switchlocked; 30 31 /* i/o region */ 32 #define SDRICOH_PCI_REGION 0 33 #define SDRICOH_PCI_REGION_SIZE 0x1000 34 35 /* registers */ 36 #define R104_VERSION 0x104 37 #define R200_CMD 0x200 38 #define R204_CMD_ARG 0x204 39 #define R208_DATAIO 0x208 40 #define R20C_RESP 0x20c 41 #define R21C_STATUS 0x21c 42 #define R2E0_INIT 0x2e0 43 #define R2E4_STATUS_RESP 0x2e4 44 #define R2F0_RESET 0x2f0 45 #define R224_MODE 0x224 46 #define R226_BLOCKSIZE 0x226 47 #define R228_POWER 0x228 48 #define R230_DATA 0x230 49 50 /* flags for the R21C_STATUS register */ 51 #define STATUS_CMD_FINISHED 0x00000001 52 #define STATUS_TRANSFER_FINISHED 0x00000004 53 #define STATUS_CARD_INSERTED 0x00000020 54 #define STATUS_CARD_LOCKED 0x00000080 55 #define STATUS_CMD_TIMEOUT 0x00400000 56 #define STATUS_READY_TO_READ 0x01000000 57 #define STATUS_READY_TO_WRITE 0x02000000 58 #define STATUS_BUSY 0x40000000 59 60 /* timeouts */ 61 #define CMD_TIMEOUT 100000 62 #define TRANSFER_TIMEOUT 100000 63 64 /* list of supported pcmcia devices */ 65 static const struct pcmcia_device_id pcmcia_ids[] = { 66 /* vendor and device strings followed by their crc32 hashes */ 67 PCMCIA_DEVICE_PROD_ID12("RICOH", "Bay1Controller", 0xd9f522ed, 68 0xc3901202), 69 PCMCIA_DEVICE_PROD_ID12("RICOH", "Bay Controller", 0xd9f522ed, 70 0xace80909), 71 PCMCIA_DEVICE_NULL, 72 }; 73 74 MODULE_DEVICE_TABLE(pcmcia, pcmcia_ids); 75 76 /* mmc privdata */ 77 struct sdricoh_host { 78 struct device *dev; 79 struct mmc_host *mmc; /* MMC structure */ 80 unsigned char __iomem *iobase; 81 struct pci_dev *pci_dev; 82 int app_cmd; 83 }; 84 85 /***************** register i/o helper functions *****************************/ 86 87 static inline unsigned int sdricoh_readl(struct sdricoh_host *host, 88 unsigned int reg) 89 { 90 unsigned int value = readl(host->iobase + reg); 91 dev_vdbg(host->dev, "rl %x 0x%x\n", reg, value); 92 return value; 93 } 94 95 static inline void sdricoh_writel(struct sdricoh_host *host, unsigned int reg, 96 unsigned int value) 97 { 98 writel(value, host->iobase + reg); 99 dev_vdbg(host->dev, "wl %x 0x%x\n", reg, value); 100 101 } 102 103 static inline unsigned int sdricoh_readw(struct sdricoh_host *host, 104 unsigned int reg) 105 { 106 unsigned int value = readw(host->iobase + reg); 107 dev_vdbg(host->dev, "rb %x 0x%x\n", reg, value); 108 return value; 109 } 110 111 static inline void sdricoh_writew(struct sdricoh_host *host, unsigned int reg, 112 unsigned short value) 113 { 114 writew(value, host->iobase + reg); 115 dev_vdbg(host->dev, "ww %x 0x%x\n", reg, value); 116 } 117 118 static inline unsigned int sdricoh_readb(struct sdricoh_host *host, 119 unsigned int reg) 120 { 121 unsigned int value = readb(host->iobase + reg); 122 dev_vdbg(host->dev, "rb %x 0x%x\n", reg, value); 123 return value; 124 } 125 126 static int sdricoh_query_status(struct sdricoh_host *host, unsigned int wanted, 127 unsigned int timeout){ 128 unsigned int loop; 129 unsigned int status = 0; 130 struct device *dev = host->dev; 131 for (loop = 0; loop < timeout; loop++) { 132 status = sdricoh_readl(host, R21C_STATUS); 133 sdricoh_writel(host, R2E4_STATUS_RESP, status); 134 if (status & wanted) 135 break; 136 } 137 138 if (loop == timeout) { 139 dev_err(dev, "query_status: timeout waiting for %x\n", wanted); 140 return -ETIMEDOUT; 141 } 142 143 /* do not do this check in the loop as some commands fail otherwise */ 144 if (status & 0x7F0000) { 145 dev_err(dev, "waiting for status bit %x failed\n", wanted); 146 return -EINVAL; 147 } 148 return 0; 149 150 } 151 152 static int sdricoh_mmc_cmd(struct sdricoh_host *host, struct mmc_command *cmd) 153 { 154 unsigned int status; 155 int result = 0; 156 unsigned int loop = 0; 157 unsigned char opcode = cmd->opcode; 158 159 /* reset status reg? */ 160 sdricoh_writel(host, R21C_STATUS, 0x18); 161 162 /* MMC_APP_CMDs need some special handling */ 163 if (host->app_cmd) { 164 opcode |= 64; 165 host->app_cmd = 0; 166 } else if (opcode == MMC_APP_CMD) 167 host->app_cmd = 1; 168 169 /* fill parameters */ 170 sdricoh_writel(host, R204_CMD_ARG, cmd->arg); 171 sdricoh_writel(host, R200_CMD, (0x10000 << 8) | opcode); 172 /* wait for command completion */ 173 if (opcode) { 174 for (loop = 0; loop < CMD_TIMEOUT; loop++) { 175 status = sdricoh_readl(host, R21C_STATUS); 176 sdricoh_writel(host, R2E4_STATUS_RESP, status); 177 if (status & STATUS_CMD_FINISHED) 178 break; 179 } 180 /* don't check for timeout in the loop it is not always 181 reset correctly 182 */ 183 if (loop == CMD_TIMEOUT || status & STATUS_CMD_TIMEOUT) 184 result = -ETIMEDOUT; 185 186 } 187 188 return result; 189 190 } 191 192 static int sdricoh_reset(struct sdricoh_host *host) 193 { 194 dev_dbg(host->dev, "reset\n"); 195 sdricoh_writel(host, R2F0_RESET, 0x10001); 196 sdricoh_writel(host, R2E0_INIT, 0x10000); 197 if (sdricoh_readl(host, R2E0_INIT) != 0x10000) 198 return -EIO; 199 sdricoh_writel(host, R2E0_INIT, 0x10007); 200 201 sdricoh_writel(host, R224_MODE, 0x2000000); 202 sdricoh_writel(host, R228_POWER, 0xe0); 203 204 205 /* status register ? */ 206 sdricoh_writel(host, R21C_STATUS, 0x18); 207 208 return 0; 209 } 210 211 static int sdricoh_blockio(struct sdricoh_host *host, int read, 212 u8 *buf, int len) 213 { 214 int size; 215 u32 data = 0; 216 /* wait until the data is available */ 217 if (read) { 218 if (sdricoh_query_status(host, STATUS_READY_TO_READ, 219 TRANSFER_TIMEOUT)) 220 return -ETIMEDOUT; 221 sdricoh_writel(host, R21C_STATUS, 0x18); 222 /* read data */ 223 while (len) { 224 data = sdricoh_readl(host, R230_DATA); 225 size = min(len, 4); 226 len -= size; 227 while (size) { 228 *buf = data & 0xFF; 229 buf++; 230 data >>= 8; 231 size--; 232 } 233 } 234 } else { 235 if (sdricoh_query_status(host, STATUS_READY_TO_WRITE, 236 TRANSFER_TIMEOUT)) 237 return -ETIMEDOUT; 238 sdricoh_writel(host, R21C_STATUS, 0x18); 239 /* write data */ 240 while (len) { 241 size = min(len, 4); 242 len -= size; 243 while (size) { 244 data >>= 8; 245 data |= (u32)*buf << 24; 246 buf++; 247 size--; 248 } 249 sdricoh_writel(host, R230_DATA, data); 250 } 251 } 252 253 return 0; 254 } 255 256 static void sdricoh_request(struct mmc_host *mmc, struct mmc_request *mrq) 257 { 258 struct sdricoh_host *host = mmc_priv(mmc); 259 struct mmc_command *cmd = mrq->cmd; 260 struct mmc_data *data = cmd->data; 261 struct device *dev = host->dev; 262 int i; 263 264 dev_dbg(dev, "=============================\n"); 265 dev_dbg(dev, "sdricoh_request opcode=%i\n", cmd->opcode); 266 267 sdricoh_writel(host, R21C_STATUS, 0x18); 268 269 /* read/write commands seem to require this */ 270 if (data) { 271 sdricoh_writew(host, R226_BLOCKSIZE, data->blksz); 272 sdricoh_writel(host, R208_DATAIO, 0); 273 } 274 275 cmd->error = sdricoh_mmc_cmd(host, cmd); 276 277 /* read response buffer */ 278 if (cmd->flags & MMC_RSP_PRESENT) { 279 if (cmd->flags & MMC_RSP_136) { 280 /* CRC is stripped so we need to do some shifting. */ 281 for (i = 0; i < 4; i++) { 282 cmd->resp[i] = 283 sdricoh_readl(host, 284 R20C_RESP + (3 - i) * 4) << 8; 285 if (i != 3) 286 cmd->resp[i] |= 287 sdricoh_readb(host, R20C_RESP + 288 (3 - i) * 4 - 1); 289 } 290 } else 291 cmd->resp[0] = sdricoh_readl(host, R20C_RESP); 292 } 293 294 /* transfer data */ 295 if (data && cmd->error == 0) { 296 dev_dbg(dev, "transfer: blksz %i blocks %i sg_len %i " 297 "sg length %i\n", data->blksz, data->blocks, 298 data->sg_len, data->sg->length); 299 300 /* enter data reading mode */ 301 sdricoh_writel(host, R21C_STATUS, 0x837f031e); 302 for (i = 0; i < data->blocks; i++) { 303 size_t len = data->blksz; 304 u8 *buf; 305 struct page *page; 306 int result; 307 page = sg_page(data->sg); 308 309 buf = kmap(page) + data->sg->offset + (len * i); 310 result = 311 sdricoh_blockio(host, 312 data->flags & MMC_DATA_READ, buf, len); 313 kunmap(page); 314 flush_dcache_page(page); 315 if (result) { 316 dev_err(dev, "sdricoh_request: cmd %i " 317 "block transfer failed\n", cmd->opcode); 318 cmd->error = result; 319 break; 320 } else 321 data->bytes_xfered += len; 322 } 323 324 sdricoh_writel(host, R208_DATAIO, 1); 325 326 if (sdricoh_query_status(host, STATUS_TRANSFER_FINISHED, 327 TRANSFER_TIMEOUT)) { 328 dev_err(dev, "sdricoh_request: transfer end error\n"); 329 cmd->error = -EINVAL; 330 } 331 } 332 /* FIXME check busy flag */ 333 334 mmc_request_done(mmc, mrq); 335 dev_dbg(dev, "=============================\n"); 336 } 337 338 static void sdricoh_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) 339 { 340 struct sdricoh_host *host = mmc_priv(mmc); 341 dev_dbg(host->dev, "set_ios\n"); 342 343 if (ios->power_mode == MMC_POWER_ON) { 344 sdricoh_writel(host, R228_POWER, 0xc0e0); 345 346 if (ios->bus_width == MMC_BUS_WIDTH_4) { 347 sdricoh_writel(host, R224_MODE, 0x2000300); 348 sdricoh_writel(host, R228_POWER, 0x40e0); 349 } else { 350 sdricoh_writel(host, R224_MODE, 0x2000340); 351 } 352 353 } else if (ios->power_mode == MMC_POWER_UP) { 354 sdricoh_writel(host, R224_MODE, 0x2000320); 355 sdricoh_writel(host, R228_POWER, 0xe0); 356 } 357 } 358 359 static int sdricoh_get_ro(struct mmc_host *mmc) 360 { 361 struct sdricoh_host *host = mmc_priv(mmc); 362 unsigned int status; 363 364 status = sdricoh_readl(host, R21C_STATUS); 365 sdricoh_writel(host, R2E4_STATUS_RESP, status); 366 367 /* some notebooks seem to have the locked flag switched */ 368 if (switchlocked) 369 return !(status & STATUS_CARD_LOCKED); 370 371 return (status & STATUS_CARD_LOCKED); 372 } 373 374 static const struct mmc_host_ops sdricoh_ops = { 375 .request = sdricoh_request, 376 .set_ios = sdricoh_set_ios, 377 .get_ro = sdricoh_get_ro, 378 }; 379 380 /* initialize the control and register it to the mmc framework */ 381 static int sdricoh_init_mmc(struct pci_dev *pci_dev, 382 struct pcmcia_device *pcmcia_dev) 383 { 384 int result; 385 void __iomem *iobase; 386 struct mmc_host *mmc; 387 struct sdricoh_host *host; 388 struct device *dev = &pcmcia_dev->dev; 389 /* map iomem */ 390 if (pci_resource_len(pci_dev, SDRICOH_PCI_REGION) != 391 SDRICOH_PCI_REGION_SIZE) { 392 dev_dbg(dev, "unexpected pci resource len\n"); 393 return -ENODEV; 394 } 395 iobase = 396 pci_iomap(pci_dev, SDRICOH_PCI_REGION, SDRICOH_PCI_REGION_SIZE); 397 if (!iobase) { 398 dev_err(dev, "unable to map iobase\n"); 399 return -ENODEV; 400 } 401 /* check version? */ 402 if (readl(iobase + R104_VERSION) != 0x4000) { 403 dev_dbg(dev, "no supported mmc controller found\n"); 404 result = -ENODEV; 405 goto unmap_io; 406 } 407 /* allocate privdata */ 408 mmc = pcmcia_dev->priv = 409 mmc_alloc_host(sizeof(struct sdricoh_host), &pcmcia_dev->dev); 410 if (!mmc) { 411 dev_err(dev, "mmc_alloc_host failed\n"); 412 result = -ENOMEM; 413 goto unmap_io; 414 } 415 host = mmc_priv(mmc); 416 417 host->iobase = iobase; 418 host->dev = dev; 419 host->pci_dev = pci_dev; 420 421 mmc->ops = &sdricoh_ops; 422 423 /* FIXME: frequency and voltage handling is done by the controller 424 */ 425 mmc->f_min = 450000; 426 mmc->f_max = 24000000; 427 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34; 428 mmc->caps |= MMC_CAP_4_BIT_DATA; 429 430 mmc->max_seg_size = 1024 * 512; 431 mmc->max_blk_size = 512; 432 433 /* reset the controller */ 434 if (sdricoh_reset(host)) { 435 dev_dbg(dev, "could not reset\n"); 436 result = -EIO; 437 goto free_host; 438 } 439 440 result = mmc_add_host(mmc); 441 442 if (!result) { 443 dev_dbg(dev, "mmc host registered\n"); 444 return 0; 445 } 446 free_host: 447 mmc_free_host(mmc); 448 unmap_io: 449 pci_iounmap(pci_dev, iobase); 450 return result; 451 } 452 453 /* search for supported mmc controllers */ 454 static int sdricoh_pcmcia_probe(struct pcmcia_device *pcmcia_dev) 455 { 456 struct pci_dev *pci_dev = NULL; 457 458 dev_info(&pcmcia_dev->dev, "Searching MMC controller for pcmcia device" 459 " %s %s ...\n", pcmcia_dev->prod_id[0], pcmcia_dev->prod_id[1]); 460 461 /* search pci cardbus bridge that contains the mmc controller */ 462 /* the io region is already claimed by yenta_socket... */ 463 while ((pci_dev = 464 pci_get_device(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C476, 465 pci_dev))) { 466 /* try to init the device */ 467 if (!sdricoh_init_mmc(pci_dev, pcmcia_dev)) { 468 dev_info(&pcmcia_dev->dev, "MMC controller found\n"); 469 return 0; 470 } 471 472 } 473 dev_err(&pcmcia_dev->dev, "No MMC controller was found.\n"); 474 return -ENODEV; 475 } 476 477 static void sdricoh_pcmcia_detach(struct pcmcia_device *link) 478 { 479 struct mmc_host *mmc = link->priv; 480 481 dev_dbg(&link->dev, "detach\n"); 482 483 /* remove mmc host */ 484 if (mmc) { 485 struct sdricoh_host *host = mmc_priv(mmc); 486 mmc_remove_host(mmc); 487 pci_iounmap(host->pci_dev, host->iobase); 488 pci_dev_put(host->pci_dev); 489 mmc_free_host(mmc); 490 } 491 pcmcia_disable_device(link); 492 493 } 494 495 #ifdef CONFIG_PM 496 static int sdricoh_pcmcia_suspend(struct pcmcia_device *link) 497 { 498 dev_dbg(&link->dev, "suspend\n"); 499 return 0; 500 } 501 502 static int sdricoh_pcmcia_resume(struct pcmcia_device *link) 503 { 504 struct mmc_host *mmc = link->priv; 505 dev_dbg(&link->dev, "resume\n"); 506 sdricoh_reset(mmc_priv(mmc)); 507 return 0; 508 } 509 #else 510 #define sdricoh_pcmcia_suspend NULL 511 #define sdricoh_pcmcia_resume NULL 512 #endif 513 514 static struct pcmcia_driver sdricoh_driver = { 515 .name = DRIVER_NAME, 516 .probe = sdricoh_pcmcia_probe, 517 .remove = sdricoh_pcmcia_detach, 518 .id_table = pcmcia_ids, 519 .suspend = sdricoh_pcmcia_suspend, 520 .resume = sdricoh_pcmcia_resume, 521 }; 522 module_pcmcia_driver(sdricoh_driver); 523 524 module_param(switchlocked, uint, 0444); 525 526 MODULE_AUTHOR("Sascha Sommer <saschasommer@freenet.de>"); 527 MODULE_DESCRIPTION("Ricoh PCMCIA Secure Digital Interface driver"); 528 MODULE_LICENSE("GPL"); 529 530 MODULE_PARM_DESC(switchlocked, "Switch the cards locked status." 531 "Use this when unlocked cards are shown readonly (default 0)"); 532